https://www.anandtech.com/show/21335/full-draft-of-pcie-70-spec-available-512-gbs-over-pcie-x16-incoming [p] [logo2] [ ] [search] Welcome Log out Login Register [icon-twitt] [icon-faceb] [icon-rss] * ABOUT * BENCH * FORUMS * PODCAST [logo_resp] [ ] [search] ABOUT BENCH FORUMS PODCAST LOGIN REGISTER PC ComponentsV * CPUs * GPUs * Motherboards * SSDs * Cases/Cooling/PSUs * Memory * NAS * Storage Smartphones & tabletsV * Smartphones * Tablets * Huawei * HTC * Samsung * Google/Android * Microsoft * Apple * SoCs SystemsV * Notebook Reviews * Desktop Reviews * Mac Reviews * Ultrabooks ENTERPRISE & IT GUIDESV * Best CPUs * Best SSDs * Best Laptops * Best Android Phones * Best Video Cards * Best PSUs * Best Motherboards * Best Gaming Laptops * Best Mechanical Keyboards * Best Consumer HDDs DEALS * Home> CPUs [ ] Menu * PC ComponentsV + CPUs + GPUs + Motherboards + SSDs + Cases/Cooling/PSUs + Memory + NAS + Storage * Smartphones & tabletsV + Smartphones + Tablets + Huawei + HTC + Samsung + Google/Android + Microsoft + Apple + SoCs * SystemsV + Notebook Reviews + Desktop Reviews + Mac Reviews + Ultrabooks * Enterprise & IT * GuidesV + Best CPUs + Best SSDs + Best Laptops + Best Android Phones + Best Video Cards + Best PSUs + Best Motherboards + Best Gaming Laptops + Best Mechanical Keyboards + Best Consumer HDDs * Deals * TRENDING TOPICS * Intel * CPUs * AMD * GPUs * Mobile * Smartphones * NVIDIA * Storage * Laptops * Home> * CPUs PCIe 7.0 Draft 0.5 Spec Available: 512 GB/s over PCIe x16 On Track For 2025 by Anton Shilov on April 4, 2024 8:00 AM EST * Posted in * CPUs * Datacenter * GPUs * PCIe * PCI-SIG * PCIe 7.0 4 Comments | Add A Comment 4 Comments + Add A Comment [pcisiglogo] PCI-SIG this week released version 0.5 of the PCI-Express 7.0 specification to its members. This is the second draft of the spec and the final call for PCI-SIG members to submit their new features to the standard. The latest update on the development of the specification comes a couple months shy of a year after the PCI-SIG published the initial Draft 0.3 specificaiton, with the PCI-SIG using the latest update to reiterate that development of the new standard remains on-track for a final release in 2025. PCIe 7.0 is is the next generation interconnect technology for computers that is set to increase data transfer speeds to 128 GT/s per pin, doubling the 64 GT/s of PCIe 6.0 and quadrupling the 32 GT/s of PCIe 5.0. This would allow a 16-lane (x16) connection to support 256 GB/sec of bandwidth in each direction simultaneously, excluding encoding overhead. Such speeds will be handy for future datacenters as well as artificial intelligence and high-performance computing applications that will need even faster data transfer rates, including network data transfer rates. [xwG5Hra6p2] To achieve its impressive data transfer rates, PCIe 7.0 doubles the bus frequency at the physical layer compared to PCIe 5.0 and 6.0. Otherwise, the standard retains pulse amplitude modulation with four level signaling (PAM4), 1b/1b FLIT mode encoding, and the forward error correction (FEC) technologies that are already used for PCIe 6.0. Otherwise, PCI-SIG says that the PCIe 7.0 speicification also focuses on enhanced channel parameters and reach as well as improved power efficiency. Overall, the engineers behind the standard have their work cut out for them, given that PCIe 7.0 requires doubling the bus frequency at the physical layer, a major development that PCIe 6.0 sidestepped with PAM4 signaling. Nothing comes for free in regards to improving data signaling, and with PCIe 7.0, the PCI-SIG is arguably back to hard-mode development by needing to improve the physical layer once more - this time to enable it to run at around 30GHz. Though how much of this heavy lifting will be accomplished through smart signaling (and retimers) and how much will be accomplished through sheer materials improvements, such as thicker printed circuit boards (PCBs) and low-loss materials, remains to be seen. The next major step for PCIe 7.0 is finalization of the version 0.7 of specification, which is considered the Complete Draft, where all aspects must be fully defined, and electrical specifications must be validated through test chips. After this iteration of the specification is released, no new features can be added. PCIe 6.0 eventually went through 4 major drafts - 0.3, 0.5, 0.7, and 0.9 - before finally being finalized, so PCIe 7.0 is likely on the same track. Once finalized in 2025, it should take a few years for the first PCIe 7.0 hardware to hit the shelves. Although development work on controller IP and initial hardware is already underway, that process extends well beyond the release of the final PCIe specification. Source: PCI-SIG PRINT THIS ARTICLE * Post Your Comment [ ] [ ] [ ] [ ] [ ] [ ] [ ] [ ] [ ] Please log in or sign up to comment. [ ] [Submit Comment] [ajax-loade] POST A COMMENT 4 Comments View All Comments * bernstein - Thursday, April 4, 2024 - link The funny thing is, *while gaming* even an RTX 4090 won't saturate a PCIe 7.0 x1 link. We can probably drop pcie x16 for anything but datacenters cpu/ mainboards... Reply * skaurus - Thursday, April 4, 2024 - link Even PCIe 5.0 requires more expensive motherboards. PCIe 6.0 is, from what I gather, unlikely to make it even more difficult, but PCIe 7.0 will. Maybe it won't make it into consumer devices at all. Reply * kpb321 - Thursday, April 4, 2024 - link Yeah. I don't know if PCI-E 7 will ever make it to consumer boards. If it does it will most certainly used to drive things with fewer lanes. Maybe we will see it as the link between the CPU and the chipset to allow a higher bandwidth connection there but even that seems unlikely. I have no idea where they are going to go for PCI-E 8 if they want to double performance again. Reply * bernstein - Thursday, April 4, 2024 - link Well overall the rtx4090 is 2% slower on pcie 3 x16 so i guess onnsome games it can saturates a pcie x7 x1 link. But i doubt even a rtx 5090 can saturate a pcie 7 x2 link https://tpucdn.com/review/nvidia-geforce-rtx-4090-... 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