dat.h - vx32 - Local 9vx git repository for patches.
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dat.h (7568B)
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1 #include <ucontext.h>
2 #include "libvx32/vx32.h"
3
4 typedef struct BIOS32si BIOS32si;
5 typedef struct Conf Conf;
6 typedef struct Confmem Confmem;
7 typedef struct FPsave FPsave;
8 typedef struct ISAConf ISAConf;
9 typedef struct Label Label;
10 typedef struct Lock Lock;
11 typedef struct MMU MMU;
12 typedef struct Mach Mach;
13 typedef struct Notsave Notsave;
14 typedef struct PCArch PCArch;
15 typedef struct Pcidev Pcidev;
16 typedef struct PCMmap PCMmap;
17 typedef struct PCMslot PCMslot;
18 typedef struct Page Page;
19 typedef struct PMMU PMMU;
20 typedef struct Proc Proc;
21 typedef struct Segdesc Segdesc;
22 typedef vlong Tval;
23 typedef struct Ureg Ureg;
24 typedef struct Vctl Vctl;
25
26
27 #define MAXSYSARG 5 /* for mount(fd, afd, mpt, flag, arg) */
28
29 /*
30 * parameters for sysproc.c
31 */
32 #define AOUT_MAGIC (I_MAGIC)
33
34 struct Lock
35 {
36 ulong key;
37 ulong sr;
38 ulong pc;
39 Proc *p;
40 Mach *m_;
41 ushort isilock;
42 long lockcycles;
43 };
44
45 struct Label
46 {
47 uint64 bp; // Plan 9 VX
48 uint64 bx;
49 uint64 si;
50 uint64 di;
51 uint64 sp;
52 uint64 pc;
53 uint64 r12;
54 uint64 r13;
55 uint64 r14;
56 uint64 r15;
57 };
58
59
60 /*
61 * FPsave.status
62 */
63 enum
64 {
65 /* this is a state */
66 FPinit= 0,
67 FPactive= 1,
68 FPinactive= 2,
69
70 /* the following is a bit that can be or'd into the state */
71 FPillegal= 0x100,
72 };
73
74 struct FPsave
75 {
76 ushort control;
77 ushort r1;
78 ushort status;
79 ushort r2;
80 ushort tag;
81 ushort r3;
82 ulong pc;
83 ushort selector;
84 ushort r4;
85 ulong operand;
86 ushort oselector;
87 ushort r5;
88 uchar regs[80]; /* floating point registers */
89 };
90
91 struct Confmem
92 {
93 ulong base;
94 ulong npage;
95 ulong kbase;
96 ulong klimit;
97 };
98
99 struct Conf
100 {
101 ulong nmach; /* processors */
102 ulong nproc; /* processes */
103 ulong monitor; /* has monitor? */
104 Confmem mem[4]; /* physical memory */
105 ulong npage; /* total physical pages of memory */
106 ulong upages; /* user page pool */
107 ulong nimage; /* number of page cache image headers */
108 ulong nswap; /* number of swap pages */
109 int nswppo; /* max # of pageouts per segment pass */
110 ulong base0; /* base of bank 0 */
111 ulong base1; /* base of bank 1 */
112 ulong copymode; /* 0 is copy on write, 1 is copy on reference */
113 ulong ialloc; /* max interrupt time allocation in bytes */
114 ulong pipeqsize; /* size in bytes of pipe queues */
115 int nuart; /* number of uart devices */
116 };
117
118 /*
119 * MMU stuff in proc
120 */
121 #define NCOLOR 1
122 typedef struct Uspace Uspace;
123 struct PMMU
124 {
125 struct vxproc *vxproc; // Plan 9 VX
126 struct vxmem vxmem;
127 struct vxmmap vxmm; // Plan 9 VX
128 Uspace *us;
129 uchar *uzero;
130 };
131
132 /*
133 * things saved in the Proc structure during a notify
134 */
135 struct Notsave
136 {
137 ulong svflags;
138 ulong svcs;
139 ulong svss;
140 };
141
142 #include "portdat.h"
143
144 typedef struct {
145 ulong link; /* link (old TSS selector) */
146 ulong esp0; /* privilege level 0 stack pointer */
147 ulong ss0; /* privilege level 0 stack selector */
148 ulong esp1; /* privilege level 1 stack pointer */
149 ulong ss1; /* privilege level 1 stack selector */
150 ulong esp2; /* privilege level 2 stack pointer */
151 ulong ss2; /* privilege level 2 stack selector */
152 ulong xcr3; /* page directory base register - not used because we don't use trap gates */
153 ulong eip; /* instruction pointer */
154 ulong eflags; /* flags register */
155 ulong eax; /* general registers */
156 ulong ecx;
157 ulong edx;
158 ulong ebx;
159 ulong esp;
160 ulong ebp;
161 ulong esi;
162 ulong edi;
163 ulong es; /* segment selectors */
164 ulong cs;
165 ulong ss;
166 ulong ds;
167 ulong fs;
168 ulong gs;
169 ulong ldt; /* selector for task's LDT */
170 ulong iomap; /* I/O map base address + T-bit */
171 } Tss;
172
173 struct Segdesc
174 {
175 ulong d0;
176 ulong d1;
177 };
178
179 struct Mach
180 {
181 #ifndef TLS
182 Proc* externup;
183 #endif
184 int new;
185 int machno; /* physical id of processor (KNOWN TO ASSEMBLY) */
186 ulong splpc; /* pc of last caller to splhi */
187
188 Segdesc *gdt; /* gdt for this processor */
189
190 Proc* proc; /* current process on this processor */
191
192 Page* pdbpool;
193 int pdbcnt;
194
195 Label sched; /* scheduler wakeup */
196
197 Proc* readied; /* for runproc */
198 ulong schedticks; /* next forced context switch */
199
200 int tlbfault;
201 int tlbpurge;
202 int pfault;
203 int cs;
204 int syscall;
205 int load;
206 int intr;
207 int flushmmu; /* make current proc flush it's mmu state */
208 int ilockdepth;
209 Perf perf; /* performance counters */
210
211 ulong spuriousintr;
212 int lastintr;
213
214
215 Lock apictimerlock;
216 int cpumhz;
217 uvlong cyclefreq; /* Frequency of user readable cycle counter */
218 uvlong cpuhz;
219 int cpuidax;
220 int cpuiddx;
221 char cpuidid[16];
222 char* cpuidtype;
223 int havetsc;
224 int havepge;
225 uvlong tscticks;
226 int pdballoc;
227 int pdbfree;
228
229
230 int spl; // Plan 9 VX
231 void *sigstack;
232 int stack[1];
233 };
234
235 /*
236 * KMap the structure doesn't exist, but the functions do.
237 */
238 typedef struct KMap KMap;
239 #define VA(k) ((void*)(k))
240 KMap* kmap(Page*);
241 void kunmap(KMap*);
242
243 struct
244 {
245 Lock lk;
246 int machs; /* bitmap of active CPUs */
247 int exiting; /* shutdown */
248 int ispanic; /* shutdown in response to a panic */
249 int thunderbirdsarego; /* lets the added processors continue to schedinit */
250 }active;
251
252 /*
253 * routines for things outside the PC model, like power management
254 */
255 struct PCArch
256 {
257 char* id;
258 int (*ident)(void); /* this should be in the model */
259 void (*reset)(void); /* this should be in the model */
260 int (*serialpower)(int); /* 1 == on, 0 == off */
261 int (*modempower)(int); /* 1 == on, 0 == off */
262
263 void (*intrinit)(void);
264 int (*intrenable)(Vctl*);
265 int (*intrvecno)(int);
266 int (*intrdisable)(int);
267 void (*introff)(void);
268 void (*intron)(void);
269
270 void (*clockenable)(void);
271 uvlong (*fastclock)(uvlong*);
272 void (*timerset)(uvlong);
273 };
274
275 /* cpuid instruction result register bits */
276 enum {
277 /* dx */
278 Fpuonchip = 1<<0,
279 // Pse = 1<<3, /* page size extensions */
280 Tsc = 1<<4, /* time-stamp counter */
281 Cpumsr = 1<<5, /* model-specific registers, rdmsr/wrmsr */
282 Pae = 1<<6, /* physical-addr extensions */
283 Mce = 1<<7, /* machine-check exception */
284 Cmpxchg8b = 1<<8,
285 Cpuapic = 1<<9,
286 Mtrr = 1<<12, /* memory-type range regs. */
287 Pge = 1<<13, /* page global extension */
288 // Pse2 = 1<<17, /* more page size extensions */
289 Clflush = 1<<19,
290 Mmx = 1<<23,
291 Sse = 1<<25, /* thus sfence instr. */
292 Sse2 = 1<<26, /* thus mfence & lfence instr.s */
293 };
294
295 /*
296 * a parsed plan9.ini line
297 */
298 #define NISAOPT 8
299
300 struct ISAConf {
301 char *type;
302 ulong port;
303 int irq;
304 ulong dma;
305 ulong mem;
306 ulong size;
307 ulong freq;
308
309 int nopt;
310 char *opt[NISAOPT];
311 };
312
313 extern PCArch *arch; /* PC architecture */
314
315 /*
316 * Each processor sees its own Mach structure at address MACHADDR.
317 * However, the Mach structures must also be available via the per-processor
318 * MMU information array machp, mainly for disambiguation and access to
319 * the clock which is only maintained by the bootstrap processor (0).
320 */
321 Mach* machp[MAXMACH];
322
323 #define MACHP(n) (machp[n])
324
325 #ifdef TLS
326 extern __thread Mach *m; // Plan 9 VX
327 extern __thread Proc *up; // Plan 9 VX
328 # define thismach m
329 # define setmach(x) (m = (x))
330 #else
331 extern Mach *getmach(void);
332 extern void setmach(Mach*);
333 # define up getmach()->externup
334 # ifdef WANT_M
335 # define m getmach()
336 # endif
337 #endif
338
339 /*
340 * hardware info about a device
341 */
342 typedef struct {
343 ulong port;
344 int size;
345 } Devport;
346
347 struct DevConf
348 {
349 ulong intnum; /* interrupt number */
350 char *type; /* card type, malloced */
351 int nports; /* Number of ports */
352 Devport *ports; /* The ports themselves */
353 };
354
355
356 // Plan 9 VX
357 extern int traceprocs;
358 extern int tracesyscalls;
359 extern int doabort;
360
361 /* Pthreads-based sleep and wakeup. */
362 typedef struct Psleep Psleep;
363 typedef struct Pwaiter Pwaiter;
364 struct Psleep
365 {
366 int init;
367 pthread_mutex_t mutex;
368 Pwaiter *waiter;
369 };
370
371 struct Uspace
372 {
373 Proc *p; // proc currently mapped
374 uchar *uzero;
375 ulong lo;
376 ulong hi;
377 };