A scratchpad for random thoughts re spudstop.
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Note to users:
If none of the speedstep drivers work, you may want to test whether
the ACPI P-States driver works.

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ICH2-M and ICH3-M chipsets (mobile Camino 2 and 3) are fully supported
by CPUFreq's speedstep-ich.c - a mostly documented interface (a read/write
register in the LPC bridge function of the chipset) allows for
switching and reading state.

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Mobile Pentium-M (a.k.a. "Banias", part of "Centrino") is fully
supported by CPUFreq's speedstep-centrino.c, but that driver is not
vendor-approved.

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There is an ongoing progress to support PIIX4 chipsets. See
http://www.poupinou.org/cpufreq/ for details. 

Intel PIIX4 (BX/MX chipsets) support still has to be 
reverse-engineered as Intel continues to withhold the documentation 
for this "1st type of speedstep". And some documentation which had been
publicly available (2730401.pdf / Mobile Intel Pentium Processor III /
440 MX Chipset Platform Design Guide) was revised, and the parts
relevant to SpeedStep were removed. 

According to this document, there is an IC called "Intel SpeedStep
Technology Control Logic" which controls the frequency
transitions. An entry signal called GPO (LO/HI#) [p. 25] or G_LO_HI# 
[p.26], pin "14" [p.50] decides which frequency to select. 

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On some chipsets, and certain BIOSes, it might be possible to use the
"0xB2 APM interface" reverse engineered by Martin Malik
<martin.malik@siemens.at>. You can find an user-space interface
developed by Marc A. Lehmann <pcg@goof.com> at
http://www.goof.com/pcg/marc/speedstep.html

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I couldn't find any useful information on other vendor 
chipsets (VIA etc.) publicly available. Maybe I'll ask VIA sometimes,
but I really don't want to sign a NDA. 

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