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Date: Tue, 11 Jan 2011 15:59:30 GMT
From: Pedro Giffuni <giffunip@tutopia.com>
To: freebsd-gnats-submit@FreeBSD.org
Subject: Replace the GPL'd emu10k1-alsa.h 	with emuxkireg.h from NetBSD
X-Send-Pr-Version: www-3.1
X-GNATS-Notify:

>Number:         153901
>Category:       kern
>Synopsis:       [sound] [patch] Replace the GPL'd emu10k1-alsa.h with emuxkireg.h from NetBSD
>Confidential:   no
>Severity:       non-critical
>Priority:       medium
>Responsible:    pfg
>State:          closed
>Quarter:        
>Keywords:       
>Date-Required:  
>Class:          change-request
>Submitter-Id:   current-users
>Arrival-Date:   Tue Jan 11 16:00:19 UTC 2011
>Closed-Date:    Fri Feb 03 23:06:32 UTC 2012
>Last-Modified:  Fri Feb  3 23:10:07 UTC 2012
>Originator:     Pedro Giffuni
>Release:        8.2-RC1
>Organization:
>Environment:
FreeBSD mogwai.giffuni.net 8.2-RC1 FreeBSD 8.2-RC1 #0: Thu Dec 23 15:32:35 UTC 2010     root@almeida.cse.buffalo.edu:/usr/obj/usr/src/sys/GENERIC  i386

>Description:
NetBSD has a files dev/pci/emuxkireg.h NetBSD file which is equivalent to
the alsa header we use in our sound system for the emu10k1 code.
The NetBSD is actually much smaller as it doesn't carry some data structures
that we don't use anyway.

I brought in the NetBSD file and left it basically unmodified, I was careful not to add anything on it that would affect the license (I didn't fix style issues either). I then modified the C sources to match the header and finally hammered in what was missing.

A code review is welcome, plus I hope using this header will help a bit the "crosspolination" effect with the other BSDs.
>How-To-Repeat:

>Fix:
Patch attached.

Patch attached with submission follows:

diff -ruN dev/sound/pci.orig/emu10k1.c dev/sound/pci/emu10k1.c
--- dev/sound/pci.orig/emu10k1.c	2011-01-07 22:17:46.000000000 +0000
+++ dev/sound/pci/emu10k1.c	2011-01-10 20:16:03.000000000 +0000
@@ -32,7 +32,7 @@
 
 #include <dev/sound/pcm/sound.h>
 #include <dev/sound/pcm/ac97.h>
-#include "emu10k1-alsa%diked.h"
+#include <dev/sound/pci/emu10k1reg.h>
 
 #include <dev/pci/pcireg.h>
 #include <dev/pci/pcivar.h>
@@ -66,12 +66,94 @@
 
 #define	ENABLE		0xffffffff
 #define	DISABLE		0x00000000
-#define	ENV_ON		DCYSUSV_CHANNELENABLE_MASK
+#define	ENV_ON		EMU_CHAN_DCYSUSV_CHANNELENABLE_MASK
 #define	ENV_OFF		0x00	/* XXX: should this be 1? */
 
-#define	A_IOCFG_GPOUT_A	0x40	/* Analog Output */
-#define	A_IOCFG_GPOUT_D	0x04	/* Digital Output */
-#define	A_IOCFG_GPOUT_AD (A_IOCFG_GPOUT_A|A_IOCFG_GPOUT_D)  /* A_IOCFG_GPOUT0 */
+#define	EMU_A_IOCFG_GPOUT_A	0x40
+#define	EMU_A_IOCFG_GPOUT_D	0x04
+#define	EMU_A_IOCFG_GPOUT_AD (EMU_A_IOCFG_GPOUT_A|EMU_A_IOCFG_GPOUT_D)  /* EMU_A_IOCFG_GPOUT0 */
+
+#define	EMU_HCFG_GPOUT1		0x00000800
+
+/* instruction set */
+#define iACC3	 0x06
+#define iMACINT0 0x04
+#define iINTERP  0x0e
+
+#define C_00000000	0x40
+#define C_00000001	0x41
+#define C_00000004	0x44
+#define C_40000000	0x4d
+/* Audigy constants */
+#define A_C_00000000	0xc0
+#define A_C_40000000	0xcd
+
+/* GPRs */
+#define FXBUS(x)	(0x00 + (x))
+#define EXTIN(x)	(0x10 + (x))
+#define EXTOUT(x)	(0x20 + (x))
+
+#define GPR(x)		(EMU_FXGPREGBASE + (x))
+#define A_EXTIN(x)	(0x40 + (x))
+#define A_FXBUS(x)	(0x00 + (x))
+#define A_EXTOUT(x)	(0x60 + (x))
+#define A_GPR(x)	(EMU_A_FXGPREGBASE + (x))
+
+/* FX buses */
+#define FXBUS_PCM_LEFT		0x00
+#define FXBUS_PCM_RIGHT		0x01
+#define FXBUS_MIDI_LEFT		0x04
+#define FXBUS_MIDI_RIGHT	0x05
+#define FXBUS_MIDI_REVERB	0x0c
+#define FXBUS_MIDI_CHORUS	0x0d
+
+/* Inputs */
+#define EXTIN_AC97_L		0x00
+#define EXTIN_AC97_R		0x01
+#define EXTIN_SPDIF_CD_L	0x02
+#define EXTIN_SPDIF_CD_R	0x03
+#define EXTIN_TOSLINK_L		0x06
+#define EXTIN_TOSLINK_R		0x07
+#define EXTIN_COAX_SPDIF_L	0x0a
+#define EXTIN_COAX_SPDIF_R	0x0b
+/* Audigy Inputs */
+#define A_EXTIN_AC97_L		0x00
+#define A_EXTIN_AC97_R		0x01
+
+/* Outputs */
+#define EXTOUT_AC97_L	   0x00
+#define EXTOUT_AC97_R	   0x01
+#define EXTOUT_TOSLINK_L   0x02
+#define EXTOUT_TOSLINK_R   0x03
+#define EXTOUT_AC97_CENTER 0x04
+#define EXTOUT_AC97_LFE	   0x05
+#define EXTOUT_HEADPHONE_L 0x06
+#define EXTOUT_HEADPHONE_R 0x07
+#define EXTOUT_REAR_L	   0x08
+#define EXTOUT_REAR_R	   0x09
+#define EXTOUT_ADC_CAP_L   0x0a
+#define EXTOUT_ADC_CAP_R   0x0b
+#define EXTOUT_ACENTER	   0x11
+#define EXTOUT_ALFE	   0x12
+/* Audigy Outputs */
+#define A_EXTOUT_FRONT_L	0x00
+#define A_EXTOUT_FRONT_R	0x01
+#define A_EXTOUT_CENTER		0x02
+#define A_EXTOUT_LFE		0x03
+#define A_EXTOUT_HEADPHONE_L	0x04
+#define A_EXTOUT_HEADPHONE_R	0x05
+#define A_EXTOUT_REAR_L		0x06
+#define A_EXTOUT_REAR_R		0x07
+#define A_EXTOUT_AFRONT_L	0x08
+#define A_EXTOUT_AFRONT_R	0x09
+#define A_EXTOUT_ACENTER	0x0a
+#define A_EXTOUT_ALFE		0x0b
+#define A_EXTOUT_AREAR_L	0x0e
+#define A_EXTOUT_AREAR_R	0x0f
+#define A_EXTOUT_AC97_L		0x10
+#define A_EXTOUT_AC97_R		0x11
+#define A_EXTOUT_ADC_CAP_L	0x16
+#define A_EXTOUT_ADC_CAP_R	0x17
 
 struct emu_memblk {
 	SLIST_ENTRY(emu_memblk) link;
@@ -247,9 +329,9 @@
 {
 	u_int32_t ptr, val, mask, size, offset;
 
-	ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK);
-	emu_wr(sc, PTR, ptr, 4);
-	val = emu_rd(sc, DATA, 4);
+	ptr = ((reg << 16) & sc->addrmask) | (chn & EMU_PTR_CHNO_MASK);
+	emu_wr(sc, EMU_PTR, ptr, 4);
+	val = emu_rd(sc, EMU_DATA, 4);
 	if (reg & 0xff000000) {
 		size = (reg >> 24) & 0x3f;
 		offset = (reg >> 16) & 0x1f;
@@ -265,23 +347,23 @@
 {
 	u_int32_t ptr, mask, size, offset;
 
-	ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK);
-	emu_wr(sc, PTR, ptr, 4);
+	ptr = ((reg << 16) & sc->addrmask) | (chn & EMU_PTR_CHNO_MASK);
+	emu_wr(sc, EMU_PTR, ptr, 4);
 	if (reg & 0xff000000) {
 		size = (reg >> 24) & 0x3f;
 		offset = (reg >> 16) & 0x1f;
 		mask = ((1 << size) - 1) << offset;
 		data <<= offset;
 		data &= mask;
-		data |= emu_rd(sc, DATA, 4) & ~mask;
+		data |= emu_rd(sc, EMU_DATA, 4) & ~mask;
 	}
-	emu_wr(sc, DATA, data, 4);
+	emu_wr(sc, EMU_DATA, data, 4);
 }
 
 static void
 emu_wrefx(struct sc_info *sc, unsigned int pc, unsigned int data)
 {
-	pc += sc->audigy ? A_MICROCODEBASE : MICROCODEBASE;
+	pc += sc->audigy ? EMU_A_MICROCODEBASE : EMU_MICROCODEBASE;
 	emu_wrptr(sc, 0, pc, data);
 }
 
@@ -294,8 +376,8 @@
 {
 	struct sc_info *sc = (struct sc_info *)devinfo;
 
-	emu_wr(sc, AC97ADDRESS, regno, 1);
-	return emu_rd(sc, AC97DATA, 2);
+	emu_wr(sc, EMU_AC97ADDR, regno, 1);
+	return emu_rd(sc, EMU_AC97DATA, 2);
 }
 
 static int
@@ -303,8 +385,8 @@
 {
 	struct sc_info *sc = (struct sc_info *)devinfo;
 
-	emu_wr(sc, AC97ADDRESS, regno, 1);
-	emu_wr(sc, AC97DATA, data, 2);
+	emu_wr(sc, EMU_AC97ADDR, regno, 1);
+	emu_wr(sc, EMU_AC97DATA, data, 2);
 	return 0;
 }
 
@@ -346,7 +428,7 @@
 	}
 	RANGE(rate, 48, 9600);
 	sc->timerinterval = 48000 / rate;
-	emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2);
+	emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2);
 
 	return sc->timerinterval;
 }
@@ -357,15 +439,15 @@
 	u_int32_t x;
 	if (go) {
 		if (sc->timer++ == 0) {
-			x = emu_rd(sc, INTE, 4);
-			x |= INTE_INTERVALTIMERENB;
-			emu_wr(sc, INTE, x, 4);
+			x = emu_rd(sc, EMU_INTE, 4);
+			x |= EMU_INTE_INTERTIMERENB;
+			emu_wr(sc, EMU_INTE, x, 4);
 		}
 	} else {
 		sc->timer = 0;
-		x = emu_rd(sc, INTE, 4);
-		x &= ~INTE_INTERVALTIMERENB;
-		emu_wr(sc, INTE, x, 4);
+		x = emu_rd(sc, EMU_INTE, 4);
+		x &= ~EMU_INTE_INTERTIMERENB;
+		emu_wr(sc, EMU_INTE, x, 4);
 	}
 	return 0;
 }
@@ -373,7 +455,7 @@
 static void
 emu_enastop(struct sc_info *sc, char channel, int enable)
 {
-	int reg = (channel & 0x20) ? SOLEH : SOLEL;
+	int reg = (channel & 0x20) ? EMU_SOLEH : EMU_SOLEL;
 	channel &= 0x1f;
 	reg |= 1 << 24;
 	reg |= channel << 16;
@@ -568,49 +650,49 @@
 		r = v->ismaster ? 0 : r;
 	}
 
-	emu_wrptr(sc, v->vnum, CPF, v->stereo ? CPF_STEREO_MASK : 0);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, v->stereo ? EMU_CHAN_CPF_STEREO_MASK : 0);
 	val = v->stereo ? 28 : 30;
 	val *= v->b16 ? 1 : 2;
 	start = sa + val;
 
 	if (sc->audigy) {
-		emu_wrptr(sc, v->vnum, A_FXRT1, v->fxrt1);
-		emu_wrptr(sc, v->vnum, A_FXRT2, v->fxrt2);
-		emu_wrptr(sc, v->vnum, A_SENDAMOUNTS, 0);
+		emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT1, v->fxrt1);
+		emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT2, v->fxrt2);
+		emu_wrptr(sc, v->vnum, EMU_A_CHAN_SENDAMOUNTS, 0);
 	}
 	else
-		emu_wrptr(sc, v->vnum, FXRT, v->fxrt1 << 16);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_FXRT, v->fxrt1 << 16);
 
-	emu_wrptr(sc, v->vnum, PTRX, (x << 8) | r);
-	emu_wrptr(sc, v->vnum, DSL, ea | (y << 24));
-	emu_wrptr(sc, v->vnum, PSST, sa | (l << 24));
-	emu_wrptr(sc, v->vnum, CCCA, start | (v->b16 ? 0 : CCCA_8BITSELECT));
+	emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX, (x << 8) | r);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_DSL, ea | (y << 24));
+	emu_wrptr(sc, v->vnum, EMU_CHAN_PSST, sa | (l << 24));
+	emu_wrptr(sc, v->vnum, EMU_CHAN_CCCA, start | (v->b16 ? 0 : EMU_CHAN_CCCA_8BITSELECT));
 
-	emu_wrptr(sc, v->vnum, Z1, 0);
-	emu_wrptr(sc, v->vnum, Z2, 0);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_Z1, 0);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_Z2, 0);
 
 	silent_page = ((u_int32_t)(sc->mem.silent_page_addr) << 1)
-	    | MAP_PTI_MASK;
-	emu_wrptr(sc, v->vnum, MAPA, silent_page);
-	emu_wrptr(sc, v->vnum, MAPB, silent_page);
-
-	emu_wrptr(sc, v->vnum, CVCF, CVCF_CURRENTFILTER_MASK);
-	emu_wrptr(sc, v->vnum, VTFT, VTFT_FILTERTARGET_MASK);
-	emu_wrptr(sc, v->vnum, ATKHLDM, 0);
-	emu_wrptr(sc, v->vnum, DCYSUSM, DCYSUSM_DECAYTIME_MASK);
-	emu_wrptr(sc, v->vnum, LFOVAL1, 0x8000);
-	emu_wrptr(sc, v->vnum, LFOVAL2, 0x8000);
-	emu_wrptr(sc, v->vnum, FMMOD, 0);
-	emu_wrptr(sc, v->vnum, TREMFRQ, 0);
-	emu_wrptr(sc, v->vnum, FM2FRQ2, 0);
-	emu_wrptr(sc, v->vnum, ENVVAL, 0x8000);
-
-	emu_wrptr(sc, v->vnum, ATKHLDV,
-	    ATKHLDV_HOLDTIME_MASK | ATKHLDV_ATTACKTIME_MASK);
-	emu_wrptr(sc, v->vnum, ENVVOL, 0x8000);
+	    | EMU_CHAN_MAP_PTI_MASK;
+	emu_wrptr(sc, v->vnum, EMU_CHAN_MAPA, silent_page);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_MAPB, silent_page);
+
+	emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, EMU_CHAN_CVCF_CURRFILTER_MASK);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, EMU_CHAN_VTFT_FILTERTARGET_MASK);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDM, 0);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSM, EMU_CHAN_DCYSUSM_DECAYTIME_MASK);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL1, 0x8000);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL2, 0x8000);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_FMMOD, 0);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_TREMFRQ, 0);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_FM2FRQ2, 0);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVAL, 0x8000);
+
+	emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDV,
+	    EMU_CHAN_ATKHLDV_HOLDTIME_MASK | EMU_CHAN_ATKHLDV_ATTACKTIME_MASK);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVOL, 0x8000);
 
-	emu_wrptr(sc, v->vnum, PEFE_FILTERAMOUNT, 0x7f);
-	emu_wrptr(sc, v->vnum, PEFE_PITCHAMOUNT, 0);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_FILTERAMOUNT, 0x7f);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_PITCHAMOUNT, 0);
 
 	if (v->slave != NULL)
 		emu_vwrite(sc, v->slave);
@@ -631,29 +713,29 @@
 		sample = v->b16 ? 0x00000000 : 0x80808080;
 
 		for (i = 0; i < cs; i++)
-			emu_wrptr(sc, v->vnum, CD0 + i, sample);
-		emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, 0);
-		emu_wrptr(sc, v->vnum, CCR_READADDRESS, cra);
-		emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, ccis);
-
-		emu_wrptr(sc, v->vnum, IFATN, 0xff00);
-		emu_wrptr(sc, v->vnum, VTFT, 0xffffffff);
-		emu_wrptr(sc, v->vnum, CVCF, 0xffffffff);
-		emu_wrptr(sc, v->vnum, DCYSUSV, 0x00007f7f);
+			emu_wrptr(sc, v->vnum, EMU_CHAN_CD0 + i, sample);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, 0);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_READADDRESS, cra);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, ccis);
+
+		emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xff00);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0xffffffff);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0xffffffff);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSV, 0x00007f7f);
 		emu_enastop(sc, v->vnum, 0);
 
 		pitch_target = emu_rate_to_linearpitch(v->speed);
 		initial_pitch = emu_rate_to_pitch(v->speed) >> 8;
-		emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, pitch_target);
-		emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, pitch_target);
-		emu_wrptr(sc, v->vnum, IP, initial_pitch);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, pitch_target);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, pitch_target);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_IP, initial_pitch);
 	} else {
-		emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, 0);
-		emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, 0);
-		emu_wrptr(sc, v->vnum, IFATN, 0xffff);
-		emu_wrptr(sc, v->vnum, VTFT, 0x0000ffff);
-		emu_wrptr(sc, v->vnum, CVCF, 0x0000ffff);
-		emu_wrptr(sc, v->vnum, IP, 0);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, 0);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, 0);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xffff);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0x0000ffff);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0x0000ffff);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_IP, 0);
 		emu_enastop(sc, v->vnum, 1);
 	}
 	if (v->slave != NULL)
@@ -666,7 +748,7 @@
 	int s, ptr;
 
 	s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0);
-	ptr = (emu_rdptr(sc, v->vnum, CCCA_CURRADDR) - (v->start >> s)) << s;
+	ptr = (emu_rdptr(sc, v->vnum, EMU_CHAN_CCCA_CURRADDR) - (v->start >> s)) << s;
 	return ptr & ~0x0000001f;
 }
 
@@ -875,27 +957,27 @@
 	ch->num = sc->rnum;
 	switch(sc->rnum) {
 	case 0:
-		ch->idxreg = sc->audigy ? A_ADCIDX : ADCIDX;
-		ch->basereg = ADCBA;
-		ch->sizereg = ADCBS;
-		ch->setupreg = ADCCR;
-		ch->irqmask = INTE_ADCBUFENABLE;
+		ch->idxreg = sc->audigy ? EMU_A_ADCIDX : EMU_ADCIDX;
+		ch->basereg = EMU_ADCBA;
+		ch->sizereg = EMU_ADCBS;
+		ch->setupreg = EMU_ADCCR;
+		ch->irqmask = EMU_INTE_ADCBUFENABLE;
 		break;
 
 	case 1:
-		ch->idxreg = FXIDX;
-		ch->basereg = FXBA;
-		ch->sizereg = FXBS;
-		ch->setupreg = FXWC;
-		ch->irqmask = INTE_EFXBUFENABLE;
+		ch->idxreg = EMU_FXIDX;
+		ch->basereg = EMU_FXBA;
+		ch->sizereg = EMU_FXBS;
+		ch->setupreg = EMU_FXWC;
+		ch->irqmask = EMU_INTE_EFXBUFENABLE;
 		break;
 
 	case 2:
-		ch->idxreg = MICIDX;
-		ch->basereg = MICBA;
-		ch->sizereg = MICBS;
+		ch->idxreg = EMU_MICIDX;
+		ch->basereg = EMU_MICBA;
+		ch->sizereg = EMU_MICBS;
 		ch->setupreg = 0;
-		ch->irqmask = INTE_MICBUFENABLE;
+		ch->irqmask = EMU_INTE_MICBUFENABLE;
 		break;
 	}
 	sc->rnum++;
@@ -967,27 +1049,27 @@
 
 	switch(sc->bufsz) {
 	case 4096:
-		sz = ADCBS_BUFSIZE_4096;
+		sz = EMU_RECBS_BUFSIZE_4096;
 		break;
 
 	case 8192:
-		sz = ADCBS_BUFSIZE_8192;
+		sz = EMU_RECBS_BUFSIZE_8192;
 		break;
 
 	case 16384:
-		sz = ADCBS_BUFSIZE_16384;
+		sz = EMU_RECBS_BUFSIZE_16384;
 		break;
 
 	case 32768:
-		sz = ADCBS_BUFSIZE_32768;
+		sz = EMU_RECBS_BUFSIZE_32768;
 		break;
 
 	case 65536:
-		sz = ADCBS_BUFSIZE_65536;
+		sz = EMU_RECBS_BUFSIZE_65536;
 		break;
 
 	default:
-		sz = ADCBS_BUFSIZE_4096;
+		sz = EMU_RECBS_BUFSIZE_4096;
 	}
 
 	snd_mtxlock(sc->lock);
@@ -997,23 +1079,23 @@
 		emu_wrptr(sc, 0, ch->sizereg, sz);
 		if (ch->num == 0) {
 			if (sc->audigy) {
-				val = A_ADCCR_LCHANENABLE;
+				val = EMU_ADCCR_LCHANENABLE;
 				if (AFMT_CHANNEL(ch->fmt) > 1)
-					val |= A_ADCCR_RCHANENABLE;
+					val |= EMU_ADCCR_RCHANENABLE;
 				val |= audigy_recval(ch->spd);
 			} else {
-				val = ADCCR_LCHANENABLE;
+				val = EMU_ADCCR_LCHANENABLE;
 				if (AFMT_CHANNEL(ch->fmt) > 1)
-					val |= ADCCR_RCHANENABLE;
+					val |= EMU_ADCCR_RCHANENABLE;
 				val |= emu_recval(ch->spd);
 			}
 
 			emu_wrptr(sc, 0, ch->setupreg, 0);
 			emu_wrptr(sc, 0, ch->setupreg, val);
 		}
-		val = emu_rd(sc, INTE, 4);
+		val = emu_rd(sc, EMU_INTE, 4);
 		val |= ch->irqmask;
-		emu_wr(sc, INTE, val, 4);
+		emu_wr(sc, EMU_INTE, val, 4);
 		break;
 
 	case PCMTRIG_STOP:
@@ -1022,9 +1104,9 @@
 		emu_wrptr(sc, 0, ch->sizereg, 0);
 		if (ch->setupreg)
 			emu_wrptr(sc, 0, ch->setupreg, 0);
-		val = emu_rd(sc, INTE, 4);
+		val = emu_rd(sc, EMU_INTE, 4);
 		val &= ~ch->irqmask;
-		emu_wr(sc, INTE, val, 4);
+		emu_wr(sc, EMU_INTE, val, 4);
 		break;
 
 	case PCMTRIG_EMLDMAWR:
@@ -1122,9 +1204,9 @@
 {
 	int i;
 
-	i = emu_rd(sc, INTE, 4);
-	i |= INTE_MIDIRXENABLE;
-	emu_wr(sc, INTE, i, 4);
+	i = emu_rd(sc, EMU_INTE, 4);
+	i |= EMU_INTE_MIDIRXENABLE;
+	emu_wr(sc, EMU_INTE, i, 4);
 
 	sc->mpu = mpu401_init(&emu_mpu_class, sc, emu_intr2, &sc->mpu_intr);
 }
@@ -1139,52 +1221,52 @@
 
 	snd_mtxlock(sc->lock);
 	while (1) {
-		stat = emu_rd(sc, IPR, 4);
+		stat = emu_rd(sc, EMU_IPR, 4);
 		if (stat == 0)
 			break;
 		ack = 0;
 
 		/* process irq */
-		if (stat & IPR_INTERVALTIMER)
-			ack |= IPR_INTERVALTIMER;
+		if (stat & EMU_IPR_INTERVALTIMER)
+			ack |= EMU_IPR_INTERVALTIMER;
 
-		if (stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL))
-			ack |= stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL);
+		if (stat & (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL))
+			ack |= stat & (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL);
 
-		if (stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL))
-			ack |= stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL);
+		if (stat & (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL))
+			ack |= stat & (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL);
 
-		if (stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL))
-			ack |= stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL);
+		if (stat & (EMU_IPR_MICBUFFULL | EMU_IPR_MICBUFHALFFULL))
+			ack |= stat & (EMU_IPR_MICBUFFULL | EMU_IPR_MICBUFHALFFULL);
 
-		if (stat & IPR_PCIERROR) {
-			ack |= IPR_PCIERROR;
+		if (stat & EMU_PCIERROR) {
+			ack |= EMU_PCIERROR;
 			device_printf(sc->dev, "pci error\n");
 			/* we still get an nmi with ecc ram even if we ack this */
 		}
-		if (stat & IPR_SAMPLERATETRACKER) {
-			ack |= IPR_SAMPLERATETRACKER;
+		if (stat & EMU_IPR_RATETRCHANGE) {
+			ack |= EMU_IPR_RATETRCHANGE;
 #ifdef EMUDEBUG
 			device_printf(sc->dev,
 			    "sample rate tracker lock status change\n");
 #endif
 		}
 
-	    if (stat & IPR_MIDIRECVBUFEMPTY)
+	    if (stat & EMU_IPR_MIDIRECVBUFE)
 		if (sc->mpu_intr) {
 		    (sc->mpu_intr)(sc->mpu);
-		    ack |= IPR_MIDIRECVBUFEMPTY | IPR_MIDITRANSBUFEMPTY;
+		    ack |= EMU_IPR_MIDIRECVBUFE | EMU_IPR_MIDITRANSBUFE;
  		}
 		if (stat & ~ack)
 			device_printf(sc->dev, "dodgy irq: %x (harmless)\n",
 			    stat & ~ack);
 
-		emu_wr(sc, IPR, stat, 4);
+		emu_wr(sc, EMU_IPR, stat, 4);
 
 		if (ack) {
 			snd_mtxunlock(sc->lock);
 
-			if (ack & IPR_INTERVALTIMER) {
+			if (ack & EMU_IPR_INTERVALTIMER) {
 				x = 0;
 				for (i = 0; i < sc->nchans; i++) {
 					if (sc->pch[i].run) {
@@ -1197,15 +1279,15 @@
 			}
 
 
-			if (ack & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) {
+			if (ack & (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL)) {
 				if (sc->rch[0].channel)
 					chn_intr(sc->rch[0].channel);
 			}
-			if (ack & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) {
+			if (ack & (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL)) {
 				if (sc->rch[1].channel)
 					chn_intr(sc->rch[1].channel);
 			}
-			if (ack & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL)) {
+			if (ack & (EMU_IPR_MICBUFFULL | EMU_IPR_MICBUFHALFFULL)) {
 				if (sc->rch[2].channel)
 					chn_intr(sc->rch[2].channel);
 			}
@@ -1378,12 +1460,12 @@
 		audigy_addefxop(sc, 0x0f, 0x0c0, 0x0c0, 0x0cf, 0x0c0, &pc);
 
 	for (i = 0; i < 512; i++)
-		emu_wrptr(sc, 0, A_FXGPREGBASE + i, 0x0);
+		emu_wrptr(sc, 0, EMU_A_FXGPREGBASE + i, 0x0);
 
 	pc = 16;
 
 	/* stop fx processor */
-	emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP);
+	emu_wrptr(sc, 0, EMU_A_DBG, EMU_A_DBG_SINGLE_STEP);
 
 	/* Audigy 2 (EMU10K2) DSP Registers:
 	   FX Bus
@@ -1518,7 +1600,7 @@
 			A_C_00000000, A_EXTIN(A_EXTIN_AC97_R), &pc);
 
 	/* resume normal operations */
-	emu_wrptr(sc, 0, A_DBG, 0);
+	emu_wrptr(sc, 0, EMU_A_DBG, 0);
 }
 
 static void
@@ -1534,7 +1616,7 @@
 	}
 
 	for (i = 0; i < 256; i++)
-		emu_wrptr(sc, 0, FXGPREGBASE + i, 0);
+		emu_wrptr(sc, 0, EMU_FXGPREGBASE + i, 0);
 
 	/* FX-8010 DSP Registers:
 	   FX Bus
@@ -1654,7 +1736,7 @@
 			C_00000000, EXTIN(EXTIN_AC97_R), &pc);
 
 	/* resume normal operations */
-	emu_wrptr(sc, 0, DBG, 0);
+	emu_wrptr(sc, 0, EMU_DBG, 0);
 }
 
 /* Probe and attach the card */
@@ -1665,69 +1747,69 @@
 
 	if (sc->audigy) {
 		/* enable additional AC97 slots */
-		emu_wrptr(sc, 0, AC97SLOT, AC97SLOT_CNTR | AC97SLOT_LFE);
+		emu_wrptr(sc, 0, EMU_AC97SLOT, EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE);
 	}
 
 	/* disable audio and lock cache */
-	emu_wr(sc, HCFG,
-	    HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
+	emu_wr(sc, EMU_HCFG,
+	    EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE,
 	    4);
 
 	/* reset recording buffers */
-	emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
-	emu_wrptr(sc, 0, MICBA, 0);
-	emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
-	emu_wrptr(sc, 0, FXBA, 0);
-	emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
-	emu_wrptr(sc, 0, ADCBA, 0);
+	emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE);
+	emu_wrptr(sc, 0, EMU_MICBA, 0);
+	emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE);
+	emu_wrptr(sc, 0, EMU_FXBA, 0);
+	emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE);
+	emu_wrptr(sc, 0, EMU_ADCBA, 0);
 
 	/* disable channel interrupt */
-	emu_wr(sc, INTE,
-	    INTE_INTERVALTIMERENB | INTE_SAMPLERATETRACKER | INTE_PCIERRORENABLE,
+	emu_wr(sc, EMU_INTE,
+	    EMU_INTE_INTERTIMERENB | EMU_INTE_SAMPLERATER | EMU_INTE_PCIERRENABLE,
 	    4);
-	emu_wrptr(sc, 0, CLIEL, 0);
-	emu_wrptr(sc, 0, CLIEH, 0);
-	emu_wrptr(sc, 0, SOLEL, 0);
-	emu_wrptr(sc, 0, SOLEH, 0);
+	emu_wrptr(sc, 0, EMU_CLIEL, 0);
+	emu_wrptr(sc, 0, EMU_CLIEH, 0);
+	emu_wrptr(sc, 0, EMU_SOLEL, 0);
+	emu_wrptr(sc, 0, EMU_SOLEH, 0);
 
 	/* wonder what these do... */
 	if (sc->audigy) {
-		emu_wrptr(sc, 0, SPBYPASS, 0xf00);
-		emu_wrptr(sc, 0, AC97SLOT, 0x3);
+		emu_wrptr(sc, 0, EMU_SPBYPASS, 0xf00);
+		emu_wrptr(sc, 0, EMU_AC97SLOT, 0x3);
 	}
 
 	/* init envelope engine */
 	for (ch = 0; ch < NUM_G; ch++) {
-		emu_wrptr(sc, ch, DCYSUSV, ENV_OFF);
-		emu_wrptr(sc, ch, IP, 0);
-		emu_wrptr(sc, ch, VTFT, 0xffff);
-		emu_wrptr(sc, ch, CVCF, 0xffff);
-		emu_wrptr(sc, ch, PTRX, 0);
-		emu_wrptr(sc, ch, CPF, 0);
-		emu_wrptr(sc, ch, CCR, 0);
-
-		emu_wrptr(sc, ch, PSST, 0);
-		emu_wrptr(sc, ch, DSL, 0x10);
-		emu_wrptr(sc, ch, CCCA, 0);
-		emu_wrptr(sc, ch, Z1, 0);
-		emu_wrptr(sc, ch, Z2, 0);
-		emu_wrptr(sc, ch, FXRT, 0xd01c0000);
-
-		emu_wrptr(sc, ch, ATKHLDM, 0);
-		emu_wrptr(sc, ch, DCYSUSM, 0);
-		emu_wrptr(sc, ch, IFATN, 0xffff);
-		emu_wrptr(sc, ch, PEFE, 0);
-		emu_wrptr(sc, ch, FMMOD, 0);
-		emu_wrptr(sc, ch, TREMFRQ, 24);	/* 1 Hz */
-		emu_wrptr(sc, ch, FM2FRQ2, 24);	/* 1 Hz */
-		emu_wrptr(sc, ch, TEMPENV, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, ENV_OFF);
+		emu_wrptr(sc, ch, EMU_CHAN_IP, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0xffff);
+		emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0xffff);
+		emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_CPF, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_CCR, 0);
+
+		emu_wrptr(sc, ch, EMU_CHAN_PSST, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_DSL, 0x10);
+		emu_wrptr(sc, ch, EMU_CHAN_CCCA, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_Z1, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_Z2, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_FXRT, 0xd01c0000);
+
+		emu_wrptr(sc, ch, EMU_CHAN_ATKHLDM, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_DCYSUSM, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_IFATN, 0xffff);
+		emu_wrptr(sc, ch, EMU_CHAN_PEFE, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_FMMOD, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_TREMFRQ, 24);	/* 1 Hz */
+		emu_wrptr(sc, ch, EMU_CHAN_FM2FRQ2, 24);	/* 1 Hz */
+		emu_wrptr(sc, ch, EMU_CHAN_TEMPENV, 0);
 
 		/*** these are last so OFF prevents writing ***/
-		emu_wrptr(sc, ch, LFOVAL2, 0);
-		emu_wrptr(sc, ch, LFOVAL1, 0);
-		emu_wrptr(sc, ch, ATKHLDV, 0);
-		emu_wrptr(sc, ch, ENVVOL, 0);
-		emu_wrptr(sc, ch, ENVVAL, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_LFOVAL2, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_LFOVAL1, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_ATKHLDV, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_ENVVOL, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_ENVVAL, 0);
 
 		if (sc->audigy) {
 			/* audigy cards need this to initialize correctly */
@@ -1736,9 +1818,9 @@
 			emu_wrptr(sc, ch, 0x4e, 0);
 			emu_wrptr(sc, ch, 0x4f, 0);
 			/* set default routing */
-			emu_wrptr(sc, ch, A_FXRT1, 0x03020100);
-			emu_wrptr(sc, ch, A_FXRT2, 0x3f3f3f3f);
-			emu_wrptr(sc, ch, A_SENDAMOUNTS, 0);
+			emu_wrptr(sc, ch, EMU_A_CHAN_FXRT1, 0x03020100);
+			emu_wrptr(sc, ch, EMU_A_CHAN_FXRT2, 0x3f3f3f3f);
+			emu_wrptr(sc, ch, EMU_A_CHAN_SENDAMOUNTS, 0);
 		}
 
 		sc->voice[ch].vnum = ch;
@@ -1769,13 +1851,13 @@
 	 *  AN                = 0     (Audio data)
 	 *  P                 = 0     (Consumer)
 	 */
-	spcs = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
-	    SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
-	    SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
-	    SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
-	emu_wrptr(sc, 0, SPCS0, spcs);
-	emu_wrptr(sc, 0, SPCS1, spcs);
-	emu_wrptr(sc, 0, SPCS2, spcs);
+	spcs = EMU_SPCS_CLKACCY_1000PPM | EMU_SPCS_SAMPLERATE_48 |
+	    EMU_SPCS_CHANNELNUM_LEFT | EMU_SPCS_SOURCENUM_UNSPEC |
+	    EMU_SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
+	    EMU_SPCS_EMPHASIS_NONE | EMU_SPCS_COPYRIGHT;
+	emu_wrptr(sc, 0, EMU_SPCS0, spcs);
+	emu_wrptr(sc, 0, EMU_SPCS1, spcs);
+	emu_wrptr(sc, 0, EMU_SPCS2, spcs);
 
 	if (!sc->audigy)
 		emu_initefx(sc);
@@ -1786,8 +1868,8 @@
 		u_int32_t tmp;
 
 		/* Setup SRCMulti_I2S SamplingRate */
-		tmp = emu_rdptr(sc, 0, A_SPDIF_SAMPLERATE) & 0xfffff1ff;
-		emu_wrptr(sc, 0, A_SPDIF_SAMPLERATE, tmp | 0x400);
+		tmp = emu_rdptr(sc, 0, EMU_A_SPDIF_SAMPLERATE) & 0xfffff1ff;
+		emu_wrptr(sc, 0, EMU_A_SPDIF_SAMPLERATE, tmp | 0x400);
 
 		/* Setup SRCSel (Enable SPDIF, I2S SRCMulti) */
 		emu_wr(sc, 0x20, 0x00600000, 4);
@@ -1816,13 +1898,13 @@
 	for (i = 0; i < EMUMAXPAGES; i++)
 		sc->mem.ptb_pages[i] = tmp | i;
 
-	emu_wrptr(sc, 0, PTB, (sc->mem.ptb_pages_addr));
-	emu_wrptr(sc, 0, TCB, 0);	/* taken from original driver */
-	emu_wrptr(sc, 0, TCBS, 0);	/* taken from original driver */
+	emu_wrptr(sc, 0, EMU_PTB, (sc->mem.ptb_pages_addr));
+	emu_wrptr(sc, 0, EMU_TCB, 0);	/* taken from original driver */
+	emu_wrptr(sc, 0, EMU_TCBS, 0);	/* taken from original driver */
 
 	for (ch = 0; ch < NUM_G; ch++) {
-		emu_wrptr(sc, ch, MAPA, tmp | MAP_PTI_MASK);
-		emu_wrptr(sc, ch, MAPB, tmp | MAP_PTI_MASK);
+		emu_wrptr(sc, ch, EMU_CHAN_MAPA, tmp | EMU_CHAN_MAP_PTI_MASK);
+		emu_wrptr(sc, ch, EMU_CHAN_MAPB, tmp | EMU_CHAN_MAP_PTI_MASK);
 	}
 
 	/* emu_memalloc(sc, EMUPAGESIZE); */
@@ -1850,19 +1932,19 @@
 	 */
 
 	if (sc->audigy) {
-		tmp = HCFG_AUTOMUTE | HCFG_JOYENABLE;
+		tmp = EMU_HCFG_AUTOMUTE | EMU_HCFG_JOYENABLE;
 		if (sc->audigy2)	/* Audigy 2 */
-			tmp = HCFG_AUDIOENABLE | HCFG_AC3ENABLE_CDSPDIF |
-			    HCFG_AC3ENABLE_GPSPDIF;
-		emu_wr(sc, HCFG, tmp, 4);
+			tmp = EMU_HCFG_AUDIOENABLE | EMU_HCFG_AC3ENABLE_CDSPDIF |
+			    EMU_HCFG_AC3ENABLE_GPSPDIF;
+		emu_wr(sc, EMU_HCFG, tmp, 4);
 
 		audigy_initefx(sc);
 
 		/* from ALSA initialization code: */
 
 		/* enable audio and disable both audio/digital outputs */
-		emu_wr(sc, HCFG, emu_rd(sc, HCFG, 4) | HCFG_AUDIOENABLE, 4);
-		emu_wr(sc, A_IOCFG, emu_rd(sc, A_IOCFG, 4) & ~A_IOCFG_GPOUT_AD,
+		emu_wr(sc, EMU_HCFG, emu_rd(sc, EMU_HCFG, 4) | EMU_HCFG_AUDIOENABLE, 4);
+		emu_wr(sc, EMU_A_IOCFG, emu_rd(sc, EMU_A_IOCFG, 4) & ~EMU_A_IOCFG_GPOUT_AD,
 		    4);
 		if (sc->audigy2) {	/* Audigy 2 */
 			/* Unmute Analog.
@@ -1870,27 +1952,27 @@
 			 * init Alice3 I2SOut beyond 48kHz.
 			 * So, sequence is important.
 			 */
-			emu_wr(sc, A_IOCFG,
-			    emu_rd(sc, A_IOCFG, 4) | A_IOCFG_GPOUT_A, 4);
+			emu_wr(sc, EMU_A_IOCFG,
+			    emu_rd(sc, EMU_A_IOCFG, 4) | EMU_A_IOCFG_GPOUT_A, 4);
 		}
 	} else {
 		/* EMU10K1 initialization code */
-		tmp = HCFG_AUDIOENABLE | HCFG_LOCKTANKCACHE_MASK 
-		    | HCFG_AUTOMUTE;
+		tmp = EMU_HCFG_AUDIOENABLE | EMU_HCFG_LOCKTANKCACHE_MASK 
+		    | EMU_HCFG_AUTOMUTE;
 		if (sc->rev >= 6)
-			tmp |= HCFG_JOYENABLE;
+			tmp |= EMU_HCFG_JOYENABLE;
 
-		emu_wr(sc, HCFG, tmp, 4);
+		emu_wr(sc, EMU_HCFG, tmp, 4);
 
 		/* TOSLink detection */
 		sc->tos_link = 0;
-		tmp = emu_rd(sc, HCFG, 4);
-		if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
-			emu_wr(sc, HCFG, tmp | HCFG_GPOUT1, 4);
+		tmp = emu_rd(sc, EMU_HCFG, 4);
+		if (tmp & (EMU_HCFG_GPINPUT0 | EMU_HCFG_GPINPUT1)) {
+			emu_wr(sc, EMU_HCFG, tmp | EMU_HCFG_GPOUT1, 4);
 			DELAY(50);
-			if (tmp != (emu_rd(sc, HCFG, 4) & ~HCFG_GPOUT1)) {
+			if (tmp != (emu_rd(sc, EMU_HCFG, 4) & ~EMU_HCFG_GPOUT1)) {
 				sc->tos_link = 1;
-				emu_wr(sc, HCFG, tmp, 4);
+				emu_wr(sc, EMU_HCFG, tmp, 4);
 			}
 		}
 	}
@@ -1903,42 +1985,42 @@
 {
 	u_int32_t ch;
 
-	emu_wr(sc, INTE, 0, 4);
+	emu_wr(sc, EMU_INTE, 0, 4);
 	for (ch = 0; ch < NUM_G; ch++)
-		emu_wrptr(sc, ch, DCYSUSV, ENV_OFF);
+		emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, ENV_OFF);
 	for (ch = 0; ch < NUM_G; ch++) {
-		emu_wrptr(sc, ch, VTFT, 0);
-		emu_wrptr(sc, ch, CVCF, 0);
-		emu_wrptr(sc, ch, PTRX, 0);
-		emu_wrptr(sc, ch, CPF, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_CPF, 0);
 	}
 
 	if (sc->audigy) {	/* stop fx processor */
-		emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP);
+		emu_wrptr(sc, 0, EMU_A_DBG, EMU_A_DBG_SINGLE_STEP);
 	}
 
 	/* disable audio and lock cache */
-	emu_wr(sc, HCFG,
-	    HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
+	emu_wr(sc, EMU_HCFG,
+	    EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE,
 	    4);
 
-	emu_wrptr(sc, 0, PTB, 0);
+	emu_wrptr(sc, 0, EMU_PTB, 0);
 	/* reset recording buffers */
-	emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
-	emu_wrptr(sc, 0, MICBA, 0);
-	emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
-	emu_wrptr(sc, 0, FXBA, 0);
-	emu_wrptr(sc, 0, FXWC, 0);
-	emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
-	emu_wrptr(sc, 0, ADCBA, 0);
-	emu_wrptr(sc, 0, TCB, 0);
-	emu_wrptr(sc, 0, TCBS, 0);
+	emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE);
+	emu_wrptr(sc, 0, EMU_MICBA, 0);
+	emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE);
+	emu_wrptr(sc, 0, EMU_FXBA, 0);
+	emu_wrptr(sc, 0, EMU_FXWC, 0);
+	emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE);
+	emu_wrptr(sc, 0, EMU_ADCBA, 0);
+	emu_wrptr(sc, 0, EMU_TCB, 0);
+	emu_wrptr(sc, 0, EMU_TCBS, 0);
 
 	/* disable channel interrupt */
-	emu_wrptr(sc, 0, CLIEL, 0);
-	emu_wrptr(sc, 0, CLIEH, 0);
-	emu_wrptr(sc, 0, SOLEL, 0);
-	emu_wrptr(sc, 0, SOLEH, 0);
+	emu_wrptr(sc, 0, EMU_CLIEL, 0);
+	emu_wrptr(sc, 0, EMU_CLIEH, 0);
+	emu_wrptr(sc, 0, EMU_SOLEL, 0);
+	emu_wrptr(sc, 0, EMU_SOLEH, 0);
 
 	/* init envelope engine */
 	if (!SLIST_EMPTY(&sc->mem.blocks))
@@ -1997,7 +2079,7 @@
 	sc->audigy = sc->type == EMU10K2_PCI_ID || sc->type == EMU10K3_PCI_ID;
 	sc->audigy2 = (sc->audigy && sc->rev == 0x04);
 	sc->nchans = sc->audigy ? 8 : 4;
-	sc->addrmask = sc->audigy ? A_PTR_ADDRESS_MASK : PTR_ADDRESS_MASK;
+	sc->addrmask = sc->audigy ? EMU_A_PTR_ADDR_MASK : EMU_PTR_ADDR_MASK;
 
 	data = pci_read_config(dev, PCIR_COMMAND, 2);
 	data |= (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN);
diff -ruN dev/sound/pci.orig/emu10k1reg.h dev/sound/pci/emu10k1reg.h
--- dev/sound/pci.orig/emu10k1reg.h	1970-01-01 00:00:00.000000000 +0000
+++ dev/sound/pci/emu10k1reg.h	2011-01-10 14:46:16.000000000 +0000
@@ -0,0 +1,688 @@
+/*	$NetBSD: emuxkireg.h,v 1.8 2008/04/28 20:23:54 martin Exp $	*/
+
+/*-
+ * Copyright (c) 2001 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Yannick Montulet.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _DEV_SOUND_PCI_EMU10K1REG_H_
+#define _DEV_SOUND_PCI_EMU10K1REG_H_
+
+/*
+ * Register values for Creative EMU10000. The register values have been
+ * taken from GPLed SBLive! header file published by Creative. The comments
+ * have been stripped to avoid GPL pollution in kernel. The Creative version
+ * including comments is available in Linux 2.4.* kernel as file
+ *	drivers/sound/emu10k1/8010.h
+ */
+
+/*
+ * Audigy specific registers contain an '_A_'
+ * Audigy2 specific registers contain an '_A2_'
+ */
+
+#define	EMU_MKSUBREG(sz, idx, reg)	(((sz) << 24) | ((idx) << 16) | (reg))
+
+#define EMU_PTR	0x00
+#define  EMU_PTR_CHNO_MASK	0x0000003f
+#define  EMU_PTR_ADDR_MASK	0x07ff0000
+#define  EMU_A_PTR_ADDR_MASK	0x0fff0000
+
+#define EMU_DATA	0x04
+
+#define EMU_IPR	0x08
+#define  EMU_IPR_RATETRCHANGE	0x01000000
+#define  EMU_IPR_FXDSP		0x00800000
+#define  EMU_IPR_FORCEINT	0x00400000
+#define  EMU_PCIERROR		0x00200000
+#define  EMU_IPR_VOLINCR	0x00100000
+#define  EMU_IPR_VOLDECR	0x00080000
+#define  EMU_IPR_MUTE		0x00040000
+#define  EMU_IPR_MICBUFFULL	0x00020000
+#define  EMU_IPR_MICBUFHALFFULL	0x00010000
+#define  EMU_IPR_ADCBUFFULL	0x00008000
+#define  EMU_IPR_ADCBUFHALFFULL	0x00004000
+#define  EMU_IPR_EFXBUFFULL	0x00002000
+#define  EMU_IPR_EFXBUFHALFFULL	0x00001000
+#define  EMU_IPR_GPSPDIFSTCHANGE 0x00000800
+#define  EMU_IPR_CDROMSTCHANGE	0x00000400
+#define  EMU_IPR_INTERVALTIMER	0x00000200
+#define  EMU_IPR_MIDITRANSBUFE	0x00000100
+#define  EMU_IPR_MIDIRECVBUFE	0x00000080
+#define  EMU_IPR_A_MIDITRANSBUFE2 0x10000000
+#define  EMU_IPR_A_MIDIRECBUFE2	0x08000000
+#define  EMU_IPR_CHANNELLOOP	0x00000040
+#define  EMU_IPR_CHNOMASK	0x0000003f
+
+#define EMU_INTE	0x0c
+
+#define  EMU_INTE_VSB_MASK	0xc0000000
+#define   EMU_INTE_VSB_220	0x00000000
+#define   EMU_INTE_VSB_240	0x40000000
+#define   EMU_INTE_VSB_260	0x80000000
+#define   EMU_INTE_VSB_280	0xc0000000
+
+#define  EMU_INTE_VMPU_MASK	0x30000000
+#define   EMU_INTE_VMPU_300	0x00000000
+#define   EMU_INTE_VMPU_310	0x10000000
+#define   EMU_INTE_VMPU_320	0x20000000
+#define   EMU_INTE_VMPU_330	0x30000000
+#define  EMU_INTE_MDMAENABLE	0x08000000
+#define  EMU_INTE_SDMAENABLE	0x04000000
+#define  EMU_INTE_MPICENABLE	0x02000000
+#define  EMU_INTE_SPICENABLE	0x01000000
+#define  EMU_INTE_VSBENABLE	0x00800000
+#define  EMU_INTE_ADLIBENABLE	0x00400000
+#define  EMU_INTE_MPUENABLE	0x00200000
+#define  EMU_INTE_FORCEINT	0x00100000
+#define  EMU_INTE_MRHANDENABLE	0x00080000
+#define  EMU_INTE_SAMPLERATER	0x00002000
+#define  EMU_INTE_FXDSPENABLE	0x00001000
+#define  EMU_INTE_PCIERRENABLE	0x00000800
+#define  EMU_INTE_VOLINCRENABLE	0x00000400
+#define  EMU_INTE_VOLDECRENABLE	0x00000200
+#define  EMU_INTE_MUTEENABLE	0x00000100
+#define  EMU_INTE_MICBUFENABLE	0x00000080
+#define  EMU_INTE_ADCBUFENABLE	0x00000040
+#define  EMU_INTE_EFXBUFENABLE	0x00000020
+#define  EMU_INTE_GPSPDIFENABLE	0x00000010
+#define  EMU_INTE_CDSPDIFENABLE	0x00000008
+#define  EMU_INTE_INTERTIMERENB	0x00000004
+#define  EMU_INTE_MIDITXENABLE	0x00000002
+#define  EMU_INTE_MIDIRXENABLE	0x00000001
+#define  EMU_INTE_A_MIDITXENABLE2 0x00020000
+#define  EMU_INTE_A_MIDIRXENABLE2 0x00010000
+
+#define EMU_WC	0x10
+#define  EMU_WC_SAMPLECOUNTER_MASK	0x03FFFFC0
+#define  EMU_WC_SAMPLECOUNTER		EMU_MKSUBREG(20, 6, EMU_WC)
+#define  EMU_WC_CURRENTCHANNEL		0x0000003F
+
+#define EMU_HCFG	0x14
+#define  EMU_HCFG_LEGACYFUNC_MASK	0xe0000000
+#define  EMU_HCFG_LEGACYFUNC_MPU	0x00000000
+#define  EMU_HCFG_LEGACYFUNC_SB		0x40000000
+#define  EMU_HCFG_LEGACYFUNC_AD		0x60000000
+#define  EMU_HCFG_LEGACYFUNC_MPIC	0x80000000
+#define  EMU_HCFG_LEGACYFUNC_MDMA	0xa0000000
+#define  EMU_HCFG_LEGACYFUNC_SPCI	0xc0000000
+#define  EMU_HCFG_LEGACYFUNC_SDMA	0xe0000000
+#define  EMU_HCFG_IOCAPTUREADDR		0x1f000000
+#define  EMU_HCFG_LEGACYWRITE		0x00800000
+#define  EMU_HCFG_LEGACYWORD		0x00400000
+#define  EMU_HCFG_LEGACYINT		0x00200000
+
+#define  EMU_HCFG_CODECFMT_MASK		0x00070000
+#define  EMU_HCFG_CODECFMT_AC97		0x00000000
+#define  EMU_HCFG_CODECFMT_I2S		0x00010000
+#define  EMU_HCFG_GPINPUT0		0x00004000
+#define  EMU_HCFG_GPINPUT1		0x00002000
+#define  EMU_HCFG_GPOUTPUT_MASK		0x00001c00
+#define  EMU_HCFG_JOYENABLE		0x00000200
+#define  EMU_HCFG_PHASETRACKENABLE	0x00000100
+#define  EMU_HCFG_AC3ENABLE_MASK	0x000000e0
+#define  EMU_HCFG_AC3ENABLE_ZVIDEO	0x00000080
+#define  EMU_HCFG_AC3ENABLE_CDSPDIF	0x00000040
+#define  EMU_HCFG_AC3ENABLE_GPSPDIF	0x00000020
+#define  EMU_HCFG_AUTOMUTE		0x00000010
+#define  EMU_HCFG_LOCKSOUNDCACHE	0x00000008
+#define  EMU_HCFG_LOCKTANKCACHE_MASK	0x00000004
+#define  EMU_HCFG_LOCKTANKCACHE		EMU_MKSUBREG(1, 2, EMU_HCFG)
+#define  EMU_HCFG_MUTEBUTTONENABLE	0x00000002
+#define  EMU_HCFG_AUDIOENABLE		0x00000001
+
+#define EMU_MUDATA	0x18
+#define EMU_MUCMD	0x19
+#define  EMU_MUCMD_RESET		0xff
+#define  EMU_MUCMD_ENTERUARTMODE	0x3f
+
+#define EMU_MUSTAT	EMU_MUCMD
+#define  EMU_MUSTAT_IRDYN		0x80
+#define  EMU_MUSTAT_ORDYN		0x40
+
+#define EMU_A_IOCFG			0x18
+#define EMU_A_GPINPUT_MASK		0xff00
+#define EMU_A_GPOUTPUT_MASK		0x00ff
+#define EMU_A_IOCFG_GPOUT0		0x0040
+#define EMU_A_IOCFG_GPOUT1		0x0004
+
+#define EMU_TIMER	0x1a
+#define  EMU_TIMER_RATE_MASK	0x000003ff
+#define  EMU_TIMER_RATE		EMU_MKSUBREG(10, 0, EMU_TIMER)
+
+#define EMU_AC97DATA	0x1c
+#define EMU_AC97ADDR	0x1e
+#define  EMU_AC97ADDR_RDY	0x80
+#define  EMU_AC97ADDR_ADDR	0x7f
+
+#define EMU_A2_PTR		0x20
+#define EMU_A2_DATA		0x24
+
+#define EMU_A2_SRCSEL			0x600000
+#define EMU_A2_SRCSEL_ENABLE_SPDIF	0x00000004
+#define EMU_A2_SRCSEL_ENABLE_SRCMULTI	0x00000010
+#define EMU_A2_SRCMULTI			0x6e0000
+#define EMU_A2_SRCMULTI_ENABLE_INPUT	0xff00ff00
+
+/* -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- */
+
+#define EMU_CHAN_CPF	0x00
+
+#define  EMU_CHAN_CPF_PITCH_MASK	0xffff0000
+#define  EMU_CHAN_CPF_PITCH	EMU_MKSUBREG(16, 16, EMU_CHAN_CPF)
+#define  EMU_CHAN_CPF_STEREO_MASK	0x00008000
+#define  EMU_CHAN_CPF_STEREO	EMU_MKSUBREG(1, 15, EMU_CHAN_CPF)
+#define  EMU_CHAN_CPF_STOP_MASK	0x00004000
+#define  EMU_CHAN_CPF_FRACADDRESS_MASK	0x00003fff
+
+
+#define EMU_CHAN_PTRX	0x01
+#define  EMU_CHAN_PTRX_PITCHTARGET_MASK	0xffff0000
+#define  EMU_CHAN_PTRX_PITCHTARGET	EMU_MKSUBREG(16, 16, EMU_CHAN_PTRX)
+#define  EMU_CHAN_PTRX_FXSENDAMOUNT_A_MASK	0x0000ff00
+#define  EMU_CHAN_PTRX_FXSENDAMOUNT_A EMU_MKSUBREG(8, 8, EMU_CHAN_PTRX)
+#define  EMU_CHAN_PTRX_FXSENDAMOUNT_B_MASK	0x000000ff
+#define  EMU_CHAN_PTRX_FXSENDAMOUNT_B EMU_MKSUBREG(8, 0, EMU_CHAN_PTRX)
+
+#define EMU_CHAN_CVCF	0x02
+#define  EMU_CHAN_CVCF_CURRVOL_MASK	0xffff0000
+#define  EMU_CHAN_CVCF_CURRVOL	EMU_MKSUBREG(16, 16, EMU_CHAN_CVCF)
+#define  EMU_CHAN_CVCF_CURRFILTER_MASK	0x0000ffff
+#define  EMU_CHAN_CVCF_CURRFILTER EMU_MKSUBREG(16, 0, EMU_CHAN_CVCF)
+
+#define EMU_CHAN_VTFT	0x03
+#define  EMU_CHAN_VTFT_VOLUMETARGET_MASK	0xffff0000
+#define  EMU_CHAN_VTFT_VOLUMETARGET	EMU_MKSUBREG(16, 16, EMU_CHAN_VTFT)
+#define  EMU_CHAN_VTFT_FILTERTARGET_MASK	0x0000ffff
+#define	 EMU_CHAN_VTFT_FILTERTARGET	EMU_MKSUBREG(16, 0, EMU_CHAN_VTFT)
+
+#define EMU_CHAN_Z1	0x05
+#define EMU_CHAN_Z2	0x04
+
+#define EMU_CHAN_PSST	0x06
+#define  EMU_CHAN_PSST_FXSENDAMOUNT_C_MASK	0xff000000
+#define  EMU_CHAN_PSST_FXSENDAMOUNT_C EMU_MKSUBREG(8, 24, EMU_CHAN_PSST)
+#define  EMU_CHAN_PSST_LOOPSTARTADDR_MASK	0x00ffffff
+#define  EMU_CHAN_PSST_LOOPSTARTADDR  EMU_MKSUBREG(24, 0, EMU_CHAN_PSST)
+
+#define EMU_CHAN_DSL	0x07
+#define  EMU_CHAN_DSL_FXSENDAMOUNT_D_MASK	0xff000000
+#define  EMU_CHAN_DSL_FXSENDAMOUNT_D  EMU_MKSUBREG(8, 24, EMU_CHAN_DSL)
+#define  EMU_CHAN_DSL_LOOPENDADDR_MASK	0x00ffffff
+#define  EMU_CHAN_DSL_LOOPENDADDR	 EMU_MKSUBREG(24, 0, EMU_CHAN_DSL)
+
+#define EMU_CHAN_CCCA	0x08
+#define  EMU_CHAN_CCCA_RESONANCE		0xf0000000
+#define  EMU_CHAN_CCCA_INTERPROMMASK		0x0e000000
+#define   EMU_CHAN_CCCA_INTERPROM_0		0x00000000
+#define   EMU_CHAN_CCCA_INTERPROM_1		0x02000000
+#define   EMU_CHAN_CCCA_INTERPROM_2		0x04000000
+#define   EMU_CHAN_CCCA_INTERPROM_3		0x06000000
+#define   EMU_CHAN_CCCA_INTERPROM_4		0x08000000
+#define   EMU_CHAN_CCCA_INTERPROM_5		0x0a000000
+#define   EMU_CHAN_CCCA_INTERPROM_6		0x0c000000
+#define   EMU_CHAN_CCCA_INTERPROM_7		0x0e000000
+#define   EMU_CHAN_CCCA_8BITSELECT		0x01000000
+#define  EMU_CHAN_CCCA_CURRADDR_MASK		0x00ffffff
+#define  EMU_CHAN_CCCA_CURRADDR	EMU_MKSUBREG(24, 0, EMU_CHAN_CCCA)
+
+#define EMU_CHAN_CCR	0x09
+#define  EMU_CHAN_CCR_CACHEINVALIDSIZE_MASK	0xfe000000
+#define  EMU_CHAN_CCR_CACHEINVALIDSIZE EMU_MKSUBREG(7, 25, EMU_CHAN_CCR)
+#define  EMU_CHAN_CCR_CACHELOOPFLAG		0x01000000
+#define  EMU_CHAN_CCR_INTERLEAVEDSAMPLES	0x00800000
+#define  EMU_CHAN_CCR_WORDSIZEDSAMPLES	0x00400000
+#define  EMU_CHAN_CCR_READADDRESS_MASK	0x003f0000
+#define  EMU_CHAN_CCR_READADDRESS	EMU_MKSUBREG(6, 16, EMU_CHAN_CCR)
+#define  EMU_CHAN_CCR_LOOPINVALSIZE	0x0000fe00
+#define  EMU_CHAN_CCR_LOOPFLAG		0x00000100
+#define  EMU_CHAN_CCR_CACHELOOPADDRHI	0x000000ff
+
+#define EMU_CHAN_CLP	0x0a
+#define  EMU_CHAN_CLP_CACHELOOPADDR	0x0000ffff
+
+#define EMU_CHAN_FXRT	0x0b
+#define  EMU_CHAN_FXRT_CHANNELA		0x000f0000
+#define  EMU_CHAN_FXRT_CHANNELB		0x00f00000
+#define  EMU_CHAN_FXRT_CHANNELC		0x0f000000
+#define  EMU_CHAN_FXRT_CHANNELD		0xf0000000
+
+#define EMU_CHAN_MAPA	0x0c
+#define EMU_CHAN_MAPB	0x0d
+
+#define  EMU_CHAN_MAP_PTE_MASK		0xffffe000
+#define  EMU_CHAN_MAP_PTI_MASK		0x00001fff
+
+
+#define EMU_CHAN_ENVVOL	0x10
+#define  EMU_CHAN_ENVVOL_MASK		0x0000ffff
+
+
+#define EMU_CHAN_ATKHLDV 0x11
+#define  EMU_CHAN_ATKHLDV_PHASE0	0x00008000
+#define  EMU_CHAN_ATKHLDV_HOLDTIME_MASK	0x00007f00
+#define  EMU_CHAN_ATKHLDV_ATTACKTIME_MASK	0x0000007f
+
+
+#define EMU_CHAN_DCYSUSV	0x12
+#define  EMU_CHAN_DCYSUSV_PHASE1_MASK		0x00008000
+#define  EMU_CHAN_DCYSUSV_SUSTAINLEVEL_MASK	0x00007f00
+#define  EMU_CHAN_DCYSUSV_CHANNELENABLE_MASK	0x00000080
+#define  EMU_CHAN_DCYSUSV_DECAYTIME_MASK	0x0000007f
+
+
+#define EMU_CHAN_LFOVAL1	0x13
+#define  EMU_CHAN_LFOVAL_MASK		0x0000ffff
+
+#define EMU_CHAN_ENVVAL		0x14
+#define  EMU_CHAN_ENVVAL_MASK		0x0000ffff
+
+#define EMU_CHAN_ATKHLDM	0x15
+#define  EMU_CHAN_ATKHLDM_PHASE0	0x00008000
+#define  EMU_CHAN_ATKHLDM_HOLDTIME	0x00007f00
+#define  EMU_CHAN_ATKHLDM_ATTACKTIME	0x0000007f
+
+#define EMU_CHAN_DCYSUSM	0x16
+#define  EMU_CHAN_DCYSUSM_PHASE1_MASK		0x00008000
+#define  EMU_CHAN_DCYSUSM_SUSTAINLEVEL_MASK	0x00007f00
+#define  EMU_CHAN_DCYSUSM_DECAYTIME_MASK	0x0000007f
+
+#define EMU_CHAN_LFOVAL2	0x17
+#define  EMU_CHAN_LFOVAL2_MASK		0x0000ffff
+
+#define EMU_CHAN_IP		0x18
+#define  EMU_CHAN_IP_MASK			0x0000ffff
+#define  EMU_CHAN_IP_UNITY			0x0000e000
+
+#define EMU_CHAN_IFATN		0x19
+#define  EMU_CHAN_IFATN_FILTERCUTOFF_MASK	0x0000ff00
+#define  EMU_CHAN_IFATN_FILTERCUTOFF EMU_MKSUBREG(8, 8,	EMU_CHAN_IFATN)
+#define  EMU_CHAN_IFATN_ATTENUATION_MASK	0x000000ff
+#define  EMU_CHAN_IFATN_ATTENUATION	 EMU_MKSUBREG(8, 0, EMU_CHAN_IFATN)
+
+#define EMU_CHAN_PEFE		0x1a
+#define  EMU_CHAN_PEFE_PITCHAMOUNT_MASK	0x0000ff00
+#define  EMU_CHAN_PEFE_PITCHAMOUNT	EMU_MKSUBREG(8, 8, EMU_CHAN_PEFE)
+#define  EMU_CHAN_PEFE_FILTERAMOUNT_MASK	0x000000ff
+#define  EMU_CHAN_PEFE_FILTERAMOUNT	EMU_MKSUBREG(8, 0, EMU_CHAN_PEFE)
+
+#define EMU_CHAN_FMMOD	0x1b
+#define  EMU_CHAN_FMMOD_MODVIBRATO	0x0000ff00
+#define EMU_CHAN_FMMOD_MOFILTER		0x000000ff
+
+#define EMU_CHAN_TREMFRQ	0x1c
+#define  EMU_CHAN_TREMFRQ_DEPTH		0x0000ff00
+
+#define EMU_CHAN_FM2FRQ2	0x1d
+#define  EMU_CHAN_FM2FRQ2_DEPTH		0x0000ff00
+#define  EMU_CHAN_FM2FRQ2_FREQUENCY	0x000000ff
+
+#define EMU_CHAN_TEMPENV	0x1e
+#define  EMU_CHAN_TEMPENV_MASK		0x0000ffff
+
+#define EMU_CHAN_CD0	0x20
+#define EMU_CHAN_CD1	0x21
+#define EMU_CHAN_CD2	0x22
+#define EMU_CHAN_CD3	0x23
+#define EMU_CHAN_CD4	0x24
+#define EMU_CHAN_CD5	0x25
+#define EMU_CHAN_CD6	0x26
+#define EMU_CHAN_CD7	0x27
+#define EMU_CHAN_CD8	0x28
+#define EMU_CHAN_CD9	0x29
+#define EMU_CHAN_CDA	0x2a
+#define EMU_CHAN_CDB	0x2b
+#define EMU_CHAN_CDC	0x2c
+#define EMU_CHAN_CDD	0x2d
+#define EMU_CHAN_CDE	0x2e
+#define EMU_CHAN_CDF	0x2f
+
+/* -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- */
+
+#define EMU_PTB		0x40
+#define  EMU_PTB_MASK			0xfffff000
+
+#define EMU_TCB		0x41
+#define  EMU_TCB_MASK			0xfffff000
+
+#define EMU_ADCCR	0x42
+#define  EMU_ADCCR_RCHANENABLE		0x00000010
+#define  EMU_A_ADCCR_RCHANENABLE	0x00000020
+#define  EMU_ADCCR_LCHANENABLE		0x00000008
+#define  EMU_A_ADCCR_LCHANENABLE	0x00000010
+#define  EMU_ADCCR_SAMPLERATE_MASK	0x00000007
+#define  EMU_A_ADCCR_SAMPLERATE_MASK    0x0000000f
+#define   EMU_ADCCR_SAMPLERATE_48	0x00000000
+#define   EMU_ADCCR_SAMPLERATE_44	0x00000001
+#define   EMU_ADCCR_SAMPLERATE_32	0x00000002
+#define   EMU_ADCCR_SAMPLERATE_24	0x00000003
+#define   EMU_ADCCR_SAMPLERATE_22	0x00000004
+#define   EMU_ADCCR_SAMPLERATE_16	0x00000005
+#define   EMU_A_ADCCR_SAMPLERATE_12	0x00000006
+#define   EMU_ADCCR_SAMPLERATE_11	0x00000006
+#define   EMU_A_ADCCR_SAMPLERATE_11	0x00000007
+#define   EMU_ADCCR_SAMPLERATE_8	0x00000007
+#define   EMU_A_ADCCR_SAMPLERATE_8	0x00000008
+
+#define EMU_FXWC	0x43
+#define EMU_TCBS	0x44
+#define  EMU_TCBS_MASK			0x00000007
+#define   EMU_TCBS_BUFFSIZE_16K		0x00000000
+#define   EMU_TCBS_BUFFSIZE_32K		0x00000001
+#define   EMU_TCBS_BUFFSIZE_64K		0x00000002
+#define   EMU_TCBS_BUFFSIZE_128K	0x00000003
+#define   EMU_TCBS_BUFFSIZE_256K	0x00000004
+#define   EMU_TCBS_BUFFSIZE_512K	0x00000005
+#define   EMU_TCBS_BUFFSIZE_1024K	0x00000006
+#define   EMU_TCBS_BUFFSIZE_2048K	0x00000007
+
+#define EMU_MICBA	0x45
+#define EMU_ADCBA	0x46
+#define EMU_FXBA	0x47
+#define  EMU_RECBA_MASK			0xfffff000
+
+#define EMU_MICBS	0x49
+#define EMU_ADCBS	0x4a
+#define EMU_FXBS	0x4b
+#define  EMU_RECBS_BUFSIZE_NONE		0x00000000
+#define  EMU_RECBS_BUFSIZE_384		0x00000001
+#define  EMU_RECBS_BUFSIZE_448		0x00000002
+#define  EMU_RECBS_BUFSIZE_512		0x00000003
+#define  EMU_RECBS_BUFSIZE_640		0x00000004
+#define  EMU_RECBS_BUFSIZE_768		0x00000005
+#define  EMU_RECBS_BUFSIZE_896		0x00000006
+#define  EMU_RECBS_BUFSIZE_1024		0x00000007
+#define  EMU_RECBS_BUFSIZE_1280		0x00000008
+#define  EMU_RECBS_BUFSIZE_1536		0x00000009
+#define  EMU_RECBS_BUFSIZE_1792		0x0000000a
+#define  EMU_RECBS_BUFSIZE_2048		0x0000000b
+#define  EMU_RECBS_BUFSIZE_2560		0x0000000c
+#define  EMU_RECBS_BUFSIZE_3072		0x0000000d
+#define  EMU_RECBS_BUFSIZE_3584		0x0000000e
+#define  EMU_RECBS_BUFSIZE_4096		0x0000000f
+#define  EMU_RECBS_BUFSIZE_5120		0x00000010
+#define  EMU_RECBS_BUFSIZE_6144		0x00000011
+#define  EMU_RECBS_BUFSIZE_7168		0x00000012
+#define  EMU_RECBS_BUFSIZE_8192		0x00000013
+#define  EMU_RECBS_BUFSIZE_10240	0x00000014
+#define  EMU_RECBS_BUFSIZE_12288	0x00000015
+#define  EMU_RECBS_BUFSIZE_14366	0x00000016
+#define  EMU_RECBS_BUFSIZE_16384	0x00000017
+#define  EMU_RECBS_BUFSIZE_20480	0x00000018
+#define  EMU_RECBS_BUFSIZE_24576	0x00000019
+#define  EMU_RECBS_BUFSIZE_28672	0x0000001a
+#define  EMU_RECBS_BUFSIZE_32768	0x0000001b
+#define  EMU_RECBS_BUFSIZE_40960	0x0000001c
+#define  EMU_RECBS_BUFSIZE_49152	0x0000001d
+#define  EMU_RECBS_BUFSIZE_57344	0x0000001e
+#define  EMU_RECBS_BUFSIZE_65536	0x0000001f
+
+#define EMU_CDCS	0x50
+#define EMU_GPSCS	0x51
+
+#define EMU_DBG		0x52
+#define EMU_DBG_ZC			0x80000000
+#define  EMU_DBG_SATURATION_OCCURRED	0x02000000
+#define  EMU_DBG_SATURATION_ADDR	0x01ff0000
+#define  EMU_DBG_SINGLE_STEP		0x00008000
+#define  EMU_DBG_STEP			0x00004000
+#define  EMU_DBG_CONDITION_CODE		0x00003e00
+#define  EMU_DBG_SINGLE_STEP_ADDR	0x000001ff
+
+#define EMU_A_DBG			0x53
+#define EMU_A_DBG_SINGLE_STEP		0x00020000
+#define EMU_A_DBG_ZC			0x40000000
+#define EMU_A_DBG_STEP_ADDR		0x000003ff
+#define EMU_A_DBG_SATURATION_OCCRD	0x20000000
+#define EMU_A_DBG_SATURATION_ADDR	0x0ffc0000
+
+#define EMU_SPCS0	0x54
+#define EMU_SPCS1	0x55
+#define EMU_SPCS2	0x56
+#define  EMU_SPCS_CLKACCYMASK		0x30000000
+#define   EMU_SPCS_CLKACCY_1000PPM	0x00000000
+#define   EMU_SPCS_CLKACCY_50PPM	0x10000000
+#define   EMU_SPCS_CLKACCY_VARIABLE	0x20000000
+#define  EMU_SPCS_SAMPLERATEMASK	0x0f000000
+#define   EMU_SPCS_SAMPLERATE_44	0x00000000
+#define   EMU_SPCS_SAMPLERATE_48	0x02000000
+#define   EMU_SPCS_SAMPLERATE_32	0x03000000
+#define  EMU_SPCS_CHANNELNUMMASK	0x00f00000
+#define   EMU_SPCS_CHANNELNUM_UNSPEC	0x00000000
+#define   EMU_SPCS_CHANNELNUM_LEFT	0x00100000
+#define   EMU_SPCS_CHANNELNUM_RIGHT	0x00200000
+#define  EMU_SPCS_SOURCENUMMASK		0x000f0000
+#define   EMU_SPCS_SOURCENUM_UNSPEC	0x00000000
+#define  EMU_SPCS_GENERATIONSTATUS	0x00008000
+#define  EMU_SPCS_CATEGORYCODEMASK	0x00007f00
+#define  EMU_SPCS_MODEMASK		0x000000c0
+#define  EMU_SPCS_EMPHASISMASK		0x00000038
+#define   EMU_SPCS_EMPHASIS_NONE	0x00000000
+#define   EMU_SPCS_EMPHASIS_50_15	0x00000008
+#define  EMU_SPCS_COPYRIGHT		0x00000004
+#define  EMU_SPCS_NOTAUDIODATA		0x00000002
+#define  EMU_SPCS_PROFESSIONAL		0x00000001
+
+#define EMU_CLIEL	0x58
+#define EMU_CLIEH	0x59
+#define EMU_CLIPL	0x5a
+#define EMU_CLIPH	0x5b
+#define EMU_SOLEL	0x5c
+#define EMU_SOLEH	0x5d
+
+#define	EMU_SPBYPASS		0x5e
+#define	EMU_SPBYPASS_ENABLE	0x00000001
+#define	EMU_SPBYPASS_24_BITS	0x00000f00
+
+#define	EMU_AC97SLOT		0x5f
+#define	EMU_AC97SLOT_CENTER	0x00000010
+#define	EMU_AC97SLOT_LFE	0x00000020
+
+#define EMU_CDSRCS	0x60
+#define EMU_GPSRCS	0x61
+#define EMU_ZVSRCS	0x62
+#define  EMU_SRCS_SPDIFLOCKED		0x02000000
+#define  EMU_SRCS_RATELOCKED		0x01000000
+#define  EMU_SRCS_ESTSAMPLERATE		0x0007ffff
+
+#define EMU_MICIDX	0x63
+#define EMU_A_MICIDX	0x64
+#define EMU_ADCIDX	0x64
+#define EMU_A_ADCIDX	0x63
+#define EMU_FXIDX	0x65
+#define  EMU_RECIDX_MASK		0x0000ffff
+#define	 EMU_RECIDX(idxreg)	       (0x10000000|(idxreg))
+/*
+#define  EMU_MICIDX_IDX			0x10000063
+#define  EMU_ADCIDX_IDX			0x10000064
+#define  EMU_FXIDX_IDX			0x10000065
+*/
+
+#define EMU_A_MUDATA1		0x70
+#define EMU_A_MUCMD1		0x71
+#define EMU_A_MUSTAT1		EMU_A_MUCMD1
+#define EMU_A_MUDATA2		0x72
+#define EMU_A_MUCMD2		0x73
+#define EMU_A_MUSTAT2		EMU_A_MUCMD2
+#define EMU_A_FXWC1		0x74
+#define EMU_A_FXWC2		0x75
+#define EMU_A_SPDIF_SAMPLERATE	0x76
+#define EMU_A_SPDIF_48000	0x00000080
+#define EMU_A_SPDIF_44100	0x00000000
+#define EMU_A_SPDIF_96000	0x00000040
+#define EMU_A2_SPDIF_SAMPLERATE	EMU_MKSUBREG(3, 9, EMU_A_SPDIF_SAMPLERATE)
+#define EMU_A2_SPDIF_MASK	0x00000e00
+#define EMU_A2_SPDIF_UNKNOWN	0x2
+
+#define EMU_A_CHAN_FXRT2		0x7c
+#define EMU_A_CHAN_FXRT_CHANNELE	0x0000003f
+#define EMU_A_CHAN_FXRT_CHANNELF	0x00003f00
+#define EMU_A_CHAN_FXRT_CHANNELG	0x003f0000
+#define EMU_A_CHAN_FXRT_CHANNELH	0x3f000000
+#define EMU_A_CHAN_SENDAMOUNTS		0x7d
+#define EMU_A_CHAN_FXSENDAMOUNTS_E_MASK	0xff000000
+#define EMU_A_CHAN_FXSENDAMOUNTS_F_MASK	0x00ff0000
+#define EMU_A_CHAN_FXSENDAMOUNTS_G_MASK	0x0000ff00
+#define EMU_A_CHAN_FXSENDAMOUNTS_H_MASK	0x000000ff
+#define EMU_A_CHAN_FXRT1		0x7e
+#define EMU_A_CHAN_FXRT_CHANNELA	0x0000003f
+#define EMU_A_CHAN_FXRT_CHANNELB	0x00003f00
+#define EMU_A_CHAN_FXRT_CHANNELC	0x003f0000
+#define EMU_A_CHAN_FXRT_CHANNELD	0x3f000000
+
+#define EMU_FXGPREGBASE		0x100
+#define EMU_A_FXGPREGBASE	0x400
+
+#define EMU_TANKMEMDATAREGBASE	0x200
+#define  EMU_TANKMEMDATAREG_MASK	0x000fffff
+
+#define EMU_TANKMEMADDRREGBASE	0x300
+#define  EMU_TANKMEMADDRREG_ADDR_MASK	0x000fffff
+#define  EMU_TANKMEMADDRREG_CLEAR	0x00800000
+#define  EMU_TANKMEMADDRREG_ALIGN	0x00400000
+#define  EMU_TANKMEMADDRREG_WRITE	0x00200000
+#define  EMU_TANKMEMADDRREG_READ	0x00100000
+
+#define  EMU_MICROCODEBASE	0x400
+#define  EMU_A_MICROCODEBASE		0x600
+#define  EMU_DSP_LOWORD_OPX_MASK	0x000ffc00
+#define  EMU_DSP_LOWORD_OPY_MASK	0x000003ff
+#define  EMU_DSP_HIWORD_OPCODE_MASK	0x00f00000
+#define  EMU_DSP_HIWORD_RESULT_MASK	0x000ffc00
+#define  EMU_DSP_HIWORD_OPA_MASK	0x000003ff
+#define  EMU_A_DSP_LOWORD_OPX_MASK	0x007ff000
+#define  EMU_A_DSP_LOWORD_OPY_MASK	0x000007ff
+#define  EMU_A_DSP_HIWORD_OPCODE_MASK	0x0f000000
+#define  EMU_A_DSP_HIWORD_RESULT_MASK	0x007ff000
+#define  EMU_A_DSP_HIWORD_OPA_MASK	0x000007ff
+
+#define	EMU_DSP_OP_MACS		0x0
+#define	EMU_DSP_OP_MACS1	0x1
+#define	EMU_DSP_OP_MACW		0x2
+#define	EMU_DSP_OP_MACW1	0x3
+#define	EMU_DSP_OP_MACINTS	0x4
+#define	EMU_DSP_OP_MACINTW	0x5
+#define	EMU_DSP_OP_ACC3		0x6
+#define	EMU_DSP_OP_MACMV	0x7
+#define	EMU_DSP_OP_ANDXOR	0x8
+#define	EMU_DSP_OP_TSTNEG	0x9
+#define	EMU_DSP_OP_LIMIT	0xA
+#define	EMU_DSP_OP_LIMIT1	0xB
+#define	EMU_DSP_OP_LOG		0xC
+#define	EMU_DSP_OP_EXP		0xD
+#define	EMU_DSP_OP_INTERP	0xE
+#define	EMU_DSP_OP_SKIP		0xF
+
+
+#define	EMU_DSP_FX(num)	(num)
+
+#define	EMU_DSP_IOL(base, num)	(base + (num << 1))
+#define	EMU_DSP_IOR(base, num)	(EMU_DSP_IOL(base, num) + 1)
+
+#define	EMU_DSP_INL_BASE	0x010
+#define	EMU_DSP_INL(num)	(EMU_DSP_IOL(EMU_DSP_INL_BASE, num))
+#define	EMU_DSP_INR(num)	(EMU_DSP_IOR(EMU_DSP_INL_BASE, num))
+#define	EMU_A_DSP_INL_BASE	0x040
+#define	EMU_A_DSP_INL(num)	(EMU_DSP_IOL(EMU_A_DSP_INL_BASE, num))
+#define	EMU_A_DSP_INR(num)	(EMU_DSP_IOR(EMU_A_DSP_INL_BASE, num))
+#define	 EMU_DSP_IN_AC97	0
+#define	 EMU_DSP_IN_CDSPDIF	1
+#define  EMU_DSP_IN_ZOOM	2
+#define	 EMU_DSP_IN_TOSOPT	3
+#define	 EMU_DSP_IN_LVDLM1	4
+#define	 EMU_DSP_IN_LVDCOS	5
+#define	 EMU_DSP_IN_LVDLM2	6
+#define	EMU_DSP_IN_UNKNOWN	7
+
+#define	EMU_DSP_OUTL_BASE	0x020
+#define	EMU_DSP_OUTL(num)	(EMU_DSP_IOL(EMU_DSP_OUTL_BASE, num))
+#define	EMU_DSP_OUTR(num)	(EMU_DSP_IOR(EMU_DSP_OUTL_BASE, num))
+#define	EMU_DSP_OUT_A_FRONT	0
+#define	EMU_DSP_OUT_D_FRONT	1
+#define	EMU_DSP_OUT_D_CENTER	2
+#define	EMU_DSP_OUT_DRIVE_HP	3
+#define	EMU_DSP_OUT_AD_REAR	4
+#define	EMU_DSP_OUT_ADC		5
+#define	EMU_DSP_OUTL_MIC	6
+
+#define	EMU_A_DSP_OUTL_BASE	0x060
+#define	EMU_A_DSP_OUTL(num)	(EMU_DSP_IOL(EMU_A_DSP_OUTL_BASE, num))
+#define	EMU_A_DSP_OUTR(num)	(EMU_DSP_IOR(EMU_A_DSP_OUTL_BASE, num))
+#define	EMU_A_DSP_OUT_D_FRONT	0
+#define	EMU_A_DSP_OUT_D_CENTER	1
+#define	EMU_A_DSP_OUT_DRIVE_HP	2
+#define	EMU_A_DSP_OUT_DREAR	3
+#define	EMU_A_DSP_OUT_A_FRONT	4
+#define	EMU_A_DSP_OUT_A_CENTER	5
+#define	EMU_A_DSP_OUT_A_REAR	7
+#define EMU_A_DSP_OUT_ADC	11
+
+#define	EMU_DSP_CST_BASE	0x40
+#define	EMU_A_DSP_CST_BASE	0xc0
+#define	EMU_DSP_CST(num)	(EMU_DSP_CST_BASE + num)
+#define	EMU_A_DSP_CST(num)	(EMU_A_DSP_CST_BASE + num)
+/*
+00	= 0x00000000
+01	= 0x00000001
+02	= 0x00000002
+03	= 0x00000003
+04	= 0x00000004
+05	= 0x00000008
+06	= 0x00000010
+07	= 0x00000020
+08	= 0x00000100
+09	= 0x00010000
+0A	= 0x00080000
+0B	= 0x10000000
+0C	= 0x20000000
+0D	= 0x40000000
+0E	= 0x80000000
+0F	= 0x7FFFFFFF
+10	= 0xFFFFFFFF
+11	= 0xFFFFFFFE
+12	= 0xC0000000
+13	= 0x4F1BBCDC
+14	= 0x5A7EF9DB
+15	= 0x00100000
+*/
+
+#define	EMU_DSP_HWR_ACC		0x056
+#define EMU_DSP_HWR_CCR		0x057
+#define	 EMU_DSP_HWR_CCR_S	0x04
+#define	 EMU_DSP_HWR_CCR_Z	0x03
+#define	 EMU_DSP_HWR_CCR_M	0x02
+#define	 EMU_DSP_HWR_CCR_N	0x01
+#define	 EMU_DSP_HWR_CCR_B	0x00
+#define	EMU_DSP_HWR_NOISE0	0x058
+#define	EMU_DSP_HWR_NOISE1	0x059
+#define	EMU_DSP_HWR_INTR	0x05A
+#define	EMU_DSP_HWR_DBAC	0x05B
+
+#define EMU_DSP_GPR(num)	(EMU_FXGPREGBASE + num)
+#define EMU_A_DSP_GPR(num)	(EMU_A_FXGPREGBASE + num)
+
+#endif /* !_DEV_SOUND_PCI_EMU10K1REG_H_ */
diff -ruN dev/sound/pci.orig/emu10kx-midi.c dev/sound/pci/emu10kx-midi.c
--- dev/sound/pci.orig/emu10kx-midi.c	2011-01-07 22:17:46.000000000 +0000
+++ dev/sound/pci/emu10kx-midi.c	2011-01-10 20:15:24.000000000 +0000
@@ -50,8 +50,8 @@
 #include <dev/sound/midi/mpu401.h>
 #include "mpufoi_if.h"
 
+#include <dev/sound/pci/emu10k1reg.h>
 #include <dev/sound/pci/emu10kx.h>
-#include "emu10k1-alsa%diked.h"
 
 struct emu_midi_softc {
 	struct mtx	mtx;
@@ -176,25 +176,25 @@
 	if (scp->is_emu10k1) {
 		/* SB Live! - only one MIDI device here */
 		inte_val = 0;
-		/* inte_val |= INTE_MIDITXENABLE;*/
-		inte_val |= INTE_MIDIRXENABLE;
-		ipr_val = IPR_MIDITRANSBUFEMPTY;
-		ipr_val |= IPR_MIDIRECVBUFEMPTY;
+		/* inte_val |= EMU_INTE_MIDITXENABLE;*/
+		inte_val |= EMU_INTE_MIDIRXENABLE;
+		ipr_val = EMU_IPR_MIDITRANSBUFE;
+		ipr_val |= EMU_IPR_MIDIRECVBUFE;
 	} else {
-		if (scp->port == A_MUDATA1) {
+		if (scp->port == EMU_A_MUDATA1) {
 			/* EXTERNAL MIDI (AudigyDrive) */
 			inte_val = 0;
-			/* inte_val |= A_INTE_MIDITXENABLE1;*/
-			inte_val |= INTE_MIDIRXENABLE;
-			ipr_val = IPR_MIDITRANSBUFEMPTY;
-			ipr_val |= IPR_MIDIRECVBUFEMPTY;
+			/* inte_val |= A_EMU_INTE_MIDITXENABLE1;*/
+			inte_val |= EMU_INTE_MIDIRXENABLE;
+			ipr_val = EMU_IPR_MIDITRANSBUFE;
+			ipr_val |= EMU_IPR_MIDIRECVBUFE;
 		} else {
 			/* MIDI hw config port 2 */
 			inte_val = 0;
-			/* inte_val |= A_INTE_MIDITXENABLE2;*/
-			inte_val |= INTE_A_MIDIRXENABLE2;
-			ipr_val = IPR_A_MIDITRANSBUFEMPTY2;
-			ipr_val |= IPR_A_MIDIRECVBUFEMPTY2;
+			/* inte_val |= A_EMU_INTE_MIDITXENABLE2;*/
+			inte_val |= EMU_INTE_A_MIDIRXENABLE2;
+			ipr_val = EMU_IPR_A_MIDITRANSBUFE2;
+			ipr_val |= EMU_IPR_A_MIDIRECBUFE2;
 		}
 	}
 
@@ -214,7 +214,7 @@
 	if (scp->is_emu10k1)
 		emu_enable_ir(scp->card);
 	else {
-		if (scp->port == A_MUDATA1)
+		if (scp->port == EMU_A_MUDATA1)
 			emu_enable_ir(scp->card);
 	}
 
diff -ruN dev/sound/pci.orig/emu10kx-pcm.c dev/sound/pci/emu10kx-pcm.c
--- dev/sound/pci.orig/emu10kx-pcm.c	2011-01-07 22:17:46.000000000 +0000
+++ dev/sound/pci/emu10kx-pcm.c	2011-01-10 20:15:04.000000000 +0000
@@ -49,8 +49,8 @@
 
 #include "mixer_if.h"
 
+#include <dev/sound/pci/emu10k1reg.h>
 #include <dev/sound/pci/emu10kx.h>
-#include "emu10k1-alsa%diked.h"
 
 struct emu_pcm_pchinfo {
 	int		spd;
@@ -555,8 +555,8 @@
 		break;
 	}
 
-	emu_wr(sc->card, AC97ADDRESS, regno, 1);
-	tmp = emu_rd(sc->card, AC97DATA, 2);
+	emu_wr(sc->card, EMU_AC97ADDR, regno, 1);
+	tmp = emu_rd(sc->card, EMU_AC97DATA, 2);
 
 	if (use_ac97)
 		emulated = tmp;
@@ -621,8 +621,8 @@
 		break;
 	}
 	if (write_ac97) {
-		emu_wr(sc->card, AC97ADDRESS, regno, 1);
-		emu_wr(sc->card, AC97DATA, data, 2);
+		emu_wr(sc->card, EMU_AC97ADDR, regno, 1);
+		emu_wr(sc->card, EMU_AC97DATA, data, 2);
 	}
 }
 
@@ -658,8 +658,8 @@
 	struct emu_pcm_info *sc = (struct emu_pcm_info *)devinfo;
 
 	KASSERT(sc->card != NULL, ("emu_rdcd: no soundcard"));
-	emu_wr(sc->card, AC97ADDRESS, regno, 1);
-	rd = emu_rd(sc->card, AC97DATA, 2);
+	emu_wr(sc->card, EMU_AC97ADDR, regno, 1);
+	rd = emu_rd(sc->card, EMU_AC97DATA, 2);
 	return (rd);
 }
 
@@ -669,8 +669,8 @@
 	struct emu_pcm_info *sc = (struct emu_pcm_info *)devinfo;
 
 	KASSERT(sc->card != NULL, ("emu_wrcd: no soundcard"));
-	emu_wr(sc->card, AC97ADDRESS, regno, 1);
-	emu_wr(sc->card, AC97DATA, data, 2);
+	emu_wr(sc->card, EMU_AC97ADDR, regno, 1);
+	emu_wr(sc->card, EMU_AC97DATA, data, 2);
 	return (0);
 }
 
@@ -870,12 +870,12 @@
 	ch->blksz = sc->bufsz / 2; /* We rise interrupt for half-full buffer */
 	ch->fmt = SND_FORMAT(AFMT_U8, 1, 0);
 	ch->spd = 8000;
-	ch->idxreg = sc->is_emu10k1 ? ADCIDX : A_ADCIDX;
-	ch->basereg = ADCBA;
-	ch->sizereg = ADCBS;
-	ch->setupreg = ADCCR;
-	ch->irqmask = INTE_ADCBUFENABLE;
-	ch->iprmask = IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL;
+	ch->idxreg = sc->is_emu10k1 ? EMU_ADCIDX : EMU_A_ADCIDX;
+	ch->basereg = EMU_ADCBA;
+	ch->sizereg = EMU_ADCBS;
+	ch->setupreg = EMU_ADCCR;
+	ch->irqmask = EMU_INTE_ADCBUFENABLE;
+	ch->iprmask = EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL;
 
 	if (sndbuf_alloc(ch->buffer, emu_gettag(sc->card), 0, sc->bufsz) != 0)
 		return (NULL);
@@ -953,22 +953,22 @@
 
 	switch (sc->bufsz) {
 	case 4096:
-		sz = ADCBS_BUFSIZE_4096;
+		sz = EMU_RECBS_BUFSIZE_4096;
 		break;
 	case 8192:
-		sz = ADCBS_BUFSIZE_8192;
+		sz = EMU_RECBS_BUFSIZE_8192;
 		break;
 	case 16384:
-		sz = ADCBS_BUFSIZE_16384;
+		sz = EMU_RECBS_BUFSIZE_16384;
 		break;
 	case 32768:
-		sz = ADCBS_BUFSIZE_32768;
+		sz = EMU_RECBS_BUFSIZE_32768;
 		break;
 	case 65536:
-		sz = ADCBS_BUFSIZE_65536;
+		sz = EMU_RECBS_BUFSIZE_65536;
 		break;
 	default:
-		sz = ADCBS_BUFSIZE_4096;
+		sz = EMU_RECBS_BUFSIZE_4096;
 	}
 
 	snd_mtxlock(sc->lock);
@@ -976,9 +976,9 @@
 	case PCMTRIG_START:
 		ch->run = 1;
 		emu_wrptr(sc->card, 0, ch->sizereg, sz);
-		val = sc->is_emu10k1 ? ADCCR_LCHANENABLE : A_ADCCR_LCHANENABLE;
+		val = sc->is_emu10k1 ? EMU_ADCCR_LCHANENABLE : EMU_ADCCR_LCHANENABLE;
 		if (AFMT_CHANNEL(ch->fmt) > 1)
-			val |= sc->is_emu10k1 ? ADCCR_RCHANENABLE : A_ADCCR_RCHANENABLE;
+			val |= sc->is_emu10k1 ? EMU_ADCCR_RCHANENABLE : EMU_ADCCR_RCHANENABLE;
 		val |= sc->is_emu10k1 ? emu_k1_recval(ch->spd) : emu_k2_recval(ch->spd);
 		emu_wrptr(sc->card, 0, ch->setupreg, 0);
 		emu_wrptr(sc->card, 0, ch->setupreg, val);
@@ -1049,11 +1049,11 @@
 	ch = &(sc->rch_efx);
 	ch->fmt = SND_FORMAT(AFMT_S16_LE, 1, 0);
 	ch->spd = sc->is_emu10k1 ? 48000*32 : 48000 * 64;
-	ch->idxreg = FXIDX;
-	ch->basereg = FXBA;
-	ch->sizereg = FXBS;
-	ch->irqmask = INTE_EFXBUFENABLE;
-	ch->iprmask = IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL;
+	ch->idxreg = EMU_FXIDX;
+	ch->basereg = EMU_FXBA;
+	ch->sizereg = EMU_FXBS;
+	ch->irqmask = EMU_INTE_EFXBUFENABLE;
+	ch->iprmask = EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL;
 	ch->buffer = b;
 	ch->pcm = sc;
 	ch->channel = c;
@@ -1113,22 +1113,22 @@
 
 	switch (sc->bufsz) {
 	case 4096:
-		sz = ADCBS_BUFSIZE_4096;
+		sz = EMU_RECBS_BUFSIZE_4096;
 		break;
 	case 8192:
-		sz = ADCBS_BUFSIZE_8192;
+		sz = EMU_RECBS_BUFSIZE_8192;
 		break;
 	case 16384:
-		sz = ADCBS_BUFSIZE_16384;
+		sz = EMU_RECBS_BUFSIZE_16384;
 		break;
 	case 32768:
-		sz = ADCBS_BUFSIZE_32768;
+		sz = EMU_RECBS_BUFSIZE_32768;
 		break;
 	case 65536:
-		sz = ADCBS_BUFSIZE_65536;
+		sz = EMU_RECBS_BUFSIZE_65536;
 		break;
 	default:
-		sz = ADCBS_BUFSIZE_4096;
+		sz = EMU_RECBS_BUFSIZE_4096;
 	}
 
 	snd_mtxlock(sc->lock);
@@ -1140,14 +1140,14 @@
 		/*
 		 * SB Live! is limited to 32 mono channels. Audigy
 		 * has 64 mono channels. Channels are enabled
-		 * by setting a bit in A_FXWC[1|2] registers.
+		 * by setting a bit in EMU_A_FXWC[1|2] registers.
 		 */
 		/* XXX there is no way to demultiplex this streams for now */
 		if (sc->is_emu10k1) {
-			emu_wrptr(sc->card, 0, FXWC, 0xffffffff);
+			emu_wrptr(sc->card, 0, EMU_FXWC, 0xffffffff);
 		} else {
-			emu_wrptr(sc->card, 0, A_FXWC1, 0xffffffff);
-			emu_wrptr(sc->card, 0, A_FXWC2, 0xffffffff);
+			emu_wrptr(sc->card, 0, EMU_A_FXWC1, 0xffffffff);
+			emu_wrptr(sc->card, 0, EMU_A_FXWC2, 0xffffffff);
 		}
 		break;
 	case PCMTRIG_STOP:
@@ -1155,10 +1155,10 @@
 	case PCMTRIG_ABORT:
 		ch->run = 0;
 		if (sc->is_emu10k1) {
-			emu_wrptr(sc->card, 0, FXWC, 0x0);
+			emu_wrptr(sc->card, 0, EMU_FXWC, 0x0);
 		} else {
-			emu_wrptr(sc->card, 0, A_FXWC1, 0x0);
-			emu_wrptr(sc->card, 0, A_FXWC2, 0x0);
+			emu_wrptr(sc->card, 0, EMU_A_FXWC1, 0x0);
+			emu_wrptr(sc->card, 0, EMU_A_FXWC2, 0x0);
 		}
 		emu_wrptr(sc->card, 0, ch->sizereg, 0);
 		(void)emu_intr_unregister(sc->card, ch->ihandle);
@@ -1238,8 +1238,8 @@
 
 	snd_mtxlock(sc->lock);
 	
-	if (stat & IPR_INTERVALTIMER) {
-		ack |= IPR_INTERVALTIMER;
+	if (stat & EMU_IPR_INTERVALTIMER) {
+		ack |= EMU_IPR_INTERVALTIMER;
 		for (i = 0; i < MAX_CHANNELS; i++)
 			if (sc->pch[i].channel) {
 				if (sc->pch[i].run == 1) {
@@ -1262,8 +1262,8 @@
 	}
 
 
-	if (stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) {
-		ack |= stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL);
+	if (stat & (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL)) {
+		ack |= stat & (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL);
 		if (sc->rch_adc.channel) {
 			snd_mtxunlock(sc->lock);
 			chn_intr(sc->rch_adc.channel);
@@ -1271,8 +1271,8 @@
 		}
 	}
 
-	if (stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) {
-		ack |= stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL);
+	if (stat & (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL)) {
+		ack |= stat & (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL);
 		if (sc->rch_efx.channel) {
 			snd_mtxunlock(sc->lock);
 			chn_intr(sc->rch_efx.channel);
@@ -1450,8 +1450,8 @@
 		goto bad;
 	}
 
-	inte = INTE_INTERVALTIMERENB;
-	ipr = IPR_INTERVALTIMER; /* Used by playback & ADC */
+	inte = EMU_INTE_INTERTIMERENB;
+	ipr = EMU_IPR_INTERVALTIMER; /* Used by playback & ADC */
 	sc->ihandle = emu_intr_register(sc->card, inte, ipr, &emu_pcm_intr, sc);
 
 	if (emu_pcm_init(sc) == -1) {
diff -ruN dev/sound/pci.orig/emu10kx.c dev/sound/pci/emu10kx.c
--- dev/sound/pci.orig/emu10kx.c	2011-01-07 22:17:46.000000000 +0000
+++ dev/sound/pci/emu10kx.c	2011-01-10 20:14:33.000000000 +0000
@@ -53,6 +53,7 @@
 #include <dev/sound/pcm/sound.h>
 #include <dev/sound/pcm/ac97.h>
 
+#include <dev/sound/pci/emu10k1reg.h>
 #include <dev/sound/pci/emu10kx.h>
 
 /* hw flags */
@@ -181,7 +182,7 @@
 #define	A_IN_AUX2_R	0x0d
 #define	A_IN_AUX2	A_IN_AUX2_L
 
-/* Audigiy Outputs */
+/* Audigy Outputs */
 #define	A_OUT_D_FRONT_L	0x00
 #define	A_OUT_D_FRONT_R	0x01
 #define	A_OUT_D_FRONT	A_OUT_D_FRONT_L
@@ -217,7 +218,20 @@
 #define	A_OUT_ADC_REC_R	0x17
 #define	A_OUT_ADC_REC	A_OUT_ADC_REC_L
 
-#include "emu10k1-alsa%diked.h"
+#define EMU_A_IOCFG_DISABLE_ANALOG	0x0040	/* = 'enable' for Audigy2 (chiprev=4)		*/
+#define EMU_A_IOCFG_GPOUT2	0x0001
+#define EMU_HCFG_GPOUT0		0x00001000
+#define EMU_HCFG_GPOUT2		0x00000400
+#define EMU_AC97SLOT_REAR_RIGHT	0x01
+#define EMU_AC97SLOT_REAR_LEFT	0x02
+
+/* This is the P16V chip: available on the Audigy 2 and Audigy 4 only. */
+#define EMU_DATA2	0x24
+#define EMU_IPR2	0x28
+#define EMU_INTE2	0x2c
+#define EMU_IPR3	0x38
+#define EMU_INTE3	0x3c
+
 #include "p16v-alsa%diked.h"
 #include "p17v-alsa%diked.h"
 
@@ -630,7 +644,7 @@
 	}
 }
 /*
- * PTR / DATA interface. Access to EMU10Kx is made
+ * EMU_PTR / EMU_DATA interface. Access to EMU10Kx is made
  * via (channel, register) pair. Some registers are channel-specific,
  * some not.
  */
@@ -639,11 +653,11 @@
 {
 	uint32_t ptr, val, mask, size, offset;
 
-	ptr = ((reg << 16) & sc->address_mask) | (chn & PTR_CHANNELNUM_MASK);
+	ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK);
 
 	EMU_RWLOCK();
-	emu_wr_nolock(sc, PTR, ptr, 4);
-	val = emu_rd_nolock(sc, DATA, 4);
+	emu_wr_nolock(sc, EMU_PTR, ptr, 4);
+	val = emu_rd_nolock(sc, EMU_DATA, 4);
 	EMU_RWUNLOCK();
 
 	/*
@@ -666,10 +680,10 @@
 {
 	uint32_t ptr, mask, size, offset;
 
-	ptr = ((reg << 16) & sc->address_mask) | (chn & PTR_CHANNELNUM_MASK);
+	ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK);
 
 	EMU_RWLOCK();
-	emu_wr_nolock(sc, PTR, ptr, 4);
+	emu_wr_nolock(sc, EMU_PTR, ptr, 4);
 	/*
 	 * XXX Another kind of magic encoding in register number. This can
 	 * give you side effect - it will read previous data from register
@@ -681,13 +695,13 @@
 		mask = ((1 << size) - 1) << offset;
 		data <<= offset;
 		data &= mask;
-		data |= emu_rd_nolock(sc, DATA, 4) & ~mask;
+		data |= emu_rd_nolock(sc, EMU_DATA, 4) & ~mask;
 	}
-	emu_wr_nolock(sc, DATA, data, 4);
+	emu_wr_nolock(sc, EMU_DATA, data, 4);
 	EMU_RWUNLOCK();
 }
 /*
- * PTR2 / DATA2 interface. Access to P16v is made
+ * EMU_A2_PTR / EMU_DATA2 interface. Access to P16v is made
  * via (channel, register) pair. Some registers are channel-specific,
  * some not. This interface is supported by CA0102 and CA0108 chips only.
  */
@@ -698,8 +712,8 @@
 
 	/* XXX separate lock? */
 	EMU_RWLOCK();
-	emu_wr_nolock(sc, PTR2, (reg << 16) | chn, 4);
-	val = emu_rd_nolock(sc, DATA2, 4);
+	emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4);
+	val = emu_rd_nolock(sc, EMU_DATA2, 4);
 
 	EMU_RWUNLOCK();
 
@@ -711,8 +725,8 @@
 {
 
 	EMU_RWLOCK();
-	emu_wr_nolock(sc, PTR2, (reg << 16) | chn, 4);
-	emu_wr_nolock(sc, DATA2, data, 4);
+	emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4);
+	emu_wr_nolock(sc, EMU_DATA2, data, 4);
 	EMU_RWUNLOCK();
 }
 /*
@@ -737,13 +751,13 @@
 
 /*
  * Direct hardware register access
- * Assume that it is never used to access PTR-based registers and can run unlocked.
+ * Assume that it is never used to access EMU_PTR-based registers and can run unlocked.
  */
 void
 emu_wr(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size)
 {
-	KASSERT(regno != PTR, ("emu_wr: attempt to write to PTR"));
-	KASSERT(regno != PTR2, ("emu_wr: attempt to write to PTR2"));
+	KASSERT(regno != EMU_PTR, ("emu_wr: attempt to write to EMU_PTR"));
+	KASSERT(regno != EMU_A2_PTR, ("emu_wr: attempt to write to EMU_A2_PTR"));
 
 	emu_wr_nolock(sc, regno, data, size);
 }
@@ -753,8 +767,8 @@
 {
 	uint32_t rd;
 
-	KASSERT(regno != DATA, ("emu_rd: attempt to read DATA"));
-	KASSERT(regno != DATA2, ("emu_rd: attempt to read DATA2"));
+	KASSERT(regno != EMU_DATA, ("emu_rd: attempt to read DATA"));
+	KASSERT(regno != EMU_DATA2, ("emu_rd: attempt to read DATA2"));
 
 	rd = emu_rd_nolock(sc, regno, size);
 	return (rd);
@@ -770,24 +784,24 @@
 	uint32_t iocfg;
 
 	if (sc->is_emu10k2 || sc->is_ca0102) {
-		iocfg = emu_rd_nolock(sc, A_IOCFG, 2);
-		emu_wr_nolock(sc, A_IOCFG, iocfg | A_IOCFG_GPOUT2, 2);
+		iocfg = emu_rd_nolock(sc, EMU_A_IOCFG, 2);
+		emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT2, 2);
 		DELAY(500);
-		emu_wr_nolock(sc, A_IOCFG, iocfg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, 2);
+		emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1 | EMU_A_IOCFG_GPOUT2, 2);
 		DELAY(500);
-		emu_wr_nolock(sc, A_IOCFG, iocfg | A_IOCFG_GPOUT1, 2);
+		emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1, 2);
 		DELAY(100);
-		emu_wr_nolock(sc, A_IOCFG, iocfg, 2);
+		emu_wr_nolock(sc, EMU_A_IOCFG, iocfg, 2);
 		device_printf(sc->dev, "Audigy IR MIDI events enabled.\n");
 		sc->enable_ir = 1;
 	}
 	if (sc->is_emu10k1) {
-		iocfg = emu_rd_nolock(sc, HCFG, 4);
-		emu_wr_nolock(sc, HCFG, iocfg | HCFG_GPOUT2, 4);
+		iocfg = emu_rd_nolock(sc, EMU_HCFG, 4);
+		emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT2, 4);
 		DELAY(500);
-		emu_wr_nolock(sc, HCFG, iocfg | HCFG_GPOUT1 | HCFG_GPOUT2, 4);
+		emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_INTE_PCIERRENABLE | EMU_HCFG_GPOUT2, 4);
 		DELAY(100);
-		emu_wr_nolock(sc, HCFG, iocfg, 4);
+		emu_wr_nolock(sc, EMU_HCFG, iocfg, 4);
 		device_printf(sc->dev, "SB Live! IR MIDI events enabled.\n");
 		sc->enable_ir = 1;
 	}
@@ -835,7 +849,7 @@
 			sc->timerinterval = sc->timer[i];
 
 	/* XXX */
-	emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2);
+	emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2);
 	mtx_unlock(&sc->lock);
 
 	return (timer);
@@ -868,16 +882,16 @@
 			ena_int = 1;
 	}
 
-	emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2);
+	emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2);
 
 	if (ena_int == 1) {
-		x = emu_rd(sc, INTE, 4);
-		x |= INTE_INTERVALTIMERENB;
-		emu_wr(sc, INTE, x, 4);
+		x = emu_rd(sc, EMU_INTE, 4);
+		x |= EMU_INTE_INTERTIMERENB;
+		emu_wr(sc, EMU_INTE, x, 4);
 	} else {
-		x = emu_rd(sc, INTE, 4);
-		x &= ~INTE_INTERVALTIMERENB;
-		emu_wr(sc, INTE, x, 4);
+		x = emu_rd(sc, EMU_INTE, 4);
+		x &= ~EMU_INTE_INTERTIMERENB;
+		emu_wr(sc, EMU_INTE, x, 4);
 	}
 	mtx_unlock(&sc->lock);
 	return (0);
@@ -917,9 +931,9 @@
 			sc->ihandler[i].intr_mask = intr_mask;
 			sc->ihandler[i].softc = isc;
 			sc->ihandler[i].irq_func = func;
-			x = emu_rd(sc, INTE, 4);
+			x = emu_rd(sc, EMU_INTE, 4);
 			x |= inte_mask;
-			emu_wr(sc, INTE, x, 4);
+			emu_wr(sc, EMU_INTE, x, 4);
 			mtx_unlock(&sc->lock);
 			if (sc->dbg_level > 1)
 				device_printf(sc->dev, "ihandle %d registered\n", i);
@@ -946,7 +960,7 @@
 		return (-1);
 	}
 
-	x = emu_rd(sc, INTE, 4);
+	x = emu_rd(sc, EMU_INTE, 4);
 	x &= ~sc->ihandler[hnumber].inte_mask;
 
 	sc->ihandler[hnumber].inte_mask = 0;
@@ -954,12 +968,12 @@
 	sc->ihandler[hnumber].softc = NULL;
 	sc->ihandler[hnumber].irq_func = NULL;
 
-	/* other interrupt handlers may use this INTE value */
+	/* other interrupt handlers may use this EMU_INTE value */
 	for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
 		if (sc->ihandler[i].inte_mask != 0)
 			x |= sc->ihandler[i].inte_mask;
 
-	emu_wr(sc, INTE, x, 4);
+	emu_wr(sc, EMU_INTE, x, 4);
 
 	mtx_unlock(&sc->lock);
 	return (hnumber);
@@ -973,11 +987,11 @@
 	int i;
 
 	for (;;) {
-		stat = emu_rd(sc, IPR, 4);
+		stat = emu_rd(sc, EMU_IPR, 4);
 		ack = 0;
 		if (stat == 0)
 			break;
-		emu_wr(sc, IPR, stat, 4);
+		emu_wr(sc, EMU_IPR, stat, 4);
 		for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) {
 			if ((((sc->ihandler[i].intr_mask) & stat) != 0) &&
 			    (((void *)sc->ihandler[i].irq_func) != NULL)) {
@@ -993,13 +1007,13 @@
 
 	if ((sc->is_ca0102) || (sc->is_ca0108))
 		for (;;) {
-			stat = emu_rd(sc, IPR2, 4);
+			stat = emu_rd(sc, EMU_IPR2, 4);
 			ack = 0;
 			if (stat == 0)
 				break;
-			emu_wr(sc, IPR2, stat, 4);
+			emu_wr(sc, EMU_IPR2, stat, 4);
 			if (sc->dbg_level > 1)
-				device_printf(sc->dev, "IPR2: %08x\n", stat);
+				device_printf(sc->dev, "EMU_IPR2: %08x\n", stat);
 
 			break;	/* to avoid infinite loop. shoud be removed
 				 * after completion of P16V interface. */
@@ -1007,13 +1021,13 @@
 
 	if (sc->is_ca0102)
 		for (;;) {
-			stat = emu_rd(sc, IPR3, 4);
+			stat = emu_rd(sc, EMU_IPR3, 4);
 			ack = 0;
 			if (stat == 0)
 				break;
-			emu_wr(sc, IPR3, stat, 4);
+			emu_wr(sc, EMU_IPR3, stat, 4);
 			if (sc->dbg_level > 1)
-				device_printf(sc->dev, "IPR3: %08x\n", stat);
+				device_printf(sc->dev, "EMU_IPR3: %08x\n", stat);
 
 			break;	/* to avoid infinite loop. should be removed
 				 * after completion of S/PDIF interface */
@@ -1374,61 +1388,61 @@
 
 
 	if (v->stereo) {
-		emu_wrptr(sc, v->vnum, CPF, CPF_STEREO_MASK);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, EMU_CHAN_CPF_STEREO_MASK);
 	} else {
-		emu_wrptr(sc, v->vnum, CPF, 0);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, 0);
 	}
 	val = v->stereo ? 28 : 30;
 	val *= v->b16 ? 1 : 2;
 	start = v->sa + val;
 
 	if (sc->is_emu10k1) {
-		emu_wrptr(sc, v->vnum, FXRT, ((v->routing[3] << 12) |
+		emu_wrptr(sc, v->vnum, EMU_CHAN_FXRT, ((v->routing[3] << 12) |
 		    (v->routing[2] << 8) |
 		    (v->routing[1] << 4) |
 		    (v->routing[0] << 0)) << 16);
 	} else {
-		emu_wrptr(sc, v->vnum, A_FXRT1, (v->routing[3] << 24) |
+		emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT1, (v->routing[3] << 24) |
 		    (v->routing[2] << 16) |
 		    (v->routing[1] << 8) |
 		    (v->routing[0] << 0));
-		emu_wrptr(sc, v->vnum, A_FXRT2, (v->routing[7] << 24) |
+		emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT2, (v->routing[7] << 24) |
 		    (v->routing[6] << 16) |
 		    (v->routing[5] << 8) |
 		    (v->routing[4] << 0));
-		emu_wrptr(sc, v->vnum, A_SENDAMOUNTS, (v->amounts[7] << 24) |
+		emu_wrptr(sc, v->vnum, EMU_A_CHAN_SENDAMOUNTS, (v->amounts[7] << 24) |
 		    (v->amounts[6] << 26) |
 		    (v->amounts[5] << 8) |
 		    (v->amounts[4] << 0));
 	}
-	emu_wrptr(sc, v->vnum, PTRX, (v->amounts[0] << 8) | (v->amounts[1] << 0));
-	emu_wrptr(sc, v->vnum, DSL, v->ea | (v->amounts[3] << 24));
-	emu_wrptr(sc, v->vnum, PSST, v->sa | (v->amounts[2] << 24));
-
-	emu_wrptr(sc, v->vnum, CCCA, start | (v->b16 ? 0 : CCCA_8BITSELECT));
-	emu_wrptr(sc, v->vnum, Z1, 0);
-	emu_wrptr(sc, v->vnum, Z2, 0);
-
-	silent_page = ((uint32_t) (sc->mem.silent_page_addr) << 1) | MAP_PTI_MASK;
-	emu_wrptr(sc, v->vnum, MAPA, silent_page);
-	emu_wrptr(sc, v->vnum, MAPB, silent_page);
-
-	emu_wrptr(sc, v->vnum, CVCF, CVCF_CURRENTFILTER_MASK);
-	emu_wrptr(sc, v->vnum, VTFT, VTFT_FILTERTARGET_MASK);
-	emu_wrptr(sc, v->vnum, ATKHLDM, 0);
-	emu_wrptr(sc, v->vnum, DCYSUSM, DCYSUSM_DECAYTIME_MASK);
-	emu_wrptr(sc, v->vnum, LFOVAL1, 0x8000);
-	emu_wrptr(sc, v->vnum, LFOVAL2, 0x8000);
-	emu_wrptr(sc, v->vnum, FMMOD, 0);
-	emu_wrptr(sc, v->vnum, TREMFRQ, 0);
-	emu_wrptr(sc, v->vnum, FM2FRQ2, 0);
-	emu_wrptr(sc, v->vnum, ENVVAL, 0x8000);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX, (v->amounts[0] << 8) | (v->amounts[1] << 0));
+	emu_wrptr(sc, v->vnum, EMU_CHAN_DSL, v->ea | (v->amounts[3] << 24));
+	emu_wrptr(sc, v->vnum, EMU_CHAN_PSST, v->sa | (v->amounts[2] << 24));
+
+	emu_wrptr(sc, v->vnum, EMU_CHAN_CCCA, start | (v->b16 ? 0 : EMU_CHAN_CCCA_8BITSELECT));
+	emu_wrptr(sc, v->vnum, EMU_CHAN_Z1, 0);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_Z2, 0);
+
+	silent_page = ((uint32_t) (sc->mem.silent_page_addr) << 1) | EMU_CHAN_MAP_PTI_MASK;
+	emu_wrptr(sc, v->vnum, EMU_CHAN_MAPA, silent_page);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_MAPB, silent_page);
+
+	emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, EMU_CHAN_CVCF_CURRFILTER_MASK);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, EMU_CHAN_VTFT_FILTERTARGET_MASK);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDM, 0);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSM, EMU_CHAN_DCYSUSM_DECAYTIME_MASK);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL1, 0x8000);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL2, 0x8000);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_FMMOD, 0);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_TREMFRQ, 0);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_FM2FRQ2, 0);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVAL, 0x8000);
 
-	emu_wrptr(sc, v->vnum, ATKHLDV, ATKHLDV_HOLDTIME_MASK | ATKHLDV_ATTACKTIME_MASK);
-	emu_wrptr(sc, v->vnum, ENVVOL, 0x8000);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDV, EMU_CHAN_ATKHLDV_HOLDTIME_MASK | EMU_CHAN_ATKHLDV_ATTACKTIME_MASK);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVOL, 0x8000);
 
-	emu_wrptr(sc, v->vnum, PEFE_FILTERAMOUNT, 0x7f);
-	emu_wrptr(sc, v->vnum, PEFE_PITCHAMOUNT, 0);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_FILTERAMOUNT, 0x7f);
+	emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_PITCHAMOUNT, 0);
 	if ((v->stereo) && (v->slave != NULL))
 		emu_vwrite(sc, v->slave);
 }
@@ -1438,7 +1452,7 @@
 {
 	int reg;
 
-	reg = (channel & 0x20) ? SOLEH : SOLEL;
+	reg = (channel & 0x20) ? EMU_SOLEH : EMU_SOLEL;
 	channel &= 0x1f;
 	reg |= 1 << 24;
 	reg |= channel << 16;
@@ -1459,29 +1473,29 @@
 		ccis *= v->b16 ? 1 : 2;
 		sample = v->b16 ? 0x00000000 : 0x80808080;
 		for (i = 0; i < cs; i++)
-			emu_wrptr(sc, v->vnum, CD0 + i, sample);
-		emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, 0);
-		emu_wrptr(sc, v->vnum, CCR_READADDRESS, cra);
-		emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, ccis);
-
-		emu_wrptr(sc, v->vnum, IFATN, 0xff00);
-		emu_wrptr(sc, v->vnum, VTFT, 0xffffffff);
-		emu_wrptr(sc, v->vnum, CVCF, 0xffffffff);
-		emu_wrptr(sc, v->vnum, DCYSUSV, 0x00007f7f);
+			emu_wrptr(sc, v->vnum, EMU_CHAN_CD0 + i, sample);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, 0);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_READADDRESS, cra);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, ccis);
+
+		emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xff00);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0xffffffff);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0xffffffff);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSV, 0x00007f7f);
 		emu_vstop(sc, v->vnum, 0);
 
 		pitch_target = emu_rate_to_linearpitch(v->speed);
 		initial_pitch = emu_rate_to_pitch(v->speed) >> 8;
-		emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, pitch_target);
-		emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, pitch_target);
-		emu_wrptr(sc, v->vnum, IP, initial_pitch);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, pitch_target);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, pitch_target);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_IP, initial_pitch);
 	} else {
-		emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, 0);
-		emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, 0);
-		emu_wrptr(sc, v->vnum, IFATN, 0xffff);
-		emu_wrptr(sc, v->vnum, VTFT, 0x0000ffff);
-		emu_wrptr(sc, v->vnum, CVCF, 0x0000ffff);
-		emu_wrptr(sc, v->vnum, IP, 0);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, 0);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, 0);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xffff);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0x0000ffff);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0x0000ffff);
+		emu_wrptr(sc, v->vnum, EMU_CHAN_IP, 0);
 		emu_vstop(sc, v->vnum, 1);
 	}
 	if ((v->stereo) && (v->slave != NULL))
@@ -1494,7 +1508,7 @@
 	int s, ptr;
 
 	s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0);
-	ptr = (emu_rdptr(sc, v->vnum, CCCA_CURRADDR) - (v->start >> s)) << s;
+	ptr = (emu_rdptr(sc, v->vnum, EMU_CHAN_CCCA_CURRADDR) - (v->start >> s)) << s;
 	return (ptr & ~0x0000001f);
 }
 
@@ -1694,9 +1708,9 @@
 
 	/* stop DSP */
 	if (sc->is_emu10k1) {
-		emu_wrptr(sc, 0, DBG, EMU10K1_DBG_SINGLE_STEP);
+		emu_wrptr(sc, 0, EMU_DBG, EMU_DBG_SINGLE_STEP);
 	} else {
-		emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP);
+		emu_wrptr(sc, 0, EMU_A_DBG, EMU_A_DBG_SINGLE_STEP);
 	}
 
 	/* code size is in instructions */
@@ -2162,9 +2176,9 @@
 
 	/* start DSP */
 	if (sc->is_emu10k1) {
-		emu_wrptr(sc, 0, DBG, 0);
+		emu_wrptr(sc, 0, EMU_DBG, 0);
 	} else {
-		emu_wrptr(sc, 0, A_DBG, 0);
+		emu_wrptr(sc, 0, EMU_A_DBG, 0);
 	}
 }
 
@@ -2450,24 +2464,24 @@
 		return;
 	}
 
-	hcfg = HCFG_AUDIOENABLE | HCFG_AUTOMUTE;
+	hcfg = EMU_HCFG_AUDIOENABLE | EMU_HCFG_AUTOMUTE;
 	a_iocfg = 0;
 
 	if (sc->rev >= 6)
-		hcfg |= HCFG_JOYENABLE;
+		hcfg |= EMU_HCFG_JOYENABLE;
 
 	if (sc->is_emu10k1)
-		hcfg |= HCFG_LOCKTANKCACHE_MASK;
+		hcfg |= EMU_HCFG_LOCKTANKCACHE_MASK;
 	else
-		hcfg |= HCFG_CODECFORMAT_I2S | HCFG_JOYENABLE;
+		hcfg |= EMU_HCFG_CODECFMT_I2S | EMU_HCFG_JOYENABLE;
 
 
 	if (mode == MODE_DIGITAL) {
 		if (sc->broken_digital) {
 			device_printf(sc->dev, "Digital mode is reported as broken on this card.\n");
 		}
-		a_iocfg |= A_IOCFG_ENABLE_DIGITAL;
-		hcfg |= HCFG_GPOUT0;
+		a_iocfg |= EMU_A_IOCFG_GPOUT1;
+		hcfg |= EMU_HCFG_GPOUT0;
 	}
 
 	if (mode == MODE_ANALOG)
@@ -2478,12 +2492,12 @@
 
 	if ((sc->is_ca0102) || (sc->is_ca0108))
 		/*
-		 * Setting A_IOCFG_DISABLE_ANALOG will do opposite things
+		 * Setting EMU_A_IOCFG_DISABLE_ANALOG will do opposite things
 		 * on diffrerent cards.
 		 * "don't disable analog outs" on Audigy 2 (ca0102/ca0108)
 		 * "disable analog outs" on Audigy (emu10k2)
 		 */
-		a_iocfg |= A_IOCFG_DISABLE_ANALOG;
+		a_iocfg |= EMU_A_IOCFG_DISABLE_ANALOG;
 
 	if (sc->is_ca0108)
 		a_iocfg |= 0x20; /* XXX */
@@ -2492,12 +2506,12 @@
 	if (mode == MODE_DIGITAL)
 		emumix_set_gpr(sc, sc->mute_gpr[ANALOGMUTE], 1);
 
-	emu_wr(sc, HCFG, hcfg, 4);
+	emu_wr(sc, EMU_HCFG, hcfg, 4);
 
 	if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
-		tmp = emu_rd(sc, A_IOCFG, 2);
+		tmp = emu_rd(sc, EMU_A_IOCFG, 2);
 		tmp = a_iocfg;
-		emu_wr(sc, A_IOCFG, tmp, 2);
+		emu_wr(sc, EMU_A_IOCFG, tmp, 2);
 	}
 
 	/* Unmute if we have changed mode to analog. */
@@ -2523,16 +2537,16 @@
 		return;
 	}
 
-	spcs = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
-	    SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
-	    SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
-	    SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
+	spcs = EMU_SPCS_CLKACCY_1000PPM | EMU_SPCS_SAMPLERATE_48 |
+	    EMU_SPCS_CHANNELNUM_LEFT | EMU_SPCS_SOURCENUM_UNSPEC |
+	    EMU_SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
+	    EMU_SPCS_EMPHASIS_NONE | EMU_SPCS_COPYRIGHT;
 
 	mode = SPDIF_MODE_PCM;
 
-	emu_wrptr(sc, 0, SPCS0, spcs);
-	emu_wrptr(sc, 0, SPCS1, spcs);
-	emu_wrptr(sc, 0, SPCS2, spcs);
+	emu_wrptr(sc, 0, EMU_SPCS0, spcs);
+	emu_wrptr(sc, 0, EMU_SPCS1, spcs);
+	emu_wrptr(sc, 0, EMU_SPCS2, spcs);
 }
 
 #define	L2L_POINTS	10
@@ -2635,8 +2649,8 @@
 {
 
 	/*
-	 * XXX May not need this if we have IPR3 handler.
-	 * Is it a real init calls, or IPR3 interrupt acknowledgments?
+	 * XXX May not need this if we have EMU_IPR3 handler.
+	 * Is it a real init calls, or EMU_IPR3 interrupt acknowledgments?
 	 * Looks much like "(data << 16) | register".
 	 */
 	emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0000);
@@ -2660,42 +2674,42 @@
 	int i;
 
 	/* disable audio and lock cache */
-	emu_wr(sc, HCFG, HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, 4);
+	emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4);
 
 	/* reset recording buffers */
-	emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
-	emu_wrptr(sc, 0, MICBA, 0);
-	emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
-	emu_wrptr(sc, 0, FXBA, 0);
-	emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
-	emu_wrptr(sc, 0, ADCBA, 0);
+	emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE);
+	emu_wrptr(sc, 0, EMU_MICBA, 0);
+	emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE);
+	emu_wrptr(sc, 0, EMU_FXBA, 0);
+	emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE);
+	emu_wrptr(sc, 0, EMU_ADCBA, 0);
 
 	/* disable channel interrupt */
-	emu_wr(sc, INTE, INTE_INTERVALTIMERENB | INTE_SAMPLERATETRACKER | INTE_PCIERRORENABLE, 4);
-	emu_wrptr(sc, 0, CLIEL, 0);
-	emu_wrptr(sc, 0, CLIEH, 0);
-	emu_wrptr(sc, 0, SOLEL, 0);
-	emu_wrptr(sc, 0, SOLEH, 0);
+	emu_wr(sc, EMU_INTE, EMU_INTE_INTERTIMERENB | EMU_INTE_SAMPLERATER | EMU_INTE_PCIERRENABLE, 4);
+	emu_wrptr(sc, 0, EMU_CLIEL, 0);
+	emu_wrptr(sc, 0, EMU_CLIEH, 0);
+	emu_wrptr(sc, 0, EMU_SOLEL, 0);
+	emu_wrptr(sc, 0, EMU_SOLEH, 0);
 
 	/* disable P16V and S/PDIF interrupts */
 	if ((sc->is_ca0102) || (sc->is_ca0108))
-		emu_wr(sc, INTE2, 0, 4);
+		emu_wr(sc, EMU_INTE2, 0, 4);
 
 	if (sc->is_ca0102)
-		emu_wr(sc, INTE3, 0, 4);
+		emu_wr(sc, EMU_INTE3, 0, 4);
 
 	/* init phys inputs and outputs */
 	ac97slot = 0;
 	if (sc->has_51)
-		ac97slot = AC97SLOT_CNTR | AC97SLOT_LFE;
+		ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE;
 	if (sc->has_71)
-		ac97slot = AC97SLOT_CNTR | AC97SLOT_LFE | AC97SLOT_REAR_LEFT | AC97SLOT_REAR_RIGHT;
+		ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE | EMU_AC97SLOT_REAR_LEFT | EMU_AC97SLOT_REAR_RIGHT;
 	if (sc->is_emu10k2)
 		ac97slot |= 0x40;
-	emu_wrptr(sc, 0, AC97SLOT, ac97slot);
+	emu_wrptr(sc, 0, EMU_AC97SLOT, ac97slot);
 
 	if (sc->is_emu10k2)	/* XXX for later cards? */
-		emu_wrptr(sc, 0, SPBYPASS, 0xf00);	/* What will happen if
+		emu_wrptr(sc, 0, EMU_SPBYPASS, 0xf00);	/* What will happen if
 							 * we write 1 here? */
 
 	if (bus_dma_tag_create( /* parent */ bus_get_dma_tag(sc->dev),
@@ -2729,61 +2743,61 @@
 		sc->mem.ptb_pages[i] = tmp | i;
 
 	for (ch = 0; ch < NUM_G; ch++) {
-		emu_wrptr(sc, ch, MAPA, tmp | MAP_PTI_MASK);
-		emu_wrptr(sc, ch, MAPB, tmp | MAP_PTI_MASK);
+		emu_wrptr(sc, ch, EMU_CHAN_MAPA, tmp | EMU_CHAN_MAP_PTI_MASK);
+		emu_wrptr(sc, ch, EMU_CHAN_MAPB, tmp | EMU_CHAN_MAP_PTI_MASK);
 	}
-	emu_wrptr(sc, 0, PTB, (sc->mem.ptb_pages_addr));
-	emu_wrptr(sc, 0, TCB, 0);	/* taken from original driver */
-	emu_wrptr(sc, 0, TCBS, 0);	/* taken from original driver */
+	emu_wrptr(sc, 0, EMU_PTB, (sc->mem.ptb_pages_addr));
+	emu_wrptr(sc, 0, EMU_TCB, 0);	/* taken from original driver */
+	emu_wrptr(sc, 0, EMU_TCBS, 0);	/* taken from original driver */
 
 	/* init envelope engine */
 	for (ch = 0; ch < NUM_G; ch++) {
-		emu_wrptr(sc, ch, DCYSUSV, 0);
-		emu_wrptr(sc, ch, IP, 0);
-		emu_wrptr(sc, ch, VTFT, 0xffff);
-		emu_wrptr(sc, ch, CVCF, 0xffff);
-		emu_wrptr(sc, ch, PTRX, 0);
-		emu_wrptr(sc, ch, CPF, 0);
-		emu_wrptr(sc, ch, CCR, 0);
-
-		emu_wrptr(sc, ch, PSST, 0);
-		emu_wrptr(sc, ch, DSL, 0x10);
-		emu_wrptr(sc, ch, CCCA, 0);
-		emu_wrptr(sc, ch, Z1, 0);
-		emu_wrptr(sc, ch, Z2, 0);
-		emu_wrptr(sc, ch, FXRT, 0xd01c0000);
-
-		emu_wrptr(sc, ch, ATKHLDM, 0);
-		emu_wrptr(sc, ch, DCYSUSM, 0);
-		emu_wrptr(sc, ch, IFATN, 0xffff);
-		emu_wrptr(sc, ch, PEFE, 0);
-		emu_wrptr(sc, ch, FMMOD, 0);
-		emu_wrptr(sc, ch, TREMFRQ, 24);	/* 1 Hz */
-		emu_wrptr(sc, ch, FM2FRQ2, 24);	/* 1 Hz */
-		emu_wrptr(sc, ch, TEMPENV, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_IP, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0xffff);
+		emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0xffff);
+		emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_CPF, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_CCR, 0);
+
+		emu_wrptr(sc, ch, EMU_CHAN_PSST, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_DSL, 0x10);
+		emu_wrptr(sc, ch, EMU_CHAN_CCCA, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_Z1, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_Z2, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_FXRT, 0xd01c0000);
+
+		emu_wrptr(sc, ch, EMU_CHAN_ATKHLDM, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_DCYSUSM, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_IFATN, 0xffff);
+		emu_wrptr(sc, ch, EMU_CHAN_PEFE, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_FMMOD, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_TREMFRQ, 24);	/* 1 Hz */
+		emu_wrptr(sc, ch, EMU_CHAN_FM2FRQ2, 24);	/* 1 Hz */
+		emu_wrptr(sc, ch, EMU_CHAN_TEMPENV, 0);
 
 		/*** these are last so OFF prevents writing ***/
-		emu_wrptr(sc, ch, LFOVAL2, 0);
-		emu_wrptr(sc, ch, LFOVAL1, 0);
-		emu_wrptr(sc, ch, ATKHLDV, 0);
-		emu_wrptr(sc, ch, ENVVOL, 0);
-		emu_wrptr(sc, ch, ENVVAL, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_LFOVAL2, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_LFOVAL1, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_ATKHLDV, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_ENVVOL, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_ENVVAL, 0);
 
 		if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
 			emu_wrptr(sc, ch, 0x4c, 0x0);
 			emu_wrptr(sc, ch, 0x4d, 0x0);
 			emu_wrptr(sc, ch, 0x4e, 0x0);
 			emu_wrptr(sc, ch, 0x4f, 0x0);
-			emu_wrptr(sc, ch, A_FXRT1, 0x3f3f3f3f);
-			emu_wrptr(sc, ch, A_FXRT2, 0x3f3f3f3f);
-			emu_wrptr(sc, ch, A_SENDAMOUNTS, 0x0);
+			emu_wrptr(sc, ch, EMU_A_CHAN_FXRT1, 0x3f3f3f3f);
+			emu_wrptr(sc, ch, EMU_A_CHAN_FXRT2, 0x3f3f3f3f);
+			emu_wrptr(sc, ch, EMU_A_CHAN_SENDAMOUNTS, 0x0);
 		}
 	}
 
 	emumix_set_spdif_mode(sc, SPDIF_MODE_PCM);
 
 	if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108))
-		emu_wrptr(sc, 0, A_SPDIF_SAMPLERATE, A_SPDIF_48000);
+		emu_wrptr(sc, 0, EMU_A_SPDIF_SAMPLERATE, EMU_A_SPDIF_48000);
 
 	/*
 	 * CAxxxx cards needs additional setup:
@@ -2793,10 +2807,10 @@
 	 */
 	if ((sc->is_ca0102) || (sc->is_ca0108)) {
 
-		spdif_sr = emu_rdptr(sc, 0, A_SPDIF_SAMPLERATE);
+		spdif_sr = emu_rdptr(sc, 0, EMU_A_SPDIF_SAMPLERATE);
 		spdif_sr &= 0xfffff1ff;
-		spdif_sr |= A_I2S_CAPTURE_96000;
-		emu_wrptr(sc, 0, A_SPDIF_SAMPLERATE, spdif_sr);
+		spdif_sr |= EMU_A_SPDIF_96000;
+		emu_wrptr(sc, 0, EMU_A_SPDIF_SAMPLERATE, spdif_sr);
 
 		/* Disable P16v processing */
 		emu_wr_p16vptr(sc, 0, SRCSel, 0x14);
@@ -2808,8 +2822,8 @@
 			emu_wr_p16vptr(sc, 0, P17V_MIXER_I2S_ENABLE, 0xFF000000);
 			emu_wr_p16vptr(sc, 0, P17V_MIXER_SPDIF_ENABLE, 0xFF000000);
 
-			tmp = emu_rd(sc, A_IOCFG, 2);
-			emu_wr(sc, A_IOCFG, tmp & ~0x8, 2);
+			tmp = emu_rd(sc, EMU_A_IOCFG, 2);
+			emu_wr(sc, EMU_A_IOCFG, tmp & ~0x8, 2);
 		}
 	}
 	emu_initefx(sc);
@@ -2824,7 +2838,7 @@
 	emumix_set_mode(sc, def_mode);
 
 	if (bootverbose) {
-		tmp = emu_rd(sc, HCFG, 4);
+		tmp = emu_rd(sc, EMU_HCFG, 4);
 		device_printf(sc->dev, "Card Configuration (   0x%08x )\n", tmp);
 		device_printf(sc->dev, "Card Configuration ( & 0xff000000 ) : %s%s%s%s%s%s%s%s\n",
 		    (tmp & 0x80000000 ? "[Legacy MPIC] " : ""),
@@ -2864,7 +2878,7 @@
 		    (tmp & 0x00000001 ? "[AUDIOENABLE]" : " "));
 
 		if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
-			tmp = emu_rd(sc, A_IOCFG, 2);
+			tmp = emu_rd(sc, EMU_A_IOCFG, 2);
 			device_printf(sc->dev, "Audigy Card Configuration (    0x%04x )\n", tmp);
 			device_printf(sc->dev, "Audigy Card Configuration (  & 0xff00 )");
 			printf(" : %s%s%s%s%s%s%s%s\n",
@@ -2897,36 +2911,36 @@
 	uint32_t ch;
 	struct emu_memblk *blk;
 
-	emu_wr(sc, INTE, 0, 4);
+	emu_wr(sc, EMU_INTE, 0, 4);
 	for (ch = 0; ch < NUM_G; ch++)
-		emu_wrptr(sc, ch, DCYSUSV, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, 0);
 	for (ch = 0; ch < NUM_G; ch++) {
-		emu_wrptr(sc, ch, VTFT, 0);
-		emu_wrptr(sc, ch, CVCF, 0);
-		emu_wrptr(sc, ch, PTRX, 0);
-		emu_wrptr(sc, ch, CPF, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0);
+		emu_wrptr(sc, ch, EMU_CHAN_CPF, 0);
 	}
 
 	/* disable audio and lock cache */
-	emu_wr(sc, HCFG, HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, 4);
+	emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4);
 
-	emu_wrptr(sc, 0, PTB, 0);
+	emu_wrptr(sc, 0, EMU_PTB, 0);
 	/* reset recording buffers */
-	emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
-	emu_wrptr(sc, 0, MICBA, 0);
-	emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
-	emu_wrptr(sc, 0, FXBA, 0);
-	emu_wrptr(sc, 0, FXWC, 0);
-	emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
-	emu_wrptr(sc, 0, ADCBA, 0);
-	emu_wrptr(sc, 0, TCB, 0);
-	emu_wrptr(sc, 0, TCBS, 0);
+	emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE);
+	emu_wrptr(sc, 0, EMU_MICBA, 0);
+	emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE);
+	emu_wrptr(sc, 0, EMU_FXBA, 0);
+	emu_wrptr(sc, 0, EMU_FXWC, 0);
+	emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE);
+	emu_wrptr(sc, 0, EMU_ADCBA, 0);
+	emu_wrptr(sc, 0, EMU_TCB, 0);
+	emu_wrptr(sc, 0, EMU_TCBS, 0);
 
 	/* disable channel interrupt */
-	emu_wrptr(sc, 0, CLIEL, 0);
-	emu_wrptr(sc, 0, CLIEH, 0);
-	emu_wrptr(sc, 0, SOLEL, 0);
-	emu_wrptr(sc, 0, SOLEH, 0);
+	emu_wrptr(sc, 0, EMU_CLIEL, 0);
+	emu_wrptr(sc, 0, EMU_CLIEH, 0);
+	emu_wrptr(sc, 0, EMU_SOLEL, 0);
+	emu_wrptr(sc, 0, EMU_SOLEH, 0);
 
 	if (!SLIST_EMPTY(&sc->mem.blocks))
 		device_printf(sc->dev, "warning: memblock list not empty\n");
@@ -3137,9 +3151,9 @@
 	/*	0xe0...0x100 are unknown	*/
 	/*	sc->tram_base = 0x200		*/
 	/*	sc->tram_addr_base = 0x300	*/
-		sc->gpr_base = A_FXGPREGBASE;
+		sc->gpr_base = EMU_A_FXGPREGBASE;
 		sc->num_gprs = 0x200;
-		sc->code_base = A_MICROCODEBASE;
+		sc->code_base = EMU_A_MICROCODEBASE;
 		sc->code_size = 0x800 / 2;	/* 0x600-0xdff,  2048 words,
 						 * 1024 instructions */
 
@@ -3147,16 +3161,16 @@
 		sc->num_fxbuses = 16;
 		sc->num_inputs = 8;
 		sc->num_outputs = 16;
-		sc->address_mask = A_PTR_ADDRESS_MASK;
+		sc->address_mask = EMU_A_PTR_ADDR_MASK;
 	}
 	if (sc->is_emu10k1) {
 		sc->has_51 = 0;	/* We don't support 5.1 sound on SB Live! 5.1 */
 		sc->opcode_shift = 20;
 		sc->high_operand_shift = 10;
-		sc->code_base = MICROCODEBASE;
+		sc->code_base = EMU_MICROCODEBASE;
 		sc->code_size = 0x400 / 2;	/* 0x400-0x7ff,  1024 words,
 						 * 512 instructions */
-		sc->gpr_base = FXGPREGBASE;
+		sc->gpr_base = EMU_FXGPREGBASE;
 		sc->num_gprs = 0x100;
 		sc->input_base = 0x10;
 		sc->output_base = 0x20;
@@ -3171,7 +3185,7 @@
 		sc->num_fxbuses = 8;
 		sc->num_inputs = 8;
 		sc->num_outputs = 16;
-		sc->address_mask = PTR_ADDRESS_MASK;
+		sc->address_mask = EMU_PTR_ADDR_MASK;
 	}
 	if (sc->opcode_shift == 0)
 		goto bad;
@@ -3379,7 +3393,7 @@
 		}
 		midiinfo->card = sc;
 		if (sc->is_emu10k2 || (sc->is_ca0102)) {
-			midiinfo->port = A_MUDATA1;
+			midiinfo->port = EMU_A_MUDATA1;
 			midiinfo->portnr = 1;
 		}
 		if (sc->is_emu10k1) {
@@ -3405,7 +3419,7 @@
 		}
 		midiinfo->card = sc;
 
-		midiinfo->port = A_MUDATA2;
+		midiinfo->port = EMU_A_MUDATA2;
 		midiinfo->portnr = 2;
 
 		func->func = SCF_MIDI;
--- modules/sound/driver/emu10k1/Makefile.orig	2011-01-10 09:49:53.000000000 +0000
+++ modules/sound/driver/emu10k1/Makefile	2011-01-10 09:54:56.000000000 +0000
@@ -4,16 +4,8 @@
        ${.CURDIR}/../../../../gnu/dev/sound/pci
 
 KMOD=	snd_emu10k1
-SRCS=	device_if.h bus_if.h pci_if.h emu10k1-alsa%diked.h
+SRCS=	device_if.h bus_if.h pci_if.h emu10k1reg.h
 SRCS+= mpufoi_if.h
 SRCS+=	emu10k1.c
 
-CLEANFILES+= emu10k1-alsa%diked.h
-
-emu10k1-alsa%diked.h: emu10k1-alsa.h
-	grep -v '#include' ${.OODATE} | $(CC) -E -D__KERNEL__ -dM - \
-	    | awk -F"[ 	(]" '/define/ \
-	    { print "#ifndef " $$2 ; print ; print "#endif" }' \
-	    >${.TARGET}
-
 .include <bsd.kmod.mk>
--- modules/sound/driver/emu10kx/Makefile.orig	2011-01-10 09:49:09.000000000 +0000
+++ modules/sound/driver/emu10kx/Makefile	2011-01-10 09:54:53.000000000 +0000
@@ -11,16 +11,11 @@
 SRCS+=	emu10kx.c
 SRCS+=	emu10kx-pcm.c
 SRCS+=	emu10kx-midi.c
+SRCS+=	emu10k1reg.h
 # de-GPLed Makefiles
-SRCS+=	emu10k1-alsa%diked.h
 SRCS+=	p16v-alsa%diked.h
 SRCS+=	p17v-alsa%diked.h
 
-emu10k1-alsa%diked.h: emu10k1-alsa.h
-	grep -v '#include' ${.OODATE} | $(CC) -E -D__KERNEL__ -dM - \
-	    | awk -F"[ 	(]" '/define/ \
-	    { print "#ifndef " $$2 ; print ; print "#endif" }' \
-	    >${.TARGET}
 p16v-alsa%diked.h: p16v-alsa.h
 	grep -v '#include' ${.OODATE} | $(CC) -E -D__KERNEL__ -dM - \
 	    | awk -F"[ 	(]" '/define/ \
@@ -32,7 +27,6 @@
 	    { print "#ifndef " $$2 ; print ; print "#endif" }' \
 	    >${.TARGET}
 
-CLEANFILES+=	emu10k1-alsa%diked.h
 CLEANFILES+=	p16v-alsa%diked.h
 CLEANFILES+=	p17v-alsa%diked.h
 


>Release-Note:
>Audit-Trail:
Responsible-Changed-From-To: freebsd-bugs->freebsd-multimedia 
Responsible-Changed-By: linimon 
Responsible-Changed-When: Thu Jan 13 10:03:21 UTC 2011 
Responsible-Changed-Why:  
Over to maintainer(s). 

http://www.freebsd.org/cgi/query-pr.cgi?pr=153901 
Responsible-Changed-From-To: freebsd-multimedia->pfg 
Responsible-Changed-By: pfg 
Responsible-Changed-When: Mon Dec 19 20:47:23 UTC 2011 
Responsible-Changed-Why:  
I'll take care of this. 

http://www.freebsd.org/cgi/query-pr.cgi?pr=153901 

From: "Pedro F. Giffuni" <giffunip@tutopia.com>
To: bug-followup@FreeBSD.org
Cc:  
Subject: Re: kern/153901: [sound] [patch] Replace the GPL'd emu10k1-alsa.h with emuxkireg.h from NetBSD
Date: Mon, 19 Dec 2011 12:44:29 -0800 (PST)

 ---651035290-1309879543-1324327469=:28994
 Content-Type: text/plain; charset=utf-8
 Content-Transfer-Encoding: quoted-printable
 
 I am attaching an update that focuses only on the=0Aemu10k1 driver.=0A=0A
 ---651035290-1309879543-1324327469=:28994
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 ---651035290-1309879543-1324327469=:28994--

From: dfilter@FreeBSD.ORG (dfilter service)
To: bug-followup@FreeBSD.org
Cc:  
Subject: Re: kern/153901: commit references a PR
Date: Tue,  3 Jan 2012 21:05:07 +0000 (UTC)

 Author: pfg
 Date: Tue Jan  3 21:04:54 2012
 New Revision: 229430
 URL: http://svn.freebsd.org/changeset/base/229430
 
 Log:
   Replace a GPL'd header in the emu10k1 snd driver code.
   
   This brings in the emuxkireg.h from NetBSD (dev/pci) which
   is used for the same purpose but is smaller. The emu10k1
   is now free from the GPL.
   
   PR:		153901
   Obtained from:	NetBSD
   Approved by:	core (mentor implicit)
   MFC after:	2 weeks
 
 Added:
   head/sys/dev/sound/pci/emuxkireg.h   (contents, props changed)
 Modified:
   head/sys/conf/files
   head/sys/dev/sound/pci/emu10k1.c
   head/sys/modules/sound/driver/emu10k1/Makefile
 
 Modified: head/sys/conf/files
 ==============================================================================
 --- head/sys/conf/files	Tue Jan  3 21:03:28 2012	(r229429)
 +++ head/sys/conf/files	Tue Jan  3 21:04:54 2012	(r229430)
 @@ -50,7 +50,7 @@ aic79xx_reg_print.c	optional ahd pci				
  aic79xx_reg_print.o		optional ahd pci ahd_reg_pretty_print	   \
  	compile-with	"${NORMAL_C}"					   \
  	no-implicit-rule local
 -emu10k1-alsa%diked.h		optional snd_emu10k1 | snd_emu10kx	   \
 +emu10k1-alsa%diked.h		optional snd_emu10kx	   \
  	dependency	"$S/tools/sound/emu10k1-mkalsa.sh $S/gnu/dev/sound/pci/emu10k1-alsa.h" \
  	compile-with	"CC='${CC}' AWK=${AWK} sh $S/tools/sound/emu10k1-mkalsa.sh $S/gnu/dev/sound/pci/emu10k1-alsa.h emu10k1-alsa%diked.h" \
  	no-obj no-implicit-rule before-depend				   \
 @@ -1732,9 +1732,7 @@ dev/sound/pci/csa.c		optional snd_csa pc
  	warning "kernel contains GPL contaminated csaimg.h header"
  dev/sound/pci/csapcm.c		optional snd_csa pci
  dev/sound/pci/ds1.c		optional snd_ds1 pci
 -dev/sound/pci/emu10k1.c		optional snd_emu10k1 pci \
 -	dependency "emu10k1-alsa%diked.h" \
 -	warning "kernel contains GPL contaminated emu10k1 headers"
 +dev/sound/pci/emu10k1.c		optional snd_emu10k1 pci
  dev/sound/pci/emu10kx.c		optional snd_emu10kx pci \
  	dependency "emu10k1-alsa%diked.h" \
  	dependency "p16v-alsa%diked.h" \
 
 Modified: head/sys/dev/sound/pci/emu10k1.c
 ==============================================================================
 --- head/sys/dev/sound/pci/emu10k1.c	Tue Jan  3 21:03:28 2012	(r229429)
 +++ head/sys/dev/sound/pci/emu10k1.c	Tue Jan  3 21:04:54 2012	(r229430)
 @@ -32,7 +32,7 @@
  
  #include <dev/sound/pcm/sound.h>
  #include <dev/sound/pcm/ac97.h>
 -#include "emu10k1-alsa%diked.h"
 +#include <dev/sound/pci/emuxkireg.h>
  
  #include <dev/pci/pcireg.h>
  #include <dev/pci/pcivar.h>
 @@ -66,12 +66,94 @@ SND_DECLARE_FILE("$FreeBSD$");
  
  #define	ENABLE		0xffffffff
  #define	DISABLE		0x00000000
 -#define	ENV_ON		DCYSUSV_CHANNELENABLE_MASK
 +#define	ENV_ON		EMU_CHAN_DCYSUSV_CHANNELENABLE_MASK
  #define	ENV_OFF		0x00	/* XXX: should this be 1? */
  
 -#define	A_IOCFG_GPOUT_A	0x40	/* Analog Output */
 -#define	A_IOCFG_GPOUT_D	0x04	/* Digital Output */
 -#define	A_IOCFG_GPOUT_AD (A_IOCFG_GPOUT_A|A_IOCFG_GPOUT_D)  /* A_IOCFG_GPOUT0 */
 +#define	EMU_A_IOCFG_GPOUT_A	0x40
 +#define	EMU_A_IOCFG_GPOUT_D	0x04
 +#define	EMU_A_IOCFG_GPOUT_AD (EMU_A_IOCFG_GPOUT_A|EMU_A_IOCFG_GPOUT_D)  /* EMU_A_IOCFG_GPOUT0 */
 +
 +#define	EMU_HCFG_GPOUT1		0x00000800
 +
 +/* instruction set */
 +#define iACC3	 0x06
 +#define iMACINT0 0x04
 +#define iINTERP  0x0e
 +
 +#define C_00000000	0x40
 +#define C_00000001	0x41
 +#define C_00000004	0x44
 +#define C_40000000	0x4d
 +/* Audigy constants */
 +#define A_C_00000000	0xc0
 +#define A_C_40000000	0xcd
 +
 +/* GPRs */
 +#define FXBUS(x)	(0x00 + (x))
 +#define EXTIN(x)	(0x10 + (x))
 +#define EXTOUT(x)	(0x20 + (x))
 +
 +#define GPR(x)		(EMU_FXGPREGBASE + (x))
 +#define A_EXTIN(x)	(0x40 + (x))
 +#define A_FXBUS(x)	(0x00 + (x))
 +#define A_EXTOUT(x)	(0x60 + (x))
 +#define A_GPR(x)	(EMU_A_FXGPREGBASE + (x))
 +
 +/* FX buses */
 +#define FXBUS_PCM_LEFT		0x00
 +#define FXBUS_PCM_RIGHT		0x01
 +#define FXBUS_MIDI_LEFT		0x04
 +#define FXBUS_MIDI_RIGHT	0x05
 +#define FXBUS_MIDI_REVERB	0x0c
 +#define FXBUS_MIDI_CHORUS	0x0d
 +
 +/* Inputs */
 +#define EXTIN_AC97_L		0x00
 +#define EXTIN_AC97_R		0x01
 +#define EXTIN_SPDIF_CD_L	0x02
 +#define EXTIN_SPDIF_CD_R	0x03
 +#define EXTIN_TOSLINK_L		0x06
 +#define EXTIN_TOSLINK_R		0x07
 +#define EXTIN_COAX_SPDIF_L	0x0a
 +#define EXTIN_COAX_SPDIF_R	0x0b
 +/* Audigy Inputs */
 +#define A_EXTIN_AC97_L		0x00
 +#define A_EXTIN_AC97_R		0x01
 +
 +/* Outputs */
 +#define EXTOUT_AC97_L	   0x00
 +#define EXTOUT_AC97_R	   0x01
 +#define EXTOUT_TOSLINK_L   0x02
 +#define EXTOUT_TOSLINK_R   0x03
 +#define EXTOUT_AC97_CENTER 0x04
 +#define EXTOUT_AC97_LFE	   0x05
 +#define EXTOUT_HEADPHONE_L 0x06
 +#define EXTOUT_HEADPHONE_R 0x07
 +#define EXTOUT_REAR_L	   0x08
 +#define EXTOUT_REAR_R	   0x09
 +#define EXTOUT_ADC_CAP_L   0x0a
 +#define EXTOUT_ADC_CAP_R   0x0b
 +#define EXTOUT_ACENTER	   0x11
 +#define EXTOUT_ALFE	   0x12
 +/* Audigy Outputs */
 +#define A_EXTOUT_FRONT_L	0x00
 +#define A_EXTOUT_FRONT_R	0x01
 +#define A_EXTOUT_CENTER		0x02
 +#define A_EXTOUT_LFE		0x03
 +#define A_EXTOUT_HEADPHONE_L	0x04
 +#define A_EXTOUT_HEADPHONE_R	0x05
 +#define A_EXTOUT_REAR_L		0x06
 +#define A_EXTOUT_REAR_R		0x07
 +#define A_EXTOUT_AFRONT_L	0x08
 +#define A_EXTOUT_AFRONT_R	0x09
 +#define A_EXTOUT_ACENTER	0x0a
 +#define A_EXTOUT_ALFE		0x0b
 +#define A_EXTOUT_AREAR_L	0x0e
 +#define A_EXTOUT_AREAR_R	0x0f
 +#define A_EXTOUT_AC97_L		0x10
 +#define A_EXTOUT_AC97_R		0x11
 +#define A_EXTOUT_ADC_CAP_L	0x16
 +#define A_EXTOUT_ADC_CAP_R	0x17
  
  struct emu_memblk {
  	SLIST_ENTRY(emu_memblk) link;
 @@ -247,9 +329,9 @@ emu_rdptr(struct sc_info *sc, int chn, i
  {
  	u_int32_t ptr, val, mask, size, offset;
  
 -	ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK);
 -	emu_wr(sc, PTR, ptr, 4);
 -	val = emu_rd(sc, DATA, 4);
 +	ptr = ((reg << 16) & sc->addrmask) | (chn & EMU_PTR_CHNO_MASK);
 +	emu_wr(sc, EMU_PTR, ptr, 4);
 +	val = emu_rd(sc, EMU_DATA, 4);
  	if (reg & 0xff000000) {
  		size = (reg >> 24) & 0x3f;
  		offset = (reg >> 16) & 0x1f;
 @@ -265,23 +347,23 @@ emu_wrptr(struct sc_info *sc, int chn, i
  {
  	u_int32_t ptr, mask, size, offset;
  
 -	ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK);
 -	emu_wr(sc, PTR, ptr, 4);
 +	ptr = ((reg << 16) & sc->addrmask) | (chn & EMU_PTR_CHNO_MASK);
 +	emu_wr(sc, EMU_PTR, ptr, 4);
  	if (reg & 0xff000000) {
  		size = (reg >> 24) & 0x3f;
  		offset = (reg >> 16) & 0x1f;
  		mask = ((1 << size) - 1) << offset;
  		data <<= offset;
  		data &= mask;
 -		data |= emu_rd(sc, DATA, 4) & ~mask;
 +		data |= emu_rd(sc, EMU_DATA, 4) & ~mask;
  	}
 -	emu_wr(sc, DATA, data, 4);
 +	emu_wr(sc, EMU_DATA, data, 4);
  }
  
  static void
  emu_wrefx(struct sc_info *sc, unsigned int pc, unsigned int data)
  {
 -	pc += sc->audigy ? A_MICROCODEBASE : MICROCODEBASE;
 +	pc += sc->audigy ? EMU_A_MICROCODEBASE : EMU_MICROCODEBASE;
  	emu_wrptr(sc, 0, pc, data);
  }
  
 @@ -294,8 +376,8 @@ emu_rdcd(kobj_t obj, void *devinfo, int 
  {
  	struct sc_info *sc = (struct sc_info *)devinfo;
  
 -	emu_wr(sc, AC97ADDRESS, regno, 1);
 -	return emu_rd(sc, AC97DATA, 2);
 +	emu_wr(sc, EMU_AC97ADDR, regno, 1);
 +	return emu_rd(sc, EMU_AC97DATA, 2);
  }
  
  static int
 @@ -303,8 +385,8 @@ emu_wrcd(kobj_t obj, void *devinfo, int 
  {
  	struct sc_info *sc = (struct sc_info *)devinfo;
  
 -	emu_wr(sc, AC97ADDRESS, regno, 1);
 -	emu_wr(sc, AC97DATA, data, 2);
 +	emu_wr(sc, EMU_AC97ADDR, regno, 1);
 +	emu_wr(sc, EMU_AC97DATA, data, 2);
  	return 0;
  }
  
 @@ -346,7 +428,7 @@ emu_settimer(struct sc_info *sc)
  	}
  	RANGE(rate, 48, 9600);
  	sc->timerinterval = 48000 / rate;
 -	emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2);
 +	emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2);
  
  	return sc->timerinterval;
  }
 @@ -357,15 +439,15 @@ emu_enatimer(struct sc_info *sc, int go)
  	u_int32_t x;
  	if (go) {
  		if (sc->timer++ == 0) {
 -			x = emu_rd(sc, INTE, 4);
 -			x |= INTE_INTERVALTIMERENB;
 -			emu_wr(sc, INTE, x, 4);
 +			x = emu_rd(sc, EMU_INTE, 4);
 +			x |= EMU_INTE_INTERTIMERENB;
 +			emu_wr(sc, EMU_INTE, x, 4);
  		}
  	} else {
  		sc->timer = 0;
 -		x = emu_rd(sc, INTE, 4);
 -		x &= ~INTE_INTERVALTIMERENB;
 -		emu_wr(sc, INTE, x, 4);
 +		x = emu_rd(sc, EMU_INTE, 4);
 +		x &= ~EMU_INTE_INTERTIMERENB;
 +		emu_wr(sc, EMU_INTE, x, 4);
  	}
  	return 0;
  }
 @@ -373,7 +455,7 @@ emu_enatimer(struct sc_info *sc, int go)
  static void
  emu_enastop(struct sc_info *sc, char channel, int enable)
  {
 -	int reg = (channel & 0x20) ? SOLEH : SOLEL;
 +	int reg = (channel & 0x20) ? EMU_SOLEH : EMU_SOLEL;
  	channel &= 0x1f;
  	reg |= 1 << 24;
  	reg |= channel << 16;
 @@ -568,49 +650,49 @@ emu_vwrite(struct sc_info *sc, struct em
  		r = v->ismaster ? 0 : r;
  	}
  
 -	emu_wrptr(sc, v->vnum, CPF, v->stereo ? CPF_STEREO_MASK : 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, v->stereo ? EMU_CHAN_CPF_STEREO_MASK : 0);
  	val = v->stereo ? 28 : 30;
  	val *= v->b16 ? 1 : 2;
  	start = sa + val;
  
  	if (sc->audigy) {
 -		emu_wrptr(sc, v->vnum, A_FXRT1, v->fxrt1);
 -		emu_wrptr(sc, v->vnum, A_FXRT2, v->fxrt2);
 -		emu_wrptr(sc, v->vnum, A_SENDAMOUNTS, 0);
 +		emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT1, v->fxrt1);
 +		emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT2, v->fxrt2);
 +		emu_wrptr(sc, v->vnum, EMU_A_CHAN_SENDAMOUNTS, 0);
  	}
  	else
 -		emu_wrptr(sc, v->vnum, FXRT, v->fxrt1 << 16);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_FXRT, v->fxrt1 << 16);
  
 -	emu_wrptr(sc, v->vnum, PTRX, (x << 8) | r);
 -	emu_wrptr(sc, v->vnum, DSL, ea | (y << 24));
 -	emu_wrptr(sc, v->vnum, PSST, sa | (l << 24));
 -	emu_wrptr(sc, v->vnum, CCCA, start | (v->b16 ? 0 : CCCA_8BITSELECT));
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX, (x << 8) | r);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_DSL, ea | (y << 24));
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_PSST, sa | (l << 24));
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_CCCA, start | (v->b16 ? 0 : EMU_CHAN_CCCA_8BITSELECT));
  
 -	emu_wrptr(sc, v->vnum, Z1, 0);
 -	emu_wrptr(sc, v->vnum, Z2, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_Z1, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_Z2, 0);
  
  	silent_page = ((u_int32_t)(sc->mem.silent_page_addr) << 1)
 -	    | MAP_PTI_MASK;
 -	emu_wrptr(sc, v->vnum, MAPA, silent_page);
 -	emu_wrptr(sc, v->vnum, MAPB, silent_page);
 -
 -	emu_wrptr(sc, v->vnum, CVCF, CVCF_CURRENTFILTER_MASK);
 -	emu_wrptr(sc, v->vnum, VTFT, VTFT_FILTERTARGET_MASK);
 -	emu_wrptr(sc, v->vnum, ATKHLDM, 0);
 -	emu_wrptr(sc, v->vnum, DCYSUSM, DCYSUSM_DECAYTIME_MASK);
 -	emu_wrptr(sc, v->vnum, LFOVAL1, 0x8000);
 -	emu_wrptr(sc, v->vnum, LFOVAL2, 0x8000);
 -	emu_wrptr(sc, v->vnum, FMMOD, 0);
 -	emu_wrptr(sc, v->vnum, TREMFRQ, 0);
 -	emu_wrptr(sc, v->vnum, FM2FRQ2, 0);
 -	emu_wrptr(sc, v->vnum, ENVVAL, 0x8000);
 -
 -	emu_wrptr(sc, v->vnum, ATKHLDV,
 -	    ATKHLDV_HOLDTIME_MASK | ATKHLDV_ATTACKTIME_MASK);
 -	emu_wrptr(sc, v->vnum, ENVVOL, 0x8000);
 +	    | EMU_CHAN_MAP_PTI_MASK;
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_MAPA, silent_page);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_MAPB, silent_page);
 +
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, EMU_CHAN_CVCF_CURRFILTER_MASK);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, EMU_CHAN_VTFT_FILTERTARGET_MASK);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDM, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSM, EMU_CHAN_DCYSUSM_DECAYTIME_MASK);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL1, 0x8000);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL2, 0x8000);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_FMMOD, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_TREMFRQ, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_FM2FRQ2, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVAL, 0x8000);
 +
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDV,
 +	    EMU_CHAN_ATKHLDV_HOLDTIME_MASK | EMU_CHAN_ATKHLDV_ATTACKTIME_MASK);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVOL, 0x8000);
  
 -	emu_wrptr(sc, v->vnum, PEFE_FILTERAMOUNT, 0x7f);
 -	emu_wrptr(sc, v->vnum, PEFE_PITCHAMOUNT, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_FILTERAMOUNT, 0x7f);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_PITCHAMOUNT, 0);
  
  	if (v->slave != NULL)
  		emu_vwrite(sc, v->slave);
 @@ -631,29 +713,29 @@ emu_vtrigger(struct sc_info *sc, struct 
  		sample = v->b16 ? 0x00000000 : 0x80808080;
  
  		for (i = 0; i < cs; i++)
 -			emu_wrptr(sc, v->vnum, CD0 + i, sample);
 -		emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, 0);
 -		emu_wrptr(sc, v->vnum, CCR_READADDRESS, cra);
 -		emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, ccis);
 -
 -		emu_wrptr(sc, v->vnum, IFATN, 0xff00);
 -		emu_wrptr(sc, v->vnum, VTFT, 0xffffffff);
 -		emu_wrptr(sc, v->vnum, CVCF, 0xffffffff);
 -		emu_wrptr(sc, v->vnum, DCYSUSV, 0x00007f7f);
 +			emu_wrptr(sc, v->vnum, EMU_CHAN_CD0 + i, sample);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_READADDRESS, cra);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, ccis);
 +
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xff00);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0xffffffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0xffffffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSV, 0x00007f7f);
  		emu_enastop(sc, v->vnum, 0);
  
  		pitch_target = emu_rate_to_linearpitch(v->speed);
  		initial_pitch = emu_rate_to_pitch(v->speed) >> 8;
 -		emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, pitch_target);
 -		emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, pitch_target);
 -		emu_wrptr(sc, v->vnum, IP, initial_pitch);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, pitch_target);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, pitch_target);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_IP, initial_pitch);
  	} else {
 -		emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, 0);
 -		emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, 0);
 -		emu_wrptr(sc, v->vnum, IFATN, 0xffff);
 -		emu_wrptr(sc, v->vnum, VTFT, 0x0000ffff);
 -		emu_wrptr(sc, v->vnum, CVCF, 0x0000ffff);
 -		emu_wrptr(sc, v->vnum, IP, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0x0000ffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0x0000ffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_IP, 0);
  		emu_enastop(sc, v->vnum, 1);
  	}
  	if (v->slave != NULL)
 @@ -666,7 +748,7 @@ emu_vpos(struct sc_info *sc, struct emu_
  	int s, ptr;
  
  	s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0);
 -	ptr = (emu_rdptr(sc, v->vnum, CCCA_CURRADDR) - (v->start >> s)) << s;
 +	ptr = (emu_rdptr(sc, v->vnum, EMU_CHAN_CCCA_CURRADDR) - (v->start >> s)) << s;
  	return ptr & ~0x0000001f;
  }
  
 @@ -875,27 +957,27 @@ emurchan_init(kobj_t obj, void *devinfo,
  	ch->num = sc->rnum;
  	switch(sc->rnum) {
  	case 0:
 -		ch->idxreg = sc->audigy ? A_ADCIDX : ADCIDX;
 -		ch->basereg = ADCBA;
 -		ch->sizereg = ADCBS;
 -		ch->setupreg = ADCCR;
 -		ch->irqmask = INTE_ADCBUFENABLE;
 +		ch->idxreg = sc->audigy ? EMU_A_ADCIDX : EMU_ADCIDX;
 +		ch->basereg = EMU_ADCBA;
 +		ch->sizereg = EMU_ADCBS;
 +		ch->setupreg = EMU_ADCCR;
 +		ch->irqmask = EMU_INTE_ADCBUFENABLE;
  		break;
  
  	case 1:
 -		ch->idxreg = FXIDX;
 -		ch->basereg = FXBA;
 -		ch->sizereg = FXBS;
 -		ch->setupreg = FXWC;
 -		ch->irqmask = INTE_EFXBUFENABLE;
 +		ch->idxreg = EMU_FXIDX;
 +		ch->basereg = EMU_FXBA;
 +		ch->sizereg = EMU_FXBS;
 +		ch->setupreg = EMU_FXWC;
 +		ch->irqmask = EMU_INTE_EFXBUFENABLE;
  		break;
  
  	case 2:
 -		ch->idxreg = MICIDX;
 -		ch->basereg = MICBA;
 -		ch->sizereg = MICBS;
 +		ch->idxreg = EMU_MICIDX;
 +		ch->basereg = EMU_MICBA;
 +		ch->sizereg = EMU_MICBS;
  		ch->setupreg = 0;
 -		ch->irqmask = INTE_MICBUFENABLE;
 +		ch->irqmask = EMU_INTE_MICBUFENABLE;
  		break;
  	}
  	sc->rnum++;
 @@ -967,27 +1049,27 @@ emurchan_trigger(kobj_t obj, void *data,
  
  	switch(sc->bufsz) {
  	case 4096:
 -		sz = ADCBS_BUFSIZE_4096;
 +		sz = EMU_RECBS_BUFSIZE_4096;
  		break;
  
  	case 8192:
 -		sz = ADCBS_BUFSIZE_8192;
 +		sz = EMU_RECBS_BUFSIZE_8192;
  		break;
  
  	case 16384:
 -		sz = ADCBS_BUFSIZE_16384;
 +		sz = EMU_RECBS_BUFSIZE_16384;
  		break;
  
  	case 32768:
 -		sz = ADCBS_BUFSIZE_32768;
 +		sz = EMU_RECBS_BUFSIZE_32768;
  		break;
  
  	case 65536:
 -		sz = ADCBS_BUFSIZE_65536;
 +		sz = EMU_RECBS_BUFSIZE_65536;
  		break;
  
  	default:
 -		sz = ADCBS_BUFSIZE_4096;
 +		sz = EMU_RECBS_BUFSIZE_4096;
  	}
  
  	snd_mtxlock(sc->lock);
 @@ -997,23 +1079,23 @@ emurchan_trigger(kobj_t obj, void *data,
  		emu_wrptr(sc, 0, ch->sizereg, sz);
  		if (ch->num == 0) {
  			if (sc->audigy) {
 -				val = A_ADCCR_LCHANENABLE;
 +				val = EMU_ADCCR_LCHANENABLE;
  				if (AFMT_CHANNEL(ch->fmt) > 1)
 -					val |= A_ADCCR_RCHANENABLE;
 +					val |= EMU_ADCCR_RCHANENABLE;
  				val |= audigy_recval(ch->spd);
  			} else {
 -				val = ADCCR_LCHANENABLE;
 +				val = EMU_ADCCR_LCHANENABLE;
  				if (AFMT_CHANNEL(ch->fmt) > 1)
 -					val |= ADCCR_RCHANENABLE;
 +					val |= EMU_ADCCR_RCHANENABLE;
  				val |= emu_recval(ch->spd);
  			}
  
  			emu_wrptr(sc, 0, ch->setupreg, 0);
  			emu_wrptr(sc, 0, ch->setupreg, val);
  		}
 -		val = emu_rd(sc, INTE, 4);
 +		val = emu_rd(sc, EMU_INTE, 4);
  		val |= ch->irqmask;
 -		emu_wr(sc, INTE, val, 4);
 +		emu_wr(sc, EMU_INTE, val, 4);
  		break;
  
  	case PCMTRIG_STOP:
 @@ -1022,9 +1104,9 @@ emurchan_trigger(kobj_t obj, void *data,
  		emu_wrptr(sc, 0, ch->sizereg, 0);
  		if (ch->setupreg)
  			emu_wrptr(sc, 0, ch->setupreg, 0);
 -		val = emu_rd(sc, INTE, 4);
 +		val = emu_rd(sc, EMU_INTE, 4);
  		val &= ~ch->irqmask;
 -		emu_wr(sc, INTE, val, 4);
 +		emu_wr(sc, EMU_INTE, val, 4);
  		break;
  
  	case PCMTRIG_EMLDMAWR:
 @@ -1122,9 +1204,9 @@ emu_midiattach(struct sc_info *sc)
  {
  	int i;
  
 -	i = emu_rd(sc, INTE, 4);
 -	i |= INTE_MIDIRXENABLE;
 -	emu_wr(sc, INTE, i, 4);
 +	i = emu_rd(sc, EMU_INTE, 4);
 +	i |= EMU_INTE_MIDIRXENABLE;
 +	emu_wr(sc, EMU_INTE, i, 4);
  
  	sc->mpu = mpu401_init(&emu_mpu_class, sc, emu_intr2, &sc->mpu_intr);
  }
 @@ -1139,52 +1221,52 @@ emu_intr(void *data)
  
  	snd_mtxlock(sc->lock);
  	while (1) {
 -		stat = emu_rd(sc, IPR, 4);
 +		stat = emu_rd(sc, EMU_IPR, 4);
  		if (stat == 0)
  			break;
  		ack = 0;
  
  		/* process irq */
 -		if (stat & IPR_INTERVALTIMER)
 -			ack |= IPR_INTERVALTIMER;
 +		if (stat & EMU_IPR_INTERVALTIMER)
 +			ack |= EMU_IPR_INTERVALTIMER;
  
 -		if (stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL))
 -			ack |= stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL);
 +		if (stat & (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL))
 +			ack |= stat & (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL);
  
 -		if (stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL))
 -			ack |= stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL);
 +		if (stat & (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL))
 +			ack |= stat & (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL);
  
 -		if (stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL))
 -			ack |= stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL);
 +		if (stat & (EMU_IPR_MICBUFFULL | EMU_IPR_MICBUFHALFFULL))
 +			ack |= stat & (EMU_IPR_MICBUFFULL | EMU_IPR_MICBUFHALFFULL);
  
 -		if (stat & IPR_PCIERROR) {
 -			ack |= IPR_PCIERROR;
 +		if (stat & EMU_PCIERROR) {
 +			ack |= EMU_PCIERROR;
  			device_printf(sc->dev, "pci error\n");
  			/* we still get an nmi with ecc ram even if we ack this */
  		}
 -		if (stat & IPR_SAMPLERATETRACKER) {
 -			ack |= IPR_SAMPLERATETRACKER;
 +		if (stat & EMU_IPR_RATETRCHANGE) {
 +			ack |= EMU_IPR_RATETRCHANGE;
  #ifdef EMUDEBUG
  			device_printf(sc->dev,
  			    "sample rate tracker lock status change\n");
  #endif
  		}
  
 -	    if (stat & IPR_MIDIRECVBUFEMPTY)
 +	    if (stat & EMU_IPR_MIDIRECVBUFE)
  		if (sc->mpu_intr) {
  		    (sc->mpu_intr)(sc->mpu);
 -		    ack |= IPR_MIDIRECVBUFEMPTY | IPR_MIDITRANSBUFEMPTY;
 +		    ack |= EMU_IPR_MIDIRECVBUFE | EMU_IPR_MIDITRANSBUFE;
   		}
  		if (stat & ~ack)
  			device_printf(sc->dev, "dodgy irq: %x (harmless)\n",
  			    stat & ~ack);
  
 -		emu_wr(sc, IPR, stat, 4);
 +		emu_wr(sc, EMU_IPR, stat, 4);
  
  		if (ack) {
  			snd_mtxunlock(sc->lock);
  
 -			if (ack & IPR_INTERVALTIMER) {
 +			if (ack & EMU_IPR_INTERVALTIMER) {
  				x = 0;
  				for (i = 0; i < sc->nchans; i++) {
  					if (sc->pch[i].run) {
 @@ -1197,15 +1279,15 @@ emu_intr(void *data)
  			}
  
  
 -			if (ack & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) {
 +			if (ack & (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL)) {
  				if (sc->rch[0].channel)
  					chn_intr(sc->rch[0].channel);
  			}
 -			if (ack & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) {
 +			if (ack & (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL)) {
  				if (sc->rch[1].channel)
  					chn_intr(sc->rch[1].channel);
  			}
 -			if (ack & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL)) {
 +			if (ack & (EMU_IPR_MICBUFFULL | EMU_IPR_MICBUFHALFFULL)) {
  				if (sc->rch[2].channel)
  					chn_intr(sc->rch[2].channel);
  			}
 @@ -1378,12 +1460,12 @@ audigy_initefx(struct sc_info *sc)
  		audigy_addefxop(sc, 0x0f, 0x0c0, 0x0c0, 0x0cf, 0x0c0, &pc);
  
  	for (i = 0; i < 512; i++)
 -		emu_wrptr(sc, 0, A_FXGPREGBASE + i, 0x0);
 +		emu_wrptr(sc, 0, EMU_A_FXGPREGBASE + i, 0x0);
  
  	pc = 16;
  
  	/* stop fx processor */
 -	emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP);
 +	emu_wrptr(sc, 0, EMU_A_DBG, EMU_A_DBG_SINGLE_STEP);
  
  	/* Audigy 2 (EMU10K2) DSP Registers:
  	   FX Bus
 @@ -1518,7 +1600,7 @@ audigy_initefx(struct sc_info *sc)
  			A_C_00000000, A_EXTIN(A_EXTIN_AC97_R), &pc);
  
  	/* resume normal operations */
 -	emu_wrptr(sc, 0, A_DBG, 0);
 +	emu_wrptr(sc, 0, EMU_A_DBG, 0);
  }
  
  static void
 @@ -1534,7 +1616,7 @@ emu_initefx(struct sc_info *sc)
  	}
  
  	for (i = 0; i < 256; i++)
 -		emu_wrptr(sc, 0, FXGPREGBASE + i, 0);
 +		emu_wrptr(sc, 0, EMU_FXGPREGBASE + i, 0);
  
  	/* FX-8010 DSP Registers:
  	   FX Bus
 @@ -1654,7 +1736,7 @@ emu_initefx(struct sc_info *sc)
  			C_00000000, EXTIN(EXTIN_AC97_R), &pc);
  
  	/* resume normal operations */
 -	emu_wrptr(sc, 0, DBG, 0);
 +	emu_wrptr(sc, 0, EMU_DBG, 0);
  }
  
  /* Probe and attach the card */
 @@ -1665,69 +1747,69 @@ emu_init(struct sc_info *sc)
  
  	if (sc->audigy) {
  		/* enable additional AC97 slots */
 -		emu_wrptr(sc, 0, AC97SLOT, AC97SLOT_CNTR | AC97SLOT_LFE);
 +		emu_wrptr(sc, 0, EMU_AC97SLOT, EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE);
  	}
  
  	/* disable audio and lock cache */
 -	emu_wr(sc, HCFG,
 -	    HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
 +	emu_wr(sc, EMU_HCFG,
 +	    EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE,
  	    4);
  
  	/* reset recording buffers */
 -	emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, MICBA, 0);
 -	emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, FXBA, 0);
 -	emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, ADCBA, 0);
 +	emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_MICBA, 0);
 +	emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_FXBA, 0);
 +	emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_ADCBA, 0);
  
  	/* disable channel interrupt */
 -	emu_wr(sc, INTE,
 -	    INTE_INTERVALTIMERENB | INTE_SAMPLERATETRACKER | INTE_PCIERRORENABLE,
 +	emu_wr(sc, EMU_INTE,
 +	    EMU_INTE_INTERTIMERENB | EMU_INTE_SAMPLERATER | EMU_INTE_PCIERRENABLE,
  	    4);
 -	emu_wrptr(sc, 0, CLIEL, 0);
 -	emu_wrptr(sc, 0, CLIEH, 0);
 -	emu_wrptr(sc, 0, SOLEL, 0);
 -	emu_wrptr(sc, 0, SOLEH, 0);
 +	emu_wrptr(sc, 0, EMU_CLIEL, 0);
 +	emu_wrptr(sc, 0, EMU_CLIEH, 0);
 +	emu_wrptr(sc, 0, EMU_SOLEL, 0);
 +	emu_wrptr(sc, 0, EMU_SOLEH, 0);
  
  	/* wonder what these do... */
  	if (sc->audigy) {
 -		emu_wrptr(sc, 0, SPBYPASS, 0xf00);
 -		emu_wrptr(sc, 0, AC97SLOT, 0x3);
 +		emu_wrptr(sc, 0, EMU_SPBYPASS, 0xf00);
 +		emu_wrptr(sc, 0, EMU_AC97SLOT, 0x3);
  	}
  
  	/* init envelope engine */
  	for (ch = 0; ch < NUM_G; ch++) {
 -		emu_wrptr(sc, ch, DCYSUSV, ENV_OFF);
 -		emu_wrptr(sc, ch, IP, 0);
 -		emu_wrptr(sc, ch, VTFT, 0xffff);
 -		emu_wrptr(sc, ch, CVCF, 0xffff);
 -		emu_wrptr(sc, ch, PTRX, 0);
 -		emu_wrptr(sc, ch, CPF, 0);
 -		emu_wrptr(sc, ch, CCR, 0);
 -
 -		emu_wrptr(sc, ch, PSST, 0);
 -		emu_wrptr(sc, ch, DSL, 0x10);
 -		emu_wrptr(sc, ch, CCCA, 0);
 -		emu_wrptr(sc, ch, Z1, 0);
 -		emu_wrptr(sc, ch, Z2, 0);
 -		emu_wrptr(sc, ch, FXRT, 0xd01c0000);
 -
 -		emu_wrptr(sc, ch, ATKHLDM, 0);
 -		emu_wrptr(sc, ch, DCYSUSM, 0);
 -		emu_wrptr(sc, ch, IFATN, 0xffff);
 -		emu_wrptr(sc, ch, PEFE, 0);
 -		emu_wrptr(sc, ch, FMMOD, 0);
 -		emu_wrptr(sc, ch, TREMFRQ, 24);	/* 1 Hz */
 -		emu_wrptr(sc, ch, FM2FRQ2, 24);	/* 1 Hz */
 -		emu_wrptr(sc, ch, TEMPENV, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, ENV_OFF);
 +		emu_wrptr(sc, ch, EMU_CHAN_IP, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0xffff);
 +		emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0xffff);
 +		emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_CPF, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_CCR, 0);
 +
 +		emu_wrptr(sc, ch, EMU_CHAN_PSST, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_DSL, 0x10);
 +		emu_wrptr(sc, ch, EMU_CHAN_CCCA, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_Z1, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_Z2, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_FXRT, 0xd01c0000);
 +
 +		emu_wrptr(sc, ch, EMU_CHAN_ATKHLDM, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_DCYSUSM, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_IFATN, 0xffff);
 +		emu_wrptr(sc, ch, EMU_CHAN_PEFE, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_FMMOD, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_TREMFRQ, 24);	/* 1 Hz */
 +		emu_wrptr(sc, ch, EMU_CHAN_FM2FRQ2, 24);	/* 1 Hz */
 +		emu_wrptr(sc, ch, EMU_CHAN_TEMPENV, 0);
  
  		/*** these are last so OFF prevents writing ***/
 -		emu_wrptr(sc, ch, LFOVAL2, 0);
 -		emu_wrptr(sc, ch, LFOVAL1, 0);
 -		emu_wrptr(sc, ch, ATKHLDV, 0);
 -		emu_wrptr(sc, ch, ENVVOL, 0);
 -		emu_wrptr(sc, ch, ENVVAL, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_LFOVAL2, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_LFOVAL1, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_ATKHLDV, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_ENVVOL, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_ENVVAL, 0);
  
  		if (sc->audigy) {
  			/* audigy cards need this to initialize correctly */
 @@ -1736,9 +1818,9 @@ emu_init(struct sc_info *sc)
  			emu_wrptr(sc, ch, 0x4e, 0);
  			emu_wrptr(sc, ch, 0x4f, 0);
  			/* set default routing */
 -			emu_wrptr(sc, ch, A_FXRT1, 0x03020100);
 -			emu_wrptr(sc, ch, A_FXRT2, 0x3f3f3f3f);
 -			emu_wrptr(sc, ch, A_SENDAMOUNTS, 0);
 +			emu_wrptr(sc, ch, EMU_A_CHAN_FXRT1, 0x03020100);
 +			emu_wrptr(sc, ch, EMU_A_CHAN_FXRT2, 0x3f3f3f3f);
 +			emu_wrptr(sc, ch, EMU_A_CHAN_SENDAMOUNTS, 0);
  		}
  
  		sc->voice[ch].vnum = ch;
 @@ -1769,13 +1851,13 @@ emu_init(struct sc_info *sc)
  	 *  AN                = 0     (Audio data)
  	 *  P                 = 0     (Consumer)
  	 */
 -	spcs = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
 -	    SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
 -	    SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
 -	    SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
 -	emu_wrptr(sc, 0, SPCS0, spcs);
 -	emu_wrptr(sc, 0, SPCS1, spcs);
 -	emu_wrptr(sc, 0, SPCS2, spcs);
 +	spcs = EMU_SPCS_CLKACCY_1000PPM | EMU_SPCS_SAMPLERATE_48 |
 +	    EMU_SPCS_CHANNELNUM_LEFT | EMU_SPCS_SOURCENUM_UNSPEC |
 +	    EMU_SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
 +	    EMU_SPCS_EMPHASIS_NONE | EMU_SPCS_COPYRIGHT;
 +	emu_wrptr(sc, 0, EMU_SPCS0, spcs);
 +	emu_wrptr(sc, 0, EMU_SPCS1, spcs);
 +	emu_wrptr(sc, 0, EMU_SPCS2, spcs);
  
  	if (!sc->audigy)
  		emu_initefx(sc);
 @@ -1786,8 +1868,8 @@ emu_init(struct sc_info *sc)
  		u_int32_t tmp;
  
  		/* Setup SRCMulti_I2S SamplingRate */
 -		tmp = emu_rdptr(sc, 0, A_SPDIF_SAMPLERATE) & 0xfffff1ff;
 -		emu_wrptr(sc, 0, A_SPDIF_SAMPLERATE, tmp | 0x400);
 +		tmp = emu_rdptr(sc, 0, EMU_A_SPDIF_SAMPLERATE) & 0xfffff1ff;
 +		emu_wrptr(sc, 0, EMU_A_SPDIF_SAMPLERATE, tmp | 0x400);
  
  		/* Setup SRCSel (Enable SPDIF, I2S SRCMulti) */
  		emu_wr(sc, 0x20, 0x00600000, 4);
 @@ -1816,13 +1898,13 @@ emu_init(struct sc_info *sc)
  	for (i = 0; i < EMUMAXPAGES; i++)
  		sc->mem.ptb_pages[i] = tmp | i;
  
 -	emu_wrptr(sc, 0, PTB, (sc->mem.ptb_pages_addr));
 -	emu_wrptr(sc, 0, TCB, 0);	/* taken from original driver */
 -	emu_wrptr(sc, 0, TCBS, 0);	/* taken from original driver */
 +	emu_wrptr(sc, 0, EMU_PTB, (sc->mem.ptb_pages_addr));
 +	emu_wrptr(sc, 0, EMU_TCB, 0);	/* taken from original driver */
 +	emu_wrptr(sc, 0, EMU_TCBS, 0);	/* taken from original driver */
  
  	for (ch = 0; ch < NUM_G; ch++) {
 -		emu_wrptr(sc, ch, MAPA, tmp | MAP_PTI_MASK);
 -		emu_wrptr(sc, ch, MAPB, tmp | MAP_PTI_MASK);
 +		emu_wrptr(sc, ch, EMU_CHAN_MAPA, tmp | EMU_CHAN_MAP_PTI_MASK);
 +		emu_wrptr(sc, ch, EMU_CHAN_MAPB, tmp | EMU_CHAN_MAP_PTI_MASK);
  	}
  
  	/* emu_memalloc(sc, EMUPAGESIZE); */
 @@ -1850,19 +1932,19 @@ emu_init(struct sc_info *sc)
  	 */
  
  	if (sc->audigy) {
 -		tmp = HCFG_AUTOMUTE | HCFG_JOYENABLE;
 +		tmp = EMU_HCFG_AUTOMUTE | EMU_HCFG_JOYENABLE;
  		if (sc->audigy2)	/* Audigy 2 */
 -			tmp = HCFG_AUDIOENABLE | HCFG_AC3ENABLE_CDSPDIF |
 -			    HCFG_AC3ENABLE_GPSPDIF;
 -		emu_wr(sc, HCFG, tmp, 4);
 +			tmp = EMU_HCFG_AUDIOENABLE | EMU_HCFG_AC3ENABLE_CDSPDIF |
 +			    EMU_HCFG_AC3ENABLE_GPSPDIF;
 +		emu_wr(sc, EMU_HCFG, tmp, 4);
  
  		audigy_initefx(sc);
  
  		/* from ALSA initialization code: */
  
  		/* enable audio and disable both audio/digital outputs */
 -		emu_wr(sc, HCFG, emu_rd(sc, HCFG, 4) | HCFG_AUDIOENABLE, 4);
 -		emu_wr(sc, A_IOCFG, emu_rd(sc, A_IOCFG, 4) & ~A_IOCFG_GPOUT_AD,
 +		emu_wr(sc, EMU_HCFG, emu_rd(sc, EMU_HCFG, 4) | EMU_HCFG_AUDIOENABLE, 4);
 +		emu_wr(sc, EMU_A_IOCFG, emu_rd(sc, EMU_A_IOCFG, 4) & ~EMU_A_IOCFG_GPOUT_AD,
  		    4);
  		if (sc->audigy2) {	/* Audigy 2 */
  			/* Unmute Analog.
 @@ -1870,27 +1952,27 @@ emu_init(struct sc_info *sc)
  			 * init Alice3 I2SOut beyond 48kHz.
  			 * So, sequence is important.
  			 */
 -			emu_wr(sc, A_IOCFG,
 -			    emu_rd(sc, A_IOCFG, 4) | A_IOCFG_GPOUT_A, 4);
 +			emu_wr(sc, EMU_A_IOCFG,
 +			    emu_rd(sc, EMU_A_IOCFG, 4) | EMU_A_IOCFG_GPOUT_A, 4);
  		}
  	} else {
  		/* EMU10K1 initialization code */
 -		tmp = HCFG_AUDIOENABLE | HCFG_LOCKTANKCACHE_MASK 
 -		    | HCFG_AUTOMUTE;
 +		tmp = EMU_HCFG_AUDIOENABLE | EMU_HCFG_LOCKTANKCACHE_MASK 
 +		    | EMU_HCFG_AUTOMUTE;
  		if (sc->rev >= 6)
 -			tmp |= HCFG_JOYENABLE;
 +			tmp |= EMU_HCFG_JOYENABLE;
  
 -		emu_wr(sc, HCFG, tmp, 4);
 +		emu_wr(sc, EMU_HCFG, tmp, 4);
  
  		/* TOSLink detection */
  		sc->tos_link = 0;
 -		tmp = emu_rd(sc, HCFG, 4);
 -		if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
 -			emu_wr(sc, HCFG, tmp | HCFG_GPOUT1, 4);
 +		tmp = emu_rd(sc, EMU_HCFG, 4);
 +		if (tmp & (EMU_HCFG_GPINPUT0 | EMU_HCFG_GPINPUT1)) {
 +			emu_wr(sc, EMU_HCFG, tmp | EMU_HCFG_GPOUT1, 4);
  			DELAY(50);
 -			if (tmp != (emu_rd(sc, HCFG, 4) & ~HCFG_GPOUT1)) {
 +			if (tmp != (emu_rd(sc, EMU_HCFG, 4) & ~EMU_HCFG_GPOUT1)) {
  				sc->tos_link = 1;
 -				emu_wr(sc, HCFG, tmp, 4);
 +				emu_wr(sc, EMU_HCFG, tmp, 4);
  			}
  		}
  	}
 @@ -1903,42 +1985,42 @@ emu_uninit(struct sc_info *sc)
  {
  	u_int32_t ch;
  
 -	emu_wr(sc, INTE, 0, 4);
 +	emu_wr(sc, EMU_INTE, 0, 4);
  	for (ch = 0; ch < NUM_G; ch++)
 -		emu_wrptr(sc, ch, DCYSUSV, ENV_OFF);
 +		emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, ENV_OFF);
  	for (ch = 0; ch < NUM_G; ch++) {
 -		emu_wrptr(sc, ch, VTFT, 0);
 -		emu_wrptr(sc, ch, CVCF, 0);
 -		emu_wrptr(sc, ch, PTRX, 0);
 -		emu_wrptr(sc, ch, CPF, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_CPF, 0);
  	}
  
  	if (sc->audigy) {	/* stop fx processor */
 -		emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP);
 +		emu_wrptr(sc, 0, EMU_A_DBG, EMU_A_DBG_SINGLE_STEP);
  	}
  
  	/* disable audio and lock cache */
 -	emu_wr(sc, HCFG,
 -	    HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
 +	emu_wr(sc, EMU_HCFG,
 +	    EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE,
  	    4);
  
 -	emu_wrptr(sc, 0, PTB, 0);
 +	emu_wrptr(sc, 0, EMU_PTB, 0);
  	/* reset recording buffers */
 -	emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, MICBA, 0);
 -	emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, FXBA, 0);
 -	emu_wrptr(sc, 0, FXWC, 0);
 -	emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, ADCBA, 0);
 -	emu_wrptr(sc, 0, TCB, 0);
 -	emu_wrptr(sc, 0, TCBS, 0);
 +	emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_MICBA, 0);
 +	emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_FXBA, 0);
 +	emu_wrptr(sc, 0, EMU_FXWC, 0);
 +	emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_ADCBA, 0);
 +	emu_wrptr(sc, 0, EMU_TCB, 0);
 +	emu_wrptr(sc, 0, EMU_TCBS, 0);
  
  	/* disable channel interrupt */
 -	emu_wrptr(sc, 0, CLIEL, 0);
 -	emu_wrptr(sc, 0, CLIEH, 0);
 -	emu_wrptr(sc, 0, SOLEL, 0);
 -	emu_wrptr(sc, 0, SOLEH, 0);
 +	emu_wrptr(sc, 0, EMU_CLIEL, 0);
 +	emu_wrptr(sc, 0, EMU_CLIEH, 0);
 +	emu_wrptr(sc, 0, EMU_SOLEL, 0);
 +	emu_wrptr(sc, 0, EMU_SOLEH, 0);
  
  	/* init envelope engine */
  	if (!SLIST_EMPTY(&sc->mem.blocks))
 @@ -1997,7 +2079,7 @@ emu_pci_attach(device_t dev)
  	sc->audigy = sc->type == EMU10K2_PCI_ID || sc->type == EMU10K3_PCI_ID;
  	sc->audigy2 = (sc->audigy && sc->rev == 0x04);
  	sc->nchans = sc->audigy ? 8 : 4;
 -	sc->addrmask = sc->audigy ? A_PTR_ADDRESS_MASK : PTR_ADDRESS_MASK;
 +	sc->addrmask = sc->audigy ? EMU_A_PTR_ADDR_MASK : EMU_PTR_ADDR_MASK;
  
  	data = pci_read_config(dev, PCIR_COMMAND, 2);
  	data |= (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN);
 
 Added: head/sys/dev/sound/pci/emuxkireg.h
 ==============================================================================
 --- /dev/null	00:00:00 1970	(empty, because file is newly added)
 +++ head/sys/dev/sound/pci/emuxkireg.h	Tue Jan  3 21:04:54 2012	(r229430)
 @@ -0,0 +1,689 @@
 +/* $FreeBSD$ */
 +/*	$NetBSD: emuxkireg.h,v 1.8 2008/04/28 20:23:54 martin Exp $	*/
 +
 +/*-
 + * Copyright (c) 2001 The NetBSD Foundation, Inc.
 + * All rights reserved.
 + *
 + * This code is derived from software contributed to The NetBSD Foundation
 + * by Yannick Montulet.
 + *
 + * Redistribution and use in source and binary forms, with or without
 + * modification, are permitted provided that the following conditions
 + * are met:
 + * 1. Redistributions of source code must retain the above copyright
 + *    notice, this list of conditions and the following disclaimer.
 + * 2. Redistributions in binary form must reproduce the above copyright
 + *    notice, this list of conditions and the following disclaimer in the
 + *    documentation and/or other materials provided with the distribution.
 + *
 + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 + * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 + * POSSIBILITY OF SUCH DAMAGE.
 + */
 +
 +#ifndef _DEV_PCI_EMUXKIREG_H_
 +#define _DEV_PCI_EMUXKIREG_H_
 +
 +/*
 + * Register values for Creative EMU10000. The register values have been
 + * taken from GPLed SBLive! header file published by Creative. The comments
 + * have been stripped to avoid GPL pollution in kernel. The Creative version
 + * including comments is available in Linux 2.4.* kernel as file
 + *	drivers/sound/emu10k1/8010.h
 + */
 
 *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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From: dfilter@FreeBSD.ORG (dfilter service)
To: bug-followup@FreeBSD.org
Cc:  
Subject: Re: kern/153901: commit references a PR
Date: Wed, 11 Jan 2012 21:17:26 +0000 (UTC)

 Author: pfg
 Date: Wed Jan 11 21:17:14 2012
 New Revision: 229981
 URL: http://svn.freebsd.org/changeset/base/229981
 
 Log:
   Replace GPL'd headers in the emu10kx snd driver code.
   
   This uses the emuxkireg.h already used in the emu10k1
   snd driver. Special thanks go to Alexander Motin as
   he was able to find some errors and reverse engineer
   some wrong values in the emuxkireg header.
   
   The emu10kx driver is now free from the GPL.
   
   PR:		153901
   Tested by:	mav, joel
   Approved by:	jhb (mentor)
   MFC after:	2 weeks
 
 Deleted:
   head/sys/gnu/dev/sound/pci/emu10k1-alsa.h
   head/sys/gnu/dev/sound/pci/p16v-alsa.h
   head/sys/gnu/dev/sound/pci/p17v-alsa.h
 Modified:
   head/sys/conf/files
   head/sys/dev/sound/pci/emu10kx-midi.c
   head/sys/dev/sound/pci/emu10kx-pcm.c
   head/sys/dev/sound/pci/emu10kx.c
   head/sys/dev/sound/pci/emu10kx.h
   head/sys/dev/sound/pci/emuxkireg.h
   head/sys/modules/sound/driver/emu10kx/Makefile
 
 Modified: head/sys/conf/files
 ==============================================================================
 --- head/sys/conf/files	Wed Jan 11 21:03:54 2012	(r229980)
 +++ head/sys/conf/files	Wed Jan 11 21:17:14 2012	(r229981)
 @@ -50,11 +50,6 @@ aic79xx_reg_print.c	optional ahd pci				
  aic79xx_reg_print.o		optional ahd pci ahd_reg_pretty_print	   \
  	compile-with	"${NORMAL_C}"					   \
  	no-implicit-rule local
 -emu10k1-alsa%diked.h		optional snd_emu10kx	   \
 -	dependency	"$S/tools/sound/emu10k1-mkalsa.sh $S/gnu/dev/sound/pci/emu10k1-alsa.h" \
 -	compile-with	"CC='${CC}' AWK=${AWK} sh $S/tools/sound/emu10k1-mkalsa.sh $S/gnu/dev/sound/pci/emu10k1-alsa.h emu10k1-alsa%diked.h" \
 -	no-obj no-implicit-rule before-depend				   \
 -	clean		"emu10k1-alsa%diked.h"
  #
  # The 'fdt_dtb_file' target covers an actual DTB file name, which is derived
  # from the specified source (DTS) file: <platform>.dts -> <platform>.dtb
 @@ -67,16 +62,6 @@ fdt_static_dtb.h		optional fdt fdt_dtb_s
  	compile-with "sh $S/tools/fdt/make_dtbh.sh ${FDT_DTS_FILE} ." \
  	no-obj no-implicit-rule before-depend \
  	clean		"fdt_static_dtb.h"
 -p16v-alsa%diked.h		optional snd_emu10kx pci		   \
 -	dependency	"$S/tools/sound/emu10k1-mkalsa.sh $S/gnu/dev/sound/pci/p16v-alsa.h" \
 -	compile-with	"CC='${CC}' AWK=${AWK} sh $S/tools/sound/emu10k1-mkalsa.sh $S/gnu/dev/sound/pci/p16v-alsa.h p16v-alsa%diked.h" \
 -	no-obj no-implicit-rule before-depend				   \
 -	clean		"p16v-alsa%diked.h"
 -p17v-alsa%diked.h		optional snd_emu10kx pci		   \
 -	dependency	"$S/tools/sound/emu10k1-mkalsa.sh $S/gnu/dev/sound/pci/p17v-alsa.h" \
 -	compile-with	"CC='${CC}' AWK=${AWK} sh $S/tools/sound/emu10k1-mkalsa.sh $S/gnu/dev/sound/pci/p17v-alsa.h p17v-alsa%diked.h" \
 -	no-obj no-implicit-rule before-depend				   \
 -	clean		"p17v-alsa%diked.h"
  feeder_eq_gen.h			optional sound				   \
  	dependency	"$S/tools/sound/feeder_eq_mkfilter.awk"		   \
  	compile-with	"${AWK} -f $S/tools/sound/feeder_eq_mkfilter.awk -- ${FEEDER_EQ_PRESETS} > feeder_eq_gen.h" \
 @@ -1733,19 +1718,9 @@ dev/sound/pci/csa.c		optional snd_csa pc
  dev/sound/pci/csapcm.c		optional snd_csa pci
  dev/sound/pci/ds1.c		optional snd_ds1 pci
  dev/sound/pci/emu10k1.c		optional snd_emu10k1 pci
 -dev/sound/pci/emu10kx.c		optional snd_emu10kx pci \
 -	dependency "emu10k1-alsa%diked.h" \
 -	dependency "p16v-alsa%diked.h" \
 -	dependency "p17v-alsa%diked.h" \
 -	warning "kernel contains GPL contaminated emu10kx headers"
 -dev/sound/pci/emu10kx-pcm.c	optional snd_emu10kx pci \
 -	dependency "emu10k1-alsa%diked.h" \
 -	dependency "p16v-alsa%diked.h" \
 -	dependency "p17v-alsa%diked.h" \
 -	warning "kernel contains GPL contaminated emu10kx headers"
 -dev/sound/pci/emu10kx-midi.c	optional snd_emu10kx pci \
 -	dependency "emu10k1-alsa%diked.h" \
 -	warning "kernel contains GPL contaminated emu10kx headers"
 +dev/sound/pci/emu10kx.c		optional snd_emu10kx pci
 +dev/sound/pci/emu10kx-pcm.c	optional snd_emu10kx pci
 +dev/sound/pci/emu10kx-midi.c	optional snd_emu10kx pci
  dev/sound/pci/envy24.c		optional snd_envy24 pci
  dev/sound/pci/envy24ht.c	optional snd_envy24ht pci
  dev/sound/pci/es137x.c		optional snd_es137x pci
 
 Modified: head/sys/dev/sound/pci/emu10kx-midi.c
 ==============================================================================
 --- head/sys/dev/sound/pci/emu10kx-midi.c	Wed Jan 11 21:03:54 2012	(r229980)
 +++ head/sys/dev/sound/pci/emu10kx-midi.c	Wed Jan 11 21:17:14 2012	(r229981)
 @@ -50,8 +50,8 @@
  #include <dev/sound/midi/mpu401.h>
  #include "mpufoi_if.h"
  
 +#include <dev/sound/pci/emuxkireg.h>
  #include <dev/sound/pci/emu10kx.h>
 -#include "emu10k1-alsa%diked.h"
  
  struct emu_midi_softc {
  	struct mtx	mtx;
 @@ -176,25 +176,25 @@ emu_midi_attach(device_t dev)
  	if (scp->is_emu10k1) {
  		/* SB Live! - only one MIDI device here */
  		inte_val = 0;
 -		/* inte_val |= INTE_MIDITXENABLE;*/
 -		inte_val |= INTE_MIDIRXENABLE;
 -		ipr_val = IPR_MIDITRANSBUFEMPTY;
 -		ipr_val |= IPR_MIDIRECVBUFEMPTY;
 +		/* inte_val |= EMU_INTE_MIDITXENABLE;*/
 +		inte_val |= EMU_INTE_MIDIRXENABLE;
 +		ipr_val = EMU_IPR_MIDITRANSBUFE;
 +		ipr_val |= EMU_IPR_MIDIRECVBUFE;
  	} else {
 -		if (scp->port == A_MUDATA1) {
 +		if (scp->port == EMU_A_MUDATA1) {
  			/* EXTERNAL MIDI (AudigyDrive) */
  			inte_val = 0;
 -			/* inte_val |= A_INTE_MIDITXENABLE1;*/
 -			inte_val |= INTE_MIDIRXENABLE;
 -			ipr_val = IPR_MIDITRANSBUFEMPTY;
 -			ipr_val |= IPR_MIDIRECVBUFEMPTY;
 +			/* inte_val |= A_EMU_INTE_MIDITXENABLE1;*/
 +			inte_val |= EMU_INTE_MIDIRXENABLE;
 +			ipr_val = EMU_IPR_MIDITRANSBUFE;
 +			ipr_val |= EMU_IPR_MIDIRECVBUFE;
  		} else {
  			/* MIDI hw config port 2 */
  			inte_val = 0;
 -			/* inte_val |= A_INTE_MIDITXENABLE2;*/
 -			inte_val |= INTE_A_MIDIRXENABLE2;
 -			ipr_val = IPR_A_MIDITRANSBUFEMPTY2;
 -			ipr_val |= IPR_A_MIDIRECVBUFEMPTY2;
 +			/* inte_val |= A_EMU_INTE_MIDITXENABLE2;*/
 +			inte_val |= EMU_INTE_A_MIDIRXENABLE2;
 +			ipr_val = EMU_IPR_A_MIDITRANSBUFE2;
 +			ipr_val |= EMU_IPR_A_MIDIRECBUFE2;
  		}
  	}
  
 @@ -214,7 +214,7 @@ emu_midi_attach(device_t dev)
  	if (scp->is_emu10k1)
  		emu_enable_ir(scp->card);
  	else {
 -		if (scp->port == A_MUDATA1)
 +		if (scp->port == EMU_A_MUDATA1)
  			emu_enable_ir(scp->card);
  	}
  
 
 Modified: head/sys/dev/sound/pci/emu10kx-pcm.c
 ==============================================================================
 --- head/sys/dev/sound/pci/emu10kx-pcm.c	Wed Jan 11 21:03:54 2012	(r229980)
 +++ head/sys/dev/sound/pci/emu10kx-pcm.c	Wed Jan 11 21:17:14 2012	(r229981)
 @@ -49,8 +49,8 @@
  
  #include "mixer_if.h"
  
 +#include <dev/sound/pci/emuxkireg.h>
  #include <dev/sound/pci/emu10kx.h>
 -#include "emu10k1-alsa%diked.h"
  
  struct emu_pcm_pchinfo {
  	int		spd;
 @@ -555,8 +555,8 @@ emu_ac97_read_emulation(struct emu_pcm_i
  		break;
  	}
  
 -	emu_wr(sc->card, AC97ADDRESS, regno, 1);
 -	tmp = emu_rd(sc->card, AC97DATA, 2);
 +	emu_wr(sc->card, EMU_AC97ADDR, regno, 1);
 +	tmp = emu_rd(sc->card, EMU_AC97DATA, 2);
  
  	if (use_ac97)
  		emulated = tmp;
 @@ -621,8 +621,8 @@ emu_ac97_write_emulation(struct emu_pcm_
  		break;
  	}
  	if (write_ac97) {
 -		emu_wr(sc->card, AC97ADDRESS, regno, 1);
 -		emu_wr(sc->card, AC97DATA, data, 2);
 +		emu_wr(sc->card, EMU_AC97ADDR, regno, 1);
 +		emu_wr(sc->card, EMU_AC97DATA, data, 2);
  	}
  }
  
 @@ -658,8 +658,8 @@ emu_rdcd(kobj_t obj __unused, void *devi
  	struct emu_pcm_info *sc = (struct emu_pcm_info *)devinfo;
  
  	KASSERT(sc->card != NULL, ("emu_rdcd: no soundcard"));
 -	emu_wr(sc->card, AC97ADDRESS, regno, 1);
 -	rd = emu_rd(sc->card, AC97DATA, 2);
 +	emu_wr(sc->card, EMU_AC97ADDR, regno, 1);
 +	rd = emu_rd(sc->card, EMU_AC97DATA, 2);
  	return (rd);
  }
  
 @@ -669,8 +669,8 @@ emu_wrcd(kobj_t obj __unused, void *devi
  	struct emu_pcm_info *sc = (struct emu_pcm_info *)devinfo;
  
  	KASSERT(sc->card != NULL, ("emu_wrcd: no soundcard"));
 -	emu_wr(sc->card, AC97ADDRESS, regno, 1);
 -	emu_wr(sc->card, AC97DATA, data, 2);
 +	emu_wr(sc->card, EMU_AC97ADDR, regno, 1);
 +	emu_wr(sc->card, EMU_AC97DATA, data, 2);
  	return (0);
  }
  
 @@ -870,12 +870,12 @@ emurchan_init(kobj_t obj __unused, void 
  	ch->blksz = sc->bufsz / 2; /* We rise interrupt for half-full buffer */
  	ch->fmt = SND_FORMAT(AFMT_U8, 1, 0);
  	ch->spd = 8000;
 -	ch->idxreg = sc->is_emu10k1 ? ADCIDX : A_ADCIDX;
 -	ch->basereg = ADCBA;
 -	ch->sizereg = ADCBS;
 -	ch->setupreg = ADCCR;
 -	ch->irqmask = INTE_ADCBUFENABLE;
 -	ch->iprmask = IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL;
 +	ch->idxreg = sc->is_emu10k1 ? EMU_ADCIDX : EMU_A_ADCIDX;
 +	ch->basereg = EMU_ADCBA;
 +	ch->sizereg = EMU_ADCBS;
 +	ch->setupreg = EMU_ADCCR;
 +	ch->irqmask = EMU_INTE_ADCBUFENABLE;
 +	ch->iprmask = EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL;
  
  	if (sndbuf_alloc(ch->buffer, emu_gettag(sc->card), 0, sc->bufsz) != 0)
  		return (NULL);
 @@ -953,22 +953,22 @@ emurchan_trigger(kobj_t obj __unused, vo
  
  	switch (sc->bufsz) {
  	case 4096:
 -		sz = ADCBS_BUFSIZE_4096;
 +		sz = EMU_RECBS_BUFSIZE_4096;
  		break;
  	case 8192:
 -		sz = ADCBS_BUFSIZE_8192;
 +		sz = EMU_RECBS_BUFSIZE_8192;
  		break;
  	case 16384:
 -		sz = ADCBS_BUFSIZE_16384;
 +		sz = EMU_RECBS_BUFSIZE_16384;
  		break;
  	case 32768:
 -		sz = ADCBS_BUFSIZE_32768;
 +		sz = EMU_RECBS_BUFSIZE_32768;
  		break;
  	case 65536:
 -		sz = ADCBS_BUFSIZE_65536;
 +		sz = EMU_RECBS_BUFSIZE_65536;
  		break;
  	default:
 -		sz = ADCBS_BUFSIZE_4096;
 +		sz = EMU_RECBS_BUFSIZE_4096;
  	}
  
  	snd_mtxlock(sc->lock);
 @@ -976,9 +976,9 @@ emurchan_trigger(kobj_t obj __unused, vo
  	case PCMTRIG_START:
  		ch->run = 1;
  		emu_wrptr(sc->card, 0, ch->sizereg, sz);
 -		val = sc->is_emu10k1 ? ADCCR_LCHANENABLE : A_ADCCR_LCHANENABLE;
 +		val = sc->is_emu10k1 ? EMU_ADCCR_LCHANENABLE : EMU_A_ADCCR_LCHANENABLE;
  		if (AFMT_CHANNEL(ch->fmt) > 1)
 -			val |= sc->is_emu10k1 ? ADCCR_RCHANENABLE : A_ADCCR_RCHANENABLE;
 +			val |= sc->is_emu10k1 ? EMU_ADCCR_RCHANENABLE : EMU_A_ADCCR_RCHANENABLE;
  		val |= sc->is_emu10k1 ? emu_k1_recval(ch->spd) : emu_k2_recval(ch->spd);
  		emu_wrptr(sc->card, 0, ch->setupreg, 0);
  		emu_wrptr(sc->card, 0, ch->setupreg, val);
 @@ -1049,11 +1049,11 @@ emufxrchan_init(kobj_t obj __unused, voi
  	ch = &(sc->rch_efx);
  	ch->fmt = SND_FORMAT(AFMT_S16_LE, 1, 0);
  	ch->spd = sc->is_emu10k1 ? 48000*32 : 48000 * 64;
 -	ch->idxreg = FXIDX;
 -	ch->basereg = FXBA;
 -	ch->sizereg = FXBS;
 -	ch->irqmask = INTE_EFXBUFENABLE;
 -	ch->iprmask = IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL;
 +	ch->idxreg = EMU_FXIDX;
 +	ch->basereg = EMU_FXBA;
 +	ch->sizereg = EMU_FXBS;
 +	ch->irqmask = EMU_INTE_EFXBUFENABLE;
 +	ch->iprmask = EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL;
  	ch->buffer = b;
  	ch->pcm = sc;
  	ch->channel = c;
 @@ -1113,22 +1113,22 @@ emufxrchan_trigger(kobj_t obj __unused, 
  
  	switch (sc->bufsz) {
  	case 4096:
 -		sz = ADCBS_BUFSIZE_4096;
 +		sz = EMU_RECBS_BUFSIZE_4096;
  		break;
  	case 8192:
 -		sz = ADCBS_BUFSIZE_8192;
 +		sz = EMU_RECBS_BUFSIZE_8192;
  		break;
  	case 16384:
 -		sz = ADCBS_BUFSIZE_16384;
 +		sz = EMU_RECBS_BUFSIZE_16384;
  		break;
  	case 32768:
 -		sz = ADCBS_BUFSIZE_32768;
 +		sz = EMU_RECBS_BUFSIZE_32768;
  		break;
  	case 65536:
 -		sz = ADCBS_BUFSIZE_65536;
 +		sz = EMU_RECBS_BUFSIZE_65536;
  		break;
  	default:
 -		sz = ADCBS_BUFSIZE_4096;
 +		sz = EMU_RECBS_BUFSIZE_4096;
  	}
  
  	snd_mtxlock(sc->lock);
 @@ -1140,14 +1140,14 @@ emufxrchan_trigger(kobj_t obj __unused, 
  		/*
  		 * SB Live! is limited to 32 mono channels. Audigy
  		 * has 64 mono channels. Channels are enabled
 -		 * by setting a bit in A_FXWC[1|2] registers.
 +		 * by setting a bit in EMU_A_FXWC[1|2] registers.
  		 */
  		/* XXX there is no way to demultiplex this streams for now */
  		if (sc->is_emu10k1) {
 -			emu_wrptr(sc->card, 0, FXWC, 0xffffffff);
 +			emu_wrptr(sc->card, 0, EMU_FXWC, 0xffffffff);
  		} else {
 -			emu_wrptr(sc->card, 0, A_FXWC1, 0xffffffff);
 -			emu_wrptr(sc->card, 0, A_FXWC2, 0xffffffff);
 +			emu_wrptr(sc->card, 0, EMU_A_FXWC1, 0xffffffff);
 +			emu_wrptr(sc->card, 0, EMU_A_FXWC2, 0xffffffff);
  		}
  		break;
  	case PCMTRIG_STOP:
 @@ -1155,10 +1155,10 @@ emufxrchan_trigger(kobj_t obj __unused, 
  	case PCMTRIG_ABORT:
  		ch->run = 0;
  		if (sc->is_emu10k1) {
 -			emu_wrptr(sc->card, 0, FXWC, 0x0);
 +			emu_wrptr(sc->card, 0, EMU_FXWC, 0x0);
  		} else {
 -			emu_wrptr(sc->card, 0, A_FXWC1, 0x0);
 -			emu_wrptr(sc->card, 0, A_FXWC2, 0x0);
 +			emu_wrptr(sc->card, 0, EMU_A_FXWC1, 0x0);
 +			emu_wrptr(sc->card, 0, EMU_A_FXWC2, 0x0);
  		}
  		emu_wrptr(sc->card, 0, ch->sizereg, 0);
  		(void)emu_intr_unregister(sc->card, ch->ihandle);
 @@ -1238,8 +1238,8 @@ emu_pcm_intr(void *pcm, uint32_t stat)
  
  	snd_mtxlock(sc->lock);
  	
 -	if (stat & IPR_INTERVALTIMER) {
 -		ack |= IPR_INTERVALTIMER;
 +	if (stat & EMU_IPR_INTERVALTIMER) {
 +		ack |= EMU_IPR_INTERVALTIMER;
  		for (i = 0; i < MAX_CHANNELS; i++)
  			if (sc->pch[i].channel) {
  				if (sc->pch[i].run == 1) {
 @@ -1262,8 +1262,8 @@ emu_pcm_intr(void *pcm, uint32_t stat)
  	}
  
  
 -	if (stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) {
 -		ack |= stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL);
 +	if (stat & (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL)) {
 +		ack |= stat & (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL);
  		if (sc->rch_adc.channel) {
  			snd_mtxunlock(sc->lock);
  			chn_intr(sc->rch_adc.channel);
 @@ -1271,8 +1271,8 @@ emu_pcm_intr(void *pcm, uint32_t stat)
  		}
  	}
  
 -	if (stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) {
 -		ack |= stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL);
 +	if (stat & (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL)) {
 +		ack |= stat & (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL);
  		if (sc->rch_efx.channel) {
  			snd_mtxunlock(sc->lock);
  			chn_intr(sc->rch_efx.channel);
 @@ -1450,8 +1450,8 @@ emu_pcm_attach(device_t dev)
  		goto bad;
  	}
  
 -	inte = INTE_INTERVALTIMERENB;
 -	ipr = IPR_INTERVALTIMER; /* Used by playback & ADC */
 +	inte = EMU_INTE_INTERTIMERENB;
 +	ipr = EMU_IPR_INTERVALTIMER; /* Used by playback & ADC */
  	sc->ihandle = emu_intr_register(sc->card, inte, ipr, &emu_pcm_intr, sc);
  
  	if (emu_pcm_init(sc) == -1) {
 
 Modified: head/sys/dev/sound/pci/emu10kx.c
 ==============================================================================
 --- head/sys/dev/sound/pci/emu10kx.c	Wed Jan 11 21:03:54 2012	(r229980)
 +++ head/sys/dev/sound/pci/emu10kx.c	Wed Jan 11 21:17:14 2012	(r229981)
 @@ -53,6 +53,7 @@
  #include <dev/sound/pcm/sound.h>
  #include <dev/sound/pcm/ac97.h>
  
 +#include <dev/sound/pci/emuxkireg.h>
  #include <dev/sound/pci/emu10kx.h>
  
  /* hw flags */
 @@ -181,7 +182,7 @@
  #define	A_IN_AUX2_R	0x0d
  #define	A_IN_AUX2	A_IN_AUX2_L
  
 -/* Audigiy Outputs */
 +/* Audigy Outputs */
  #define	A_OUT_D_FRONT_L	0x00
  #define	A_OUT_D_FRONT_R	0x01
  #define	A_OUT_D_FRONT	A_OUT_D_FRONT_L
 @@ -217,9 +218,19 @@
  #define	A_OUT_ADC_REC_R	0x17
  #define	A_OUT_ADC_REC	A_OUT_ADC_REC_L
  
 -#include "emu10k1-alsa%diked.h"
 -#include "p16v-alsa%diked.h"
 -#include "p17v-alsa%diked.h"
 +#define EMU_DATA2	0x24
 +#define EMU_IPR2	0x28
 +#define EMU_INTE2	0x2c
 +#define EMU_IPR3	0x38
 +#define EMU_INTE3	0x3c
 +
 +#define EMU_A2_SRCSel		0x60
 +#define EMU_A2_SRCMULTI_ENABLE	0x6e
 +
 +#define EMU_A_I2S_CAPTURE_96000	0x00000400
 +
 +#define EMU_A2_MIXER_I2S_ENABLE           0x7B
 +#define EMU_A2_MIXER_SPDIF_ENABLE         0x7A
  
  #define	C_FRONT_L	0
  #define	C_FRONT_R	1
 @@ -630,7 +641,7 @@ emu_wr_nolock(struct emu_sc_info *sc, un
  	}
  }
  /*
 - * PTR / DATA interface. Access to EMU10Kx is made
 + * EMU_PTR / EMU_DATA interface. Access to EMU10Kx is made
   * via (channel, register) pair. Some registers are channel-specific,
   * some not.
   */
 @@ -639,11 +650,11 @@ emu_rdptr(struct emu_sc_info *sc, unsign
  {
  	uint32_t ptr, val, mask, size, offset;
  
 -	ptr = ((reg << 16) & sc->address_mask) | (chn & PTR_CHANNELNUM_MASK);
 +	ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK);
  
  	EMU_RWLOCK();
 -	emu_wr_nolock(sc, PTR, ptr, 4);
 -	val = emu_rd_nolock(sc, DATA, 4);
 +	emu_wr_nolock(sc, EMU_PTR, ptr, 4);
 +	val = emu_rd_nolock(sc, EMU_DATA, 4);
  	EMU_RWUNLOCK();
  
  	/*
 @@ -666,10 +677,10 @@ emu_wrptr(struct emu_sc_info *sc, unsign
  {
  	uint32_t ptr, mask, size, offset;
  
 -	ptr = ((reg << 16) & sc->address_mask) | (chn & PTR_CHANNELNUM_MASK);
 +	ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK);
  
  	EMU_RWLOCK();
 -	emu_wr_nolock(sc, PTR, ptr, 4);
 +	emu_wr_nolock(sc, EMU_PTR, ptr, 4);
  	/*
  	 * XXX Another kind of magic encoding in register number. This can
  	 * give you side effect - it will read previous data from register
 @@ -681,13 +692,13 @@ emu_wrptr(struct emu_sc_info *sc, unsign
  		mask = ((1 << size) - 1) << offset;
  		data <<= offset;
  		data &= mask;
 -		data |= emu_rd_nolock(sc, DATA, 4) & ~mask;
 +		data |= emu_rd_nolock(sc, EMU_DATA, 4) & ~mask;
  	}
 -	emu_wr_nolock(sc, DATA, data, 4);
 +	emu_wr_nolock(sc, EMU_DATA, data, 4);
  	EMU_RWUNLOCK();
  }
  /*
 - * PTR2 / DATA2 interface. Access to P16v is made
 + * EMU_A2_PTR / EMU_DATA2 interface. Access to P16v is made
   * via (channel, register) pair. Some registers are channel-specific,
   * some not. This interface is supported by CA0102 and CA0108 chips only.
   */
 @@ -698,8 +709,8 @@ emu_rd_p16vptr(struct emu_sc_info *sc, u
  
  	/* XXX separate lock? */
  	EMU_RWLOCK();
 -	emu_wr_nolock(sc, PTR2, (reg << 16) | chn, 4);
 -	val = emu_rd_nolock(sc, DATA2, 4);
 +	emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4);
 +	val = emu_rd_nolock(sc, EMU_DATA2, 4);
  
  	EMU_RWUNLOCK();
  
 @@ -711,8 +722,8 @@ emu_wr_p16vptr(struct emu_sc_info *sc, u
  {
  
  	EMU_RWLOCK();
 -	emu_wr_nolock(sc, PTR2, (reg << 16) | chn, 4);
 -	emu_wr_nolock(sc, DATA2, data, 4);
 +	emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4);
 +	emu_wr_nolock(sc, EMU_DATA2, data, 4);
  	EMU_RWUNLOCK();
  }
  /*
 @@ -737,13 +748,13 @@ emu_wr_cbptr(struct emu_sc_info *sc, uin
  
  /*
   * Direct hardware register access
 - * Assume that it is never used to access PTR-based registers and can run unlocked.
 + * Assume that it is never used to access EMU_PTR-based registers and can run unlocked.
   */
  void
  emu_wr(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size)
  {
 -	KASSERT(regno != PTR, ("emu_wr: attempt to write to PTR"));
 -	KASSERT(regno != PTR2, ("emu_wr: attempt to write to PTR2"));
 +	KASSERT(regno != EMU_PTR, ("emu_wr: attempt to write to EMU_PTR"));
 +	KASSERT(regno != EMU_A2_PTR, ("emu_wr: attempt to write to EMU_A2_PTR"));
  
  	emu_wr_nolock(sc, regno, data, size);
  }
 @@ -753,8 +764,8 @@ emu_rd(struct emu_sc_info *sc, unsigned 
  {
  	uint32_t rd;
  
 -	KASSERT(regno != DATA, ("emu_rd: attempt to read DATA"));
 -	KASSERT(regno != DATA2, ("emu_rd: attempt to read DATA2"));
 +	KASSERT(regno != EMU_DATA, ("emu_rd: attempt to read DATA"));
 +	KASSERT(regno != EMU_DATA2, ("emu_rd: attempt to read DATA2"));
  
  	rd = emu_rd_nolock(sc, regno, size);
  	return (rd);
 @@ -770,24 +781,24 @@ emu_enable_ir(struct emu_sc_info *sc)
  	uint32_t iocfg;
  
  	if (sc->is_emu10k2 || sc->is_ca0102) {
 -		iocfg = emu_rd_nolock(sc, A_IOCFG, 2);
 -		emu_wr_nolock(sc, A_IOCFG, iocfg | A_IOCFG_GPOUT2, 2);
 +		iocfg = emu_rd_nolock(sc, EMU_A_IOCFG, 2);
 +		emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT2, 2);
  		DELAY(500);
 -		emu_wr_nolock(sc, A_IOCFG, iocfg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, 2);
 +		emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1 | EMU_A_IOCFG_GPOUT2, 2);
  		DELAY(500);
 -		emu_wr_nolock(sc, A_IOCFG, iocfg | A_IOCFG_GPOUT1, 2);
 +		emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1, 2);
  		DELAY(100);
 -		emu_wr_nolock(sc, A_IOCFG, iocfg, 2);
 +		emu_wr_nolock(sc, EMU_A_IOCFG, iocfg, 2);
  		device_printf(sc->dev, "Audigy IR MIDI events enabled.\n");
  		sc->enable_ir = 1;
  	}
  	if (sc->is_emu10k1) {
 -		iocfg = emu_rd_nolock(sc, HCFG, 4);
 -		emu_wr_nolock(sc, HCFG, iocfg | HCFG_GPOUT2, 4);
 +		iocfg = emu_rd_nolock(sc, EMU_HCFG, 4);
 +		emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT2, 4);
  		DELAY(500);
 -		emu_wr_nolock(sc, HCFG, iocfg | HCFG_GPOUT1 | HCFG_GPOUT2, 4);
 +		emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT1 | EMU_HCFG_GPOUT2, 4);
  		DELAY(100);
 -		emu_wr_nolock(sc, HCFG, iocfg, 4);
 +		emu_wr_nolock(sc, EMU_HCFG, iocfg, 4);
  		device_printf(sc->dev, "SB Live! IR MIDI events enabled.\n");
  		sc->enable_ir = 1;
  	}
 @@ -835,7 +846,7 @@ emu_timer_set(struct emu_sc_info *sc, in
  			sc->timerinterval = sc->timer[i];
  
  	/* XXX */
 -	emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2);
 +	emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2);
  	mtx_unlock(&sc->lock);
  
  	return (timer);
 @@ -868,16 +879,16 @@ emu_timer_enable(struct emu_sc_info *sc,
  			ena_int = 1;
  	}
  
 -	emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2);
 +	emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2);
  
  	if (ena_int == 1) {
 -		x = emu_rd(sc, INTE, 4);
 -		x |= INTE_INTERVALTIMERENB;
 -		emu_wr(sc, INTE, x, 4);
 +		x = emu_rd(sc, EMU_INTE, 4);
 +		x |= EMU_INTE_INTERTIMERENB;
 +		emu_wr(sc, EMU_INTE, x, 4);
  	} else {
 -		x = emu_rd(sc, INTE, 4);
 -		x &= ~INTE_INTERVALTIMERENB;
 -		emu_wr(sc, INTE, x, 4);
 +		x = emu_rd(sc, EMU_INTE, 4);
 +		x &= ~EMU_INTE_INTERTIMERENB;
 +		emu_wr(sc, EMU_INTE, x, 4);
  	}
  	mtx_unlock(&sc->lock);
  	return (0);
 @@ -917,9 +928,9 @@ emu_intr_register(struct emu_sc_info *sc
  			sc->ihandler[i].intr_mask = intr_mask;
  			sc->ihandler[i].softc = isc;
  			sc->ihandler[i].irq_func = func;
 -			x = emu_rd(sc, INTE, 4);
 +			x = emu_rd(sc, EMU_INTE, 4);
  			x |= inte_mask;
 -			emu_wr(sc, INTE, x, 4);
 +			emu_wr(sc, EMU_INTE, x, 4);
  			mtx_unlock(&sc->lock);
  			if (sc->dbg_level > 1)
  				device_printf(sc->dev, "ihandle %d registered\n", i);
 @@ -946,7 +957,7 @@ emu_intr_unregister(struct emu_sc_info *
  		return (-1);
  	}
  
 -	x = emu_rd(sc, INTE, 4);
 +	x = emu_rd(sc, EMU_INTE, 4);
  	x &= ~sc->ihandler[hnumber].inte_mask;
  
  	sc->ihandler[hnumber].inte_mask = 0;
 @@ -954,12 +965,12 @@ emu_intr_unregister(struct emu_sc_info *
  	sc->ihandler[hnumber].softc = NULL;
  	sc->ihandler[hnumber].irq_func = NULL;
  
 -	/* other interrupt handlers may use this INTE value */
 +	/* other interrupt handlers may use this EMU_INTE value */
  	for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
  		if (sc->ihandler[i].inte_mask != 0)
  			x |= sc->ihandler[i].inte_mask;
  
 -	emu_wr(sc, INTE, x, 4);
 +	emu_wr(sc, EMU_INTE, x, 4);
  
  	mtx_unlock(&sc->lock);
  	return (hnumber);
 @@ -973,11 +984,11 @@ emu_intr(void *p)
  	int i;
  
  	for (;;) {
 -		stat = emu_rd(sc, IPR, 4);
 +		stat = emu_rd(sc, EMU_IPR, 4);
  		ack = 0;
  		if (stat == 0)
  			break;
 -		emu_wr(sc, IPR, stat, 4);
 +		emu_wr(sc, EMU_IPR, stat, 4);
  		for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) {
  			if ((((sc->ihandler[i].intr_mask) & stat) != 0) &&
  			    (((void *)sc->ihandler[i].irq_func) != NULL)) {
 @@ -993,13 +1004,13 @@ emu_intr(void *p)
  
  	if ((sc->is_ca0102) || (sc->is_ca0108))
  		for (;;) {
 -			stat = emu_rd(sc, IPR2, 4);
 +			stat = emu_rd(sc, EMU_IPR2, 4);
  			ack = 0;
  			if (stat == 0)
  				break;
 -			emu_wr(sc, IPR2, stat, 4);
 +			emu_wr(sc, EMU_IPR2, stat, 4);
  			if (sc->dbg_level > 1)
 -				device_printf(sc->dev, "IPR2: %08x\n", stat);
 +				device_printf(sc->dev, "EMU_IPR2: %08x\n", stat);
  
  			break;	/* to avoid infinite loop. shoud be removed
  				 * after completion of P16V interface. */
 @@ -1007,13 +1018,13 @@ emu_intr(void *p)
  
  	if (sc->is_ca0102)
  		for (;;) {
 -			stat = emu_rd(sc, IPR3, 4);
 +			stat = emu_rd(sc, EMU_IPR3, 4);
  			ack = 0;
  			if (stat == 0)
  				break;
 -			emu_wr(sc, IPR3, stat, 4);
 +			emu_wr(sc, EMU_IPR3, stat, 4);
  			if (sc->dbg_level > 1)
 -				device_printf(sc->dev, "IPR3: %08x\n", stat);
 +				device_printf(sc->dev, "EMU_IPR3: %08x\n", stat);
  
  			break;	/* to avoid infinite loop. should be removed
  				 * after completion of S/PDIF interface */
 @@ -1374,61 +1385,61 @@ emu_vwrite(struct emu_sc_info *sc, struc
  
  
  	if (v->stereo) {
 -		emu_wrptr(sc, v->vnum, CPF, CPF_STEREO_MASK);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, EMU_CHAN_CPF_STEREO_MASK);
  	} else {
 -		emu_wrptr(sc, v->vnum, CPF, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, 0);
  	}
  	val = v->stereo ? 28 : 30;
  	val *= v->b16 ? 1 : 2;
  	start = v->sa + val;
  
  	if (sc->is_emu10k1) {
 -		emu_wrptr(sc, v->vnum, FXRT, ((v->routing[3] << 12) |
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_FXRT, ((v->routing[3] << 12) |
  		    (v->routing[2] << 8) |
  		    (v->routing[1] << 4) |
  		    (v->routing[0] << 0)) << 16);
  	} else {
 -		emu_wrptr(sc, v->vnum, A_FXRT1, (v->routing[3] << 24) |
 +		emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT1, (v->routing[3] << 24) |
  		    (v->routing[2] << 16) |
  		    (v->routing[1] << 8) |
  		    (v->routing[0] << 0));
 -		emu_wrptr(sc, v->vnum, A_FXRT2, (v->routing[7] << 24) |
 +		emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT2, (v->routing[7] << 24) |
  		    (v->routing[6] << 16) |
  		    (v->routing[5] << 8) |
  		    (v->routing[4] << 0));
 -		emu_wrptr(sc, v->vnum, A_SENDAMOUNTS, (v->amounts[7] << 24) |
 +		emu_wrptr(sc, v->vnum, EMU_A_CHAN_SENDAMOUNTS, (v->amounts[7] << 24) |
  		    (v->amounts[6] << 26) |
  		    (v->amounts[5] << 8) |
  		    (v->amounts[4] << 0));
  	}
 -	emu_wrptr(sc, v->vnum, PTRX, (v->amounts[0] << 8) | (v->amounts[1] << 0));
 -	emu_wrptr(sc, v->vnum, DSL, v->ea | (v->amounts[3] << 24));
 -	emu_wrptr(sc, v->vnum, PSST, v->sa | (v->amounts[2] << 24));
 -
 -	emu_wrptr(sc, v->vnum, CCCA, start | (v->b16 ? 0 : CCCA_8BITSELECT));
 -	emu_wrptr(sc, v->vnum, Z1, 0);
 -	emu_wrptr(sc, v->vnum, Z2, 0);
 -
 -	silent_page = ((uint32_t) (sc->mem.silent_page_addr) << 1) | MAP_PTI_MASK;
 -	emu_wrptr(sc, v->vnum, MAPA, silent_page);
 -	emu_wrptr(sc, v->vnum, MAPB, silent_page);
 -
 -	emu_wrptr(sc, v->vnum, CVCF, CVCF_CURRENTFILTER_MASK);
 -	emu_wrptr(sc, v->vnum, VTFT, VTFT_FILTERTARGET_MASK);
 -	emu_wrptr(sc, v->vnum, ATKHLDM, 0);
 -	emu_wrptr(sc, v->vnum, DCYSUSM, DCYSUSM_DECAYTIME_MASK);
 -	emu_wrptr(sc, v->vnum, LFOVAL1, 0x8000);
 -	emu_wrptr(sc, v->vnum, LFOVAL2, 0x8000);
 -	emu_wrptr(sc, v->vnum, FMMOD, 0);
 -	emu_wrptr(sc, v->vnum, TREMFRQ, 0);
 -	emu_wrptr(sc, v->vnum, FM2FRQ2, 0);
 -	emu_wrptr(sc, v->vnum, ENVVAL, 0x8000);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX, (v->amounts[0] << 8) | (v->amounts[1] << 0));
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_DSL, v->ea | (v->amounts[3] << 24));
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_PSST, v->sa | (v->amounts[2] << 24));
 +
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_CCCA, start | (v->b16 ? 0 : EMU_CHAN_CCCA_8BITSELECT));
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_Z1, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_Z2, 0);
 +
 +	silent_page = ((uint32_t) (sc->mem.silent_page_addr) << 1) | EMU_CHAN_MAP_PTI_MASK;
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_MAPA, silent_page);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_MAPB, silent_page);
 +
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, EMU_CHAN_CVCF_CURRFILTER_MASK);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, EMU_CHAN_VTFT_FILTERTARGET_MASK);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDM, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSM, EMU_CHAN_DCYSUSM_DECAYTIME_MASK);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL1, 0x8000);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL2, 0x8000);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_FMMOD, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_TREMFRQ, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_FM2FRQ2, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVAL, 0x8000);
  
 -	emu_wrptr(sc, v->vnum, ATKHLDV, ATKHLDV_HOLDTIME_MASK | ATKHLDV_ATTACKTIME_MASK);
 -	emu_wrptr(sc, v->vnum, ENVVOL, 0x8000);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDV, EMU_CHAN_ATKHLDV_HOLDTIME_MASK | EMU_CHAN_ATKHLDV_ATTACKTIME_MASK);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVOL, 0x8000);
  
 -	emu_wrptr(sc, v->vnum, PEFE_FILTERAMOUNT, 0x7f);
 -	emu_wrptr(sc, v->vnum, PEFE_PITCHAMOUNT, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_FILTERAMOUNT, 0x7f);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_PITCHAMOUNT, 0);
  	if ((v->stereo) && (v->slave != NULL))
  		emu_vwrite(sc, v->slave);
  }
 @@ -1438,7 +1449,7 @@ emu_vstop(struct emu_sc_info *sc, char c
  {
  	int reg;
  
 -	reg = (channel & 0x20) ? SOLEH : SOLEL;
 +	reg = (channel & 0x20) ? EMU_SOLEH : EMU_SOLEL;
  	channel &= 0x1f;
  	reg |= 1 << 24;
  	reg |= channel << 16;
 @@ -1459,29 +1470,29 @@ emu_vtrigger(struct emu_sc_info *sc, str
  		ccis *= v->b16 ? 1 : 2;
  		sample = v->b16 ? 0x00000000 : 0x80808080;
  		for (i = 0; i < cs; i++)
 -			emu_wrptr(sc, v->vnum, CD0 + i, sample);
 -		emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, 0);
 -		emu_wrptr(sc, v->vnum, CCR_READADDRESS, cra);
 -		emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, ccis);
 -
 -		emu_wrptr(sc, v->vnum, IFATN, 0xff00);
 -		emu_wrptr(sc, v->vnum, VTFT, 0xffffffff);
 -		emu_wrptr(sc, v->vnum, CVCF, 0xffffffff);
 -		emu_wrptr(sc, v->vnum, DCYSUSV, 0x00007f7f);
 +			emu_wrptr(sc, v->vnum, EMU_CHAN_CD0 + i, sample);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_READADDRESS, cra);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, ccis);
 +
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xff00);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0xffffffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0xffffffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSV, 0x00007f7f);
  		emu_vstop(sc, v->vnum, 0);
  
  		pitch_target = emu_rate_to_linearpitch(v->speed);
  		initial_pitch = emu_rate_to_pitch(v->speed) >> 8;
 -		emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, pitch_target);
 -		emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, pitch_target);
 -		emu_wrptr(sc, v->vnum, IP, initial_pitch);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, pitch_target);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, pitch_target);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_IP, initial_pitch);
  	} else {
 -		emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, 0);
 -		emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, 0);
 -		emu_wrptr(sc, v->vnum, IFATN, 0xffff);
 -		emu_wrptr(sc, v->vnum, VTFT, 0x0000ffff);
 -		emu_wrptr(sc, v->vnum, CVCF, 0x0000ffff);
 -		emu_wrptr(sc, v->vnum, IP, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0x0000ffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0x0000ffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_IP, 0);
  		emu_vstop(sc, v->vnum, 1);
  	}
  	if ((v->stereo) && (v->slave != NULL))
 @@ -1494,7 +1505,7 @@ emu_vpos(struct emu_sc_info *sc, struct 
  	int s, ptr;
  
  	s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0);
 -	ptr = (emu_rdptr(sc, v->vnum, CCCA_CURRADDR) - (v->start >> s)) << s;
 +	ptr = (emu_rdptr(sc, v->vnum, EMU_CHAN_CCCA_CURRADDR) - (v->start >> s)) << s;
  	return (ptr & ~0x0000001f);
  }
  
 @@ -1694,9 +1705,9 @@ emu_initefx(struct emu_sc_info *sc)
  
  	/* stop DSP */
  	if (sc->is_emu10k1) {
 -		emu_wrptr(sc, 0, DBG, EMU10K1_DBG_SINGLE_STEP);
 +		emu_wrptr(sc, 0, EMU_DBG, EMU_DBG_SINGLE_STEP);
  	} else {
 -		emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP);
 +		emu_wrptr(sc, 0, EMU_A_DBG, EMU_A_DBG_SINGLE_STEP);
  	}
  
  	/* code size is in instructions */
 @@ -2162,9 +2173,9 @@ emu_initefx(struct emu_sc_info *sc)
  
  	/* start DSP */
  	if (sc->is_emu10k1) {
 -		emu_wrptr(sc, 0, DBG, 0);
 +		emu_wrptr(sc, 0, EMU_DBG, 0);
  	} else {
 -		emu_wrptr(sc, 0, A_DBG, 0);
 +		emu_wrptr(sc, 0, EMU_A_DBG, 0);
  	}
  }
  
 @@ -2450,24 +2461,24 @@ emumix_set_mode(struct emu_sc_info *sc, 
  		return;
  	}
  
 -	hcfg = HCFG_AUDIOENABLE | HCFG_AUTOMUTE;
 +	hcfg = EMU_HCFG_AUDIOENABLE | EMU_HCFG_AUTOMUTE;
  	a_iocfg = 0;
  
  	if (sc->rev >= 6)
 -		hcfg |= HCFG_JOYENABLE;
 +		hcfg |= EMU_HCFG_JOYENABLE;
  
  	if (sc->is_emu10k1)
 -		hcfg |= HCFG_LOCKTANKCACHE_MASK;
 +		hcfg |= EMU_HCFG_LOCKTANKCACHE_MASK;
  	else
 -		hcfg |= HCFG_CODECFORMAT_I2S | HCFG_JOYENABLE;
 +		hcfg |= EMU_HCFG_CODECFMT_I2S | EMU_HCFG_JOYENABLE;
  
  
  	if (mode == MODE_DIGITAL) {
  		if (sc->broken_digital) {
  			device_printf(sc->dev, "Digital mode is reported as broken on this card.\n");
  		}
 -		a_iocfg |= A_IOCFG_ENABLE_DIGITAL;
 -		hcfg |= HCFG_GPOUT0;
 +		a_iocfg |= EMU_A_IOCFG_GPOUT1;
 +		hcfg |= EMU_HCFG_GPOUT0;
  	}
  
  	if (mode == MODE_ANALOG)
 @@ -2478,12 +2489,12 @@ emumix_set_mode(struct emu_sc_info *sc, 
  
  	if ((sc->is_ca0102) || (sc->is_ca0108))
  		/*
 -		 * Setting A_IOCFG_DISABLE_ANALOG will do opposite things
 +		 * Setting EMU_A_IOCFG_DISABLE_ANALOG will do opposite things
  		 * on diffrerent cards.
  		 * "don't disable analog outs" on Audigy 2 (ca0102/ca0108)
  		 * "disable analog outs" on Audigy (emu10k2)
  		 */
 -		a_iocfg |= A_IOCFG_DISABLE_ANALOG;
 +		a_iocfg |= EMU_A_IOCFG_DISABLE_ANALOG;
  
  	if (sc->is_ca0108)
  		a_iocfg |= 0x20; /* XXX */
 @@ -2492,12 +2503,12 @@ emumix_set_mode(struct emu_sc_info *sc, 
  	if (mode == MODE_DIGITAL)
  		emumix_set_gpr(sc, sc->mute_gpr[ANALOGMUTE], 1);
  
 -	emu_wr(sc, HCFG, hcfg, 4);
 +	emu_wr(sc, EMU_HCFG, hcfg, 4);
  
  	if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
 -		tmp = emu_rd(sc, A_IOCFG, 2);
 +		tmp = emu_rd(sc, EMU_A_IOCFG, 2);
  		tmp = a_iocfg;
 -		emu_wr(sc, A_IOCFG, tmp, 2);
 +		emu_wr(sc, EMU_A_IOCFG, tmp, 2);
  	}
  
  	/* Unmute if we have changed mode to analog. */
 @@ -2523,16 +2534,16 @@ emumix_set_spdif_mode(struct emu_sc_info
  		return;
  	}
  
 -	spcs = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
 -	    SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
 -	    SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
 -	    SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
 +	spcs = EMU_SPCS_CLKACCY_1000PPM | EMU_SPCS_SAMPLERATE_48 |
 +	    EMU_SPCS_CHANNELNUM_LEFT | EMU_SPCS_SOURCENUM_UNSPEC |
 +	    EMU_SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
 +	    EMU_SPCS_EMPHASIS_NONE | EMU_SPCS_COPYRIGHT;
  
  	mode = SPDIF_MODE_PCM;
  
 -	emu_wrptr(sc, 0, SPCS0, spcs);
 -	emu_wrptr(sc, 0, SPCS1, spcs);
 -	emu_wrptr(sc, 0, SPCS2, spcs);
 +	emu_wrptr(sc, 0, EMU_SPCS0, spcs);
 +	emu_wrptr(sc, 0, EMU_SPCS1, spcs);
 +	emu_wrptr(sc, 0, EMU_SPCS2, spcs);
  }
  
  #define	L2L_POINTS	10
 @@ -2635,8 +2646,8 @@ emu_cardbus_init(struct emu_sc_info *sc)
  {
  
  	/*
 -	 * XXX May not need this if we have IPR3 handler.
 -	 * Is it a real init calls, or IPR3 interrupt acknowledgments?
 +	 * XXX May not need this if we have EMU_IPR3 handler.
 +	 * Is it a real init calls, or EMU_IPR3 interrupt acknowledgments?
  	 * Looks much like "(data << 16) | register".
  	 */
  	emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0000);
 @@ -2660,42 +2671,42 @@ emu_init(struct emu_sc_info *sc)
  	int i;
  
  	/* disable audio and lock cache */
 -	emu_wr(sc, HCFG, HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, 4);
 +	emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4);
  
  	/* reset recording buffers */
 -	emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, MICBA, 0);
 -	emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, FXBA, 0);
 -	emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, ADCBA, 0);
 +	emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_MICBA, 0);
 +	emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_FXBA, 0);
 +	emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_ADCBA, 0);
  
  	/* disable channel interrupt */
 -	emu_wr(sc, INTE, INTE_INTERVALTIMERENB | INTE_SAMPLERATETRACKER | INTE_PCIERRORENABLE, 4);
 -	emu_wrptr(sc, 0, CLIEL, 0);
 -	emu_wrptr(sc, 0, CLIEH, 0);
 -	emu_wrptr(sc, 0, SOLEL, 0);
 -	emu_wrptr(sc, 0, SOLEH, 0);
 +	emu_wr(sc, EMU_INTE, EMU_INTE_INTERTIMERENB | EMU_INTE_SAMPLERATER | EMU_INTE_PCIERRENABLE, 4);
 +	emu_wrptr(sc, 0, EMU_CLIEL, 0);
 +	emu_wrptr(sc, 0, EMU_CLIEH, 0);
 +	emu_wrptr(sc, 0, EMU_SOLEL, 0);
 +	emu_wrptr(sc, 0, EMU_SOLEH, 0);
  
  	/* disable P16V and S/PDIF interrupts */
  	if ((sc->is_ca0102) || (sc->is_ca0108))
 -		emu_wr(sc, INTE2, 0, 4);
 +		emu_wr(sc, EMU_INTE2, 0, 4);
  
  	if (sc->is_ca0102)
 -		emu_wr(sc, INTE3, 0, 4);
 +		emu_wr(sc, EMU_INTE3, 0, 4);
  
  	/* init phys inputs and outputs */
  	ac97slot = 0;
  	if (sc->has_51)
 -		ac97slot = AC97SLOT_CNTR | AC97SLOT_LFE;
 +		ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE;
  	if (sc->has_71)
 -		ac97slot = AC97SLOT_CNTR | AC97SLOT_LFE | AC97SLOT_REAR_LEFT | AC97SLOT_REAR_RIGHT;
 +		ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE | EMU_AC97SLOT_REAR_LEFT | EMU_AC97SLOT_REAR_RIGHT;
  	if (sc->is_emu10k2)
  		ac97slot |= 0x40;
 -	emu_wrptr(sc, 0, AC97SLOT, ac97slot);
 +	emu_wrptr(sc, 0, EMU_AC97SLOT, ac97slot);
  
  	if (sc->is_emu10k2)	/* XXX for later cards? */
 -		emu_wrptr(sc, 0, SPBYPASS, 0xf00);	/* What will happen if
 +		emu_wrptr(sc, 0, EMU_SPBYPASS, 0xf00);	/* What will happen if
  							 * we write 1 here? */
  
  	if (bus_dma_tag_create( /* parent */ bus_get_dma_tag(sc->dev),
 @@ -2729,61 +2740,61 @@ emu_init(struct emu_sc_info *sc)
  		sc->mem.ptb_pages[i] = tmp | i;
  
  	for (ch = 0; ch < NUM_G; ch++) {
 -		emu_wrptr(sc, ch, MAPA, tmp | MAP_PTI_MASK);
 -		emu_wrptr(sc, ch, MAPB, tmp | MAP_PTI_MASK);
 +		emu_wrptr(sc, ch, EMU_CHAN_MAPA, tmp | EMU_CHAN_MAP_PTI_MASK);
 +		emu_wrptr(sc, ch, EMU_CHAN_MAPB, tmp | EMU_CHAN_MAP_PTI_MASK);
 
 *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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State-Changed-From-To: open->patched 
State-Changed-By: pfg 
State-Changed-When: Wed Jan 11 21:33:52 UTC 2012 
State-Changed-Why:  
Committed on head. 

http://www.freebsd.org/cgi/query-pr.cgi?pr=153901 

From: dfilter@FreeBSD.ORG (dfilter service)
To: bug-followup@FreeBSD.org
Cc:  
Subject: Re: kern/153901: commit references a PR
Date: Fri,  3 Feb 2012 22:06:41 +0000 (UTC)

 Author: pfg
 Date: Fri Feb  3 22:06:27 2012
 New Revision: 230962
 URL: http://svn.freebsd.org/changeset/base/230962
 
 Log:
   MFC:	 r229430, r229980
   
   Replace a GPL'd header in the emu10k1 snd driver code.
   
   This brings in the emuxkireg.h from NetBSD (dev/pci) which
   is used for the same purpose but is smaller. The emu10k1
   is now free from the GPL.
   
   While here also merge some cleanups to the module Makefile.
   
   PR:		153901
   Obtained from:	NetBSD
   Approved by:	core (mentor implicit)
 
 Added:
   stable/9/sys/dev/sound/pci/emuxkireg.h
      - copied unchanged from r229430, head/sys/dev/sound/pci/emuxkireg.h
 Modified:
   stable/9/sys/conf/files
   stable/9/sys/dev/sound/pci/emu10k1.c
   stable/9/sys/modules/sound/driver/emu10k1/Makefile
 Directory Properties:
   stable/9/sys/   (props changed)
   stable/9/sys/conf/   (props changed)
   stable/9/sys/modules/sound/driver/emu10k1/   (props changed)
 
 Modified: stable/9/sys/conf/files
 ==============================================================================
 --- stable/9/sys/conf/files	Fri Feb  3 21:38:23 2012	(r230961)
 +++ stable/9/sys/conf/files	Fri Feb  3 22:06:27 2012	(r230962)
 @@ -50,7 +50,7 @@ aic79xx_reg_print.c	optional ahd pci				
  aic79xx_reg_print.o		optional ahd pci ahd_reg_pretty_print	   \
  	compile-with	"${NORMAL_C}"					   \
  	no-implicit-rule local
 -emu10k1-alsa%diked.h		optional snd_emu10k1 | snd_emu10kx	   \
 +emu10k1-alsa%diked.h		optional snd_emu10kx	   \
  	dependency	"$S/tools/sound/emu10k1-mkalsa.sh $S/gnu/dev/sound/pci/emu10k1-alsa.h" \
  	compile-with	"CC='${CC}' AWK=${AWK} sh $S/tools/sound/emu10k1-mkalsa.sh $S/gnu/dev/sound/pci/emu10k1-alsa.h emu10k1-alsa%diked.h" \
  	no-obj no-implicit-rule before-depend				   \
 @@ -1727,9 +1727,7 @@ dev/sound/pci/csa.c		optional snd_csa pc
  	warning "kernel contains GPL contaminated csaimg.h header"
  dev/sound/pci/csapcm.c		optional snd_csa pci
  dev/sound/pci/ds1.c		optional snd_ds1 pci
 -dev/sound/pci/emu10k1.c		optional snd_emu10k1 pci \
 -	dependency "emu10k1-alsa%diked.h" \
 -	warning "kernel contains GPL contaminated emu10k1 headers"
 +dev/sound/pci/emu10k1.c		optional snd_emu10k1 pci
  dev/sound/pci/emu10kx.c		optional snd_emu10kx pci \
  	dependency "emu10k1-alsa%diked.h" \
  	dependency "p16v-alsa%diked.h" \
 
 Modified: stable/9/sys/dev/sound/pci/emu10k1.c
 ==============================================================================
 --- stable/9/sys/dev/sound/pci/emu10k1.c	Fri Feb  3 21:38:23 2012	(r230961)
 +++ stable/9/sys/dev/sound/pci/emu10k1.c	Fri Feb  3 22:06:27 2012	(r230962)
 @@ -32,7 +32,7 @@
  
  #include <dev/sound/pcm/sound.h>
  #include <dev/sound/pcm/ac97.h>
 -#include "emu10k1-alsa%diked.h"
 +#include <dev/sound/pci/emuxkireg.h>
  
  #include <dev/pci/pcireg.h>
  #include <dev/pci/pcivar.h>
 @@ -66,12 +66,94 @@ SND_DECLARE_FILE("$FreeBSD$");
  
  #define	ENABLE		0xffffffff
  #define	DISABLE		0x00000000
 -#define	ENV_ON		DCYSUSV_CHANNELENABLE_MASK
 +#define	ENV_ON		EMU_CHAN_DCYSUSV_CHANNELENABLE_MASK
  #define	ENV_OFF		0x00	/* XXX: should this be 1? */
  
 -#define	A_IOCFG_GPOUT_A	0x40	/* Analog Output */
 -#define	A_IOCFG_GPOUT_D	0x04	/* Digital Output */
 -#define	A_IOCFG_GPOUT_AD (A_IOCFG_GPOUT_A|A_IOCFG_GPOUT_D)  /* A_IOCFG_GPOUT0 */
 +#define	EMU_A_IOCFG_GPOUT_A	0x40
 +#define	EMU_A_IOCFG_GPOUT_D	0x04
 +#define	EMU_A_IOCFG_GPOUT_AD (EMU_A_IOCFG_GPOUT_A|EMU_A_IOCFG_GPOUT_D)  /* EMU_A_IOCFG_GPOUT0 */
 +
 +#define	EMU_HCFG_GPOUT1		0x00000800
 +
 +/* instruction set */
 +#define iACC3	 0x06
 +#define iMACINT0 0x04
 +#define iINTERP  0x0e
 +
 +#define C_00000000	0x40
 +#define C_00000001	0x41
 +#define C_00000004	0x44
 +#define C_40000000	0x4d
 +/* Audigy constants */
 +#define A_C_00000000	0xc0
 +#define A_C_40000000	0xcd
 +
 +/* GPRs */
 +#define FXBUS(x)	(0x00 + (x))
 +#define EXTIN(x)	(0x10 + (x))
 +#define EXTOUT(x)	(0x20 + (x))
 +
 +#define GPR(x)		(EMU_FXGPREGBASE + (x))
 +#define A_EXTIN(x)	(0x40 + (x))
 +#define A_FXBUS(x)	(0x00 + (x))
 +#define A_EXTOUT(x)	(0x60 + (x))
 +#define A_GPR(x)	(EMU_A_FXGPREGBASE + (x))
 +
 +/* FX buses */
 +#define FXBUS_PCM_LEFT		0x00
 +#define FXBUS_PCM_RIGHT		0x01
 +#define FXBUS_MIDI_LEFT		0x04
 +#define FXBUS_MIDI_RIGHT	0x05
 +#define FXBUS_MIDI_REVERB	0x0c
 +#define FXBUS_MIDI_CHORUS	0x0d
 +
 +/* Inputs */
 +#define EXTIN_AC97_L		0x00
 +#define EXTIN_AC97_R		0x01
 +#define EXTIN_SPDIF_CD_L	0x02
 +#define EXTIN_SPDIF_CD_R	0x03
 +#define EXTIN_TOSLINK_L		0x06
 +#define EXTIN_TOSLINK_R		0x07
 +#define EXTIN_COAX_SPDIF_L	0x0a
 +#define EXTIN_COAX_SPDIF_R	0x0b
 +/* Audigy Inputs */
 +#define A_EXTIN_AC97_L		0x00
 +#define A_EXTIN_AC97_R		0x01
 +
 +/* Outputs */
 +#define EXTOUT_AC97_L	   0x00
 +#define EXTOUT_AC97_R	   0x01
 +#define EXTOUT_TOSLINK_L   0x02
 +#define EXTOUT_TOSLINK_R   0x03
 +#define EXTOUT_AC97_CENTER 0x04
 +#define EXTOUT_AC97_LFE	   0x05
 +#define EXTOUT_HEADPHONE_L 0x06
 +#define EXTOUT_HEADPHONE_R 0x07
 +#define EXTOUT_REAR_L	   0x08
 +#define EXTOUT_REAR_R	   0x09
 +#define EXTOUT_ADC_CAP_L   0x0a
 +#define EXTOUT_ADC_CAP_R   0x0b
 +#define EXTOUT_ACENTER	   0x11
 +#define EXTOUT_ALFE	   0x12
 +/* Audigy Outputs */
 +#define A_EXTOUT_FRONT_L	0x00
 +#define A_EXTOUT_FRONT_R	0x01
 +#define A_EXTOUT_CENTER		0x02
 +#define A_EXTOUT_LFE		0x03
 +#define A_EXTOUT_HEADPHONE_L	0x04
 +#define A_EXTOUT_HEADPHONE_R	0x05
 +#define A_EXTOUT_REAR_L		0x06
 +#define A_EXTOUT_REAR_R		0x07
 +#define A_EXTOUT_AFRONT_L	0x08
 +#define A_EXTOUT_AFRONT_R	0x09
 +#define A_EXTOUT_ACENTER	0x0a
 +#define A_EXTOUT_ALFE		0x0b
 +#define A_EXTOUT_AREAR_L	0x0e
 +#define A_EXTOUT_AREAR_R	0x0f
 +#define A_EXTOUT_AC97_L		0x10
 +#define A_EXTOUT_AC97_R		0x11
 +#define A_EXTOUT_ADC_CAP_L	0x16
 +#define A_EXTOUT_ADC_CAP_R	0x17
  
  struct emu_memblk {
  	SLIST_ENTRY(emu_memblk) link;
 @@ -247,9 +329,9 @@ emu_rdptr(struct sc_info *sc, int chn, i
  {
  	u_int32_t ptr, val, mask, size, offset;
  
 -	ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK);
 -	emu_wr(sc, PTR, ptr, 4);
 -	val = emu_rd(sc, DATA, 4);
 +	ptr = ((reg << 16) & sc->addrmask) | (chn & EMU_PTR_CHNO_MASK);
 +	emu_wr(sc, EMU_PTR, ptr, 4);
 +	val = emu_rd(sc, EMU_DATA, 4);
  	if (reg & 0xff000000) {
  		size = (reg >> 24) & 0x3f;
  		offset = (reg >> 16) & 0x1f;
 @@ -265,23 +347,23 @@ emu_wrptr(struct sc_info *sc, int chn, i
  {
  	u_int32_t ptr, mask, size, offset;
  
 -	ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK);
 -	emu_wr(sc, PTR, ptr, 4);
 +	ptr = ((reg << 16) & sc->addrmask) | (chn & EMU_PTR_CHNO_MASK);
 +	emu_wr(sc, EMU_PTR, ptr, 4);
  	if (reg & 0xff000000) {
  		size = (reg >> 24) & 0x3f;
  		offset = (reg >> 16) & 0x1f;
  		mask = ((1 << size) - 1) << offset;
  		data <<= offset;
  		data &= mask;
 -		data |= emu_rd(sc, DATA, 4) & ~mask;
 +		data |= emu_rd(sc, EMU_DATA, 4) & ~mask;
  	}
 -	emu_wr(sc, DATA, data, 4);
 +	emu_wr(sc, EMU_DATA, data, 4);
  }
  
  static void
  emu_wrefx(struct sc_info *sc, unsigned int pc, unsigned int data)
  {
 -	pc += sc->audigy ? A_MICROCODEBASE : MICROCODEBASE;
 +	pc += sc->audigy ? EMU_A_MICROCODEBASE : EMU_MICROCODEBASE;
  	emu_wrptr(sc, 0, pc, data);
  }
  
 @@ -294,8 +376,8 @@ emu_rdcd(kobj_t obj, void *devinfo, int 
  {
  	struct sc_info *sc = (struct sc_info *)devinfo;
  
 -	emu_wr(sc, AC97ADDRESS, regno, 1);
 -	return emu_rd(sc, AC97DATA, 2);
 +	emu_wr(sc, EMU_AC97ADDR, regno, 1);
 +	return emu_rd(sc, EMU_AC97DATA, 2);
  }
  
  static int
 @@ -303,8 +385,8 @@ emu_wrcd(kobj_t obj, void *devinfo, int 
  {
  	struct sc_info *sc = (struct sc_info *)devinfo;
  
 -	emu_wr(sc, AC97ADDRESS, regno, 1);
 -	emu_wr(sc, AC97DATA, data, 2);
 +	emu_wr(sc, EMU_AC97ADDR, regno, 1);
 +	emu_wr(sc, EMU_AC97DATA, data, 2);
  	return 0;
  }
  
 @@ -346,7 +428,7 @@ emu_settimer(struct sc_info *sc)
  	}
  	RANGE(rate, 48, 9600);
  	sc->timerinterval = 48000 / rate;
 -	emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2);
 +	emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2);
  
  	return sc->timerinterval;
  }
 @@ -357,15 +439,15 @@ emu_enatimer(struct sc_info *sc, int go)
  	u_int32_t x;
  	if (go) {
  		if (sc->timer++ == 0) {
 -			x = emu_rd(sc, INTE, 4);
 -			x |= INTE_INTERVALTIMERENB;
 -			emu_wr(sc, INTE, x, 4);
 +			x = emu_rd(sc, EMU_INTE, 4);
 +			x |= EMU_INTE_INTERTIMERENB;
 +			emu_wr(sc, EMU_INTE, x, 4);
  		}
  	} else {
  		sc->timer = 0;
 -		x = emu_rd(sc, INTE, 4);
 -		x &= ~INTE_INTERVALTIMERENB;
 -		emu_wr(sc, INTE, x, 4);
 +		x = emu_rd(sc, EMU_INTE, 4);
 +		x &= ~EMU_INTE_INTERTIMERENB;
 +		emu_wr(sc, EMU_INTE, x, 4);
  	}
  	return 0;
  }
 @@ -373,7 +455,7 @@ emu_enatimer(struct sc_info *sc, int go)
  static void
  emu_enastop(struct sc_info *sc, char channel, int enable)
  {
 -	int reg = (channel & 0x20) ? SOLEH : SOLEL;
 +	int reg = (channel & 0x20) ? EMU_SOLEH : EMU_SOLEL;
  	channel &= 0x1f;
  	reg |= 1 << 24;
  	reg |= channel << 16;
 @@ -568,49 +650,49 @@ emu_vwrite(struct sc_info *sc, struct em
  		r = v->ismaster ? 0 : r;
  	}
  
 -	emu_wrptr(sc, v->vnum, CPF, v->stereo ? CPF_STEREO_MASK : 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, v->stereo ? EMU_CHAN_CPF_STEREO_MASK : 0);
  	val = v->stereo ? 28 : 30;
  	val *= v->b16 ? 1 : 2;
  	start = sa + val;
  
  	if (sc->audigy) {
 -		emu_wrptr(sc, v->vnum, A_FXRT1, v->fxrt1);
 -		emu_wrptr(sc, v->vnum, A_FXRT2, v->fxrt2);
 -		emu_wrptr(sc, v->vnum, A_SENDAMOUNTS, 0);
 +		emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT1, v->fxrt1);
 +		emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT2, v->fxrt2);
 +		emu_wrptr(sc, v->vnum, EMU_A_CHAN_SENDAMOUNTS, 0);
  	}
  	else
 -		emu_wrptr(sc, v->vnum, FXRT, v->fxrt1 << 16);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_FXRT, v->fxrt1 << 16);
  
 -	emu_wrptr(sc, v->vnum, PTRX, (x << 8) | r);
 -	emu_wrptr(sc, v->vnum, DSL, ea | (y << 24));
 -	emu_wrptr(sc, v->vnum, PSST, sa | (l << 24));
 -	emu_wrptr(sc, v->vnum, CCCA, start | (v->b16 ? 0 : CCCA_8BITSELECT));
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX, (x << 8) | r);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_DSL, ea | (y << 24));
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_PSST, sa | (l << 24));
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_CCCA, start | (v->b16 ? 0 : EMU_CHAN_CCCA_8BITSELECT));
  
 -	emu_wrptr(sc, v->vnum, Z1, 0);
 -	emu_wrptr(sc, v->vnum, Z2, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_Z1, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_Z2, 0);
  
  	silent_page = ((u_int32_t)(sc->mem.silent_page_addr) << 1)
 -	    | MAP_PTI_MASK;
 -	emu_wrptr(sc, v->vnum, MAPA, silent_page);
 -	emu_wrptr(sc, v->vnum, MAPB, silent_page);
 -
 -	emu_wrptr(sc, v->vnum, CVCF, CVCF_CURRENTFILTER_MASK);
 -	emu_wrptr(sc, v->vnum, VTFT, VTFT_FILTERTARGET_MASK);
 -	emu_wrptr(sc, v->vnum, ATKHLDM, 0);
 -	emu_wrptr(sc, v->vnum, DCYSUSM, DCYSUSM_DECAYTIME_MASK);
 -	emu_wrptr(sc, v->vnum, LFOVAL1, 0x8000);
 -	emu_wrptr(sc, v->vnum, LFOVAL2, 0x8000);
 -	emu_wrptr(sc, v->vnum, FMMOD, 0);
 -	emu_wrptr(sc, v->vnum, TREMFRQ, 0);
 -	emu_wrptr(sc, v->vnum, FM2FRQ2, 0);
 -	emu_wrptr(sc, v->vnum, ENVVAL, 0x8000);
 -
 -	emu_wrptr(sc, v->vnum, ATKHLDV,
 -	    ATKHLDV_HOLDTIME_MASK | ATKHLDV_ATTACKTIME_MASK);
 -	emu_wrptr(sc, v->vnum, ENVVOL, 0x8000);
 +	    | EMU_CHAN_MAP_PTI_MASK;
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_MAPA, silent_page);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_MAPB, silent_page);
 +
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, EMU_CHAN_CVCF_CURRFILTER_MASK);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, EMU_CHAN_VTFT_FILTERTARGET_MASK);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDM, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSM, EMU_CHAN_DCYSUSM_DECAYTIME_MASK);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL1, 0x8000);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL2, 0x8000);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_FMMOD, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_TREMFRQ, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_FM2FRQ2, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVAL, 0x8000);
 +
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDV,
 +	    EMU_CHAN_ATKHLDV_HOLDTIME_MASK | EMU_CHAN_ATKHLDV_ATTACKTIME_MASK);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVOL, 0x8000);
  
 -	emu_wrptr(sc, v->vnum, PEFE_FILTERAMOUNT, 0x7f);
 -	emu_wrptr(sc, v->vnum, PEFE_PITCHAMOUNT, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_FILTERAMOUNT, 0x7f);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_PITCHAMOUNT, 0);
  
  	if (v->slave != NULL)
  		emu_vwrite(sc, v->slave);
 @@ -631,29 +713,29 @@ emu_vtrigger(struct sc_info *sc, struct 
  		sample = v->b16 ? 0x00000000 : 0x80808080;
  
  		for (i = 0; i < cs; i++)
 -			emu_wrptr(sc, v->vnum, CD0 + i, sample);
 -		emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, 0);
 -		emu_wrptr(sc, v->vnum, CCR_READADDRESS, cra);
 -		emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, ccis);
 -
 -		emu_wrptr(sc, v->vnum, IFATN, 0xff00);
 -		emu_wrptr(sc, v->vnum, VTFT, 0xffffffff);
 -		emu_wrptr(sc, v->vnum, CVCF, 0xffffffff);
 -		emu_wrptr(sc, v->vnum, DCYSUSV, 0x00007f7f);
 +			emu_wrptr(sc, v->vnum, EMU_CHAN_CD0 + i, sample);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_READADDRESS, cra);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, ccis);
 +
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xff00);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0xffffffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0xffffffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSV, 0x00007f7f);
  		emu_enastop(sc, v->vnum, 0);
  
  		pitch_target = emu_rate_to_linearpitch(v->speed);
  		initial_pitch = emu_rate_to_pitch(v->speed) >> 8;
 -		emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, pitch_target);
 -		emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, pitch_target);
 -		emu_wrptr(sc, v->vnum, IP, initial_pitch);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, pitch_target);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, pitch_target);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_IP, initial_pitch);
  	} else {
 -		emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, 0);
 -		emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, 0);
 -		emu_wrptr(sc, v->vnum, IFATN, 0xffff);
 -		emu_wrptr(sc, v->vnum, VTFT, 0x0000ffff);
 -		emu_wrptr(sc, v->vnum, CVCF, 0x0000ffff);
 -		emu_wrptr(sc, v->vnum, IP, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0x0000ffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0x0000ffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_IP, 0);
  		emu_enastop(sc, v->vnum, 1);
  	}
  	if (v->slave != NULL)
 @@ -666,7 +748,7 @@ emu_vpos(struct sc_info *sc, struct emu_
  	int s, ptr;
  
  	s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0);
 -	ptr = (emu_rdptr(sc, v->vnum, CCCA_CURRADDR) - (v->start >> s)) << s;
 +	ptr = (emu_rdptr(sc, v->vnum, EMU_CHAN_CCCA_CURRADDR) - (v->start >> s)) << s;
  	return ptr & ~0x0000001f;
  }
  
 @@ -875,27 +957,27 @@ emurchan_init(kobj_t obj, void *devinfo,
  	ch->num = sc->rnum;
  	switch(sc->rnum) {
  	case 0:
 -		ch->idxreg = sc->audigy ? A_ADCIDX : ADCIDX;
 -		ch->basereg = ADCBA;
 -		ch->sizereg = ADCBS;
 -		ch->setupreg = ADCCR;
 -		ch->irqmask = INTE_ADCBUFENABLE;
 +		ch->idxreg = sc->audigy ? EMU_A_ADCIDX : EMU_ADCIDX;
 +		ch->basereg = EMU_ADCBA;
 +		ch->sizereg = EMU_ADCBS;
 +		ch->setupreg = EMU_ADCCR;
 +		ch->irqmask = EMU_INTE_ADCBUFENABLE;
  		break;
  
  	case 1:
 -		ch->idxreg = FXIDX;
 -		ch->basereg = FXBA;
 -		ch->sizereg = FXBS;
 -		ch->setupreg = FXWC;
 -		ch->irqmask = INTE_EFXBUFENABLE;
 +		ch->idxreg = EMU_FXIDX;
 +		ch->basereg = EMU_FXBA;
 +		ch->sizereg = EMU_FXBS;
 +		ch->setupreg = EMU_FXWC;
 +		ch->irqmask = EMU_INTE_EFXBUFENABLE;
  		break;
  
  	case 2:
 -		ch->idxreg = MICIDX;
 -		ch->basereg = MICBA;
 -		ch->sizereg = MICBS;
 +		ch->idxreg = EMU_MICIDX;
 +		ch->basereg = EMU_MICBA;
 +		ch->sizereg = EMU_MICBS;
  		ch->setupreg = 0;
 -		ch->irqmask = INTE_MICBUFENABLE;
 +		ch->irqmask = EMU_INTE_MICBUFENABLE;
  		break;
  	}
  	sc->rnum++;
 @@ -967,27 +1049,27 @@ emurchan_trigger(kobj_t obj, void *data,
  
  	switch(sc->bufsz) {
  	case 4096:
 -		sz = ADCBS_BUFSIZE_4096;
 +		sz = EMU_RECBS_BUFSIZE_4096;
  		break;
  
  	case 8192:
 -		sz = ADCBS_BUFSIZE_8192;
 +		sz = EMU_RECBS_BUFSIZE_8192;
  		break;
  
  	case 16384:
 -		sz = ADCBS_BUFSIZE_16384;
 +		sz = EMU_RECBS_BUFSIZE_16384;
  		break;
  
  	case 32768:
 -		sz = ADCBS_BUFSIZE_32768;
 +		sz = EMU_RECBS_BUFSIZE_32768;
  		break;
  
  	case 65536:
 -		sz = ADCBS_BUFSIZE_65536;
 +		sz = EMU_RECBS_BUFSIZE_65536;
  		break;
  
  	default:
 -		sz = ADCBS_BUFSIZE_4096;
 +		sz = EMU_RECBS_BUFSIZE_4096;
  	}
  
  	snd_mtxlock(sc->lock);
 @@ -997,23 +1079,23 @@ emurchan_trigger(kobj_t obj, void *data,
  		emu_wrptr(sc, 0, ch->sizereg, sz);
  		if (ch->num == 0) {
  			if (sc->audigy) {
 -				val = A_ADCCR_LCHANENABLE;
 +				val = EMU_A_ADCCR_LCHANENABLE;
  				if (AFMT_CHANNEL(ch->fmt) > 1)
 -					val |= A_ADCCR_RCHANENABLE;
 +					val |= EMU_A_ADCCR_RCHANENABLE;
  				val |= audigy_recval(ch->spd);
  			} else {
 -				val = ADCCR_LCHANENABLE;
 +				val = EMU_ADCCR_LCHANENABLE;
  				if (AFMT_CHANNEL(ch->fmt) > 1)
 -					val |= ADCCR_RCHANENABLE;
 +					val |= EMU_ADCCR_RCHANENABLE;
  				val |= emu_recval(ch->spd);
  			}
  
  			emu_wrptr(sc, 0, ch->setupreg, 0);
  			emu_wrptr(sc, 0, ch->setupreg, val);
  		}
 -		val = emu_rd(sc, INTE, 4);
 +		val = emu_rd(sc, EMU_INTE, 4);
  		val |= ch->irqmask;
 -		emu_wr(sc, INTE, val, 4);
 +		emu_wr(sc, EMU_INTE, val, 4);
  		break;
  
  	case PCMTRIG_STOP:
 @@ -1022,9 +1104,9 @@ emurchan_trigger(kobj_t obj, void *data,
  		emu_wrptr(sc, 0, ch->sizereg, 0);
  		if (ch->setupreg)
  			emu_wrptr(sc, 0, ch->setupreg, 0);
 -		val = emu_rd(sc, INTE, 4);
 +		val = emu_rd(sc, EMU_INTE, 4);
  		val &= ~ch->irqmask;
 -		emu_wr(sc, INTE, val, 4);
 +		emu_wr(sc, EMU_INTE, val, 4);
  		break;
  
  	case PCMTRIG_EMLDMAWR:
 @@ -1122,9 +1204,9 @@ emu_midiattach(struct sc_info *sc)
  {
  	int i;
  
 -	i = emu_rd(sc, INTE, 4);
 -	i |= INTE_MIDIRXENABLE;
 -	emu_wr(sc, INTE, i, 4);
 +	i = emu_rd(sc, EMU_INTE, 4);
 +	i |= EMU_INTE_MIDIRXENABLE;
 +	emu_wr(sc, EMU_INTE, i, 4);
  
  	sc->mpu = mpu401_init(&emu_mpu_class, sc, emu_intr2, &sc->mpu_intr);
  }
 @@ -1139,52 +1221,52 @@ emu_intr(void *data)
  
  	snd_mtxlock(sc->lock);
  	while (1) {
 -		stat = emu_rd(sc, IPR, 4);
 +		stat = emu_rd(sc, EMU_IPR, 4);
  		if (stat == 0)
  			break;
  		ack = 0;
  
  		/* process irq */
 -		if (stat & IPR_INTERVALTIMER)
 -			ack |= IPR_INTERVALTIMER;
 +		if (stat & EMU_IPR_INTERVALTIMER)
 +			ack |= EMU_IPR_INTERVALTIMER;
  
 -		if (stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL))
 -			ack |= stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL);
 +		if (stat & (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL))
 +			ack |= stat & (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL);
  
 -		if (stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL))
 -			ack |= stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL);
 +		if (stat & (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL))
 +			ack |= stat & (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL);
  
 -		if (stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL))
 -			ack |= stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL);
 +		if (stat & (EMU_IPR_MICBUFFULL | EMU_IPR_MICBUFHALFFULL))
 +			ack |= stat & (EMU_IPR_MICBUFFULL | EMU_IPR_MICBUFHALFFULL);
  
 -		if (stat & IPR_PCIERROR) {
 -			ack |= IPR_PCIERROR;
 +		if (stat & EMU_PCIERROR) {
 +			ack |= EMU_PCIERROR;
  			device_printf(sc->dev, "pci error\n");
  			/* we still get an nmi with ecc ram even if we ack this */
  		}
 -		if (stat & IPR_SAMPLERATETRACKER) {
 -			ack |= IPR_SAMPLERATETRACKER;
 +		if (stat & EMU_IPR_RATETRCHANGE) {
 +			ack |= EMU_IPR_RATETRCHANGE;
  #ifdef EMUDEBUG
  			device_printf(sc->dev,
  			    "sample rate tracker lock status change\n");
  #endif
  		}
  
 -	    if (stat & IPR_MIDIRECVBUFEMPTY)
 +	    if (stat & EMU_IPR_MIDIRECVBUFE)
  		if (sc->mpu_intr) {
  		    (sc->mpu_intr)(sc->mpu);
 -		    ack |= IPR_MIDIRECVBUFEMPTY | IPR_MIDITRANSBUFEMPTY;
 +		    ack |= EMU_IPR_MIDIRECVBUFE | EMU_IPR_MIDITRANSBUFE;
   		}
  		if (stat & ~ack)
  			device_printf(sc->dev, "dodgy irq: %x (harmless)\n",
  			    stat & ~ack);
  
 -		emu_wr(sc, IPR, stat, 4);
 +		emu_wr(sc, EMU_IPR, stat, 4);
  
  		if (ack) {
  			snd_mtxunlock(sc->lock);
  
 -			if (ack & IPR_INTERVALTIMER) {
 +			if (ack & EMU_IPR_INTERVALTIMER) {
  				x = 0;
  				for (i = 0; i < sc->nchans; i++) {
  					if (sc->pch[i].run) {
 @@ -1197,15 +1279,15 @@ emu_intr(void *data)
  			}
  
  
 -			if (ack & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) {
 +			if (ack & (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL)) {
  				if (sc->rch[0].channel)
  					chn_intr(sc->rch[0].channel);
  			}
 -			if (ack & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) {
 +			if (ack & (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL)) {
  				if (sc->rch[1].channel)
  					chn_intr(sc->rch[1].channel);
  			}
 -			if (ack & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL)) {
 +			if (ack & (EMU_IPR_MICBUFFULL | EMU_IPR_MICBUFHALFFULL)) {
  				if (sc->rch[2].channel)
  					chn_intr(sc->rch[2].channel);
  			}
 @@ -1378,12 +1460,12 @@ audigy_initefx(struct sc_info *sc)
  		audigy_addefxop(sc, 0x0f, 0x0c0, 0x0c0, 0x0cf, 0x0c0, &pc);
  
  	for (i = 0; i < 512; i++)
 -		emu_wrptr(sc, 0, A_FXGPREGBASE + i, 0x0);
 +		emu_wrptr(sc, 0, EMU_A_FXGPREGBASE + i, 0x0);
  
  	pc = 16;
  
  	/* stop fx processor */
 -	emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP);
 +	emu_wrptr(sc, 0, EMU_A_DBG, EMU_A_DBG_SINGLE_STEP);
  
  	/* Audigy 2 (EMU10K2) DSP Registers:
  	   FX Bus
 @@ -1518,7 +1600,7 @@ audigy_initefx(struct sc_info *sc)
  			A_C_00000000, A_EXTIN(A_EXTIN_AC97_R), &pc);
  
  	/* resume normal operations */
 -	emu_wrptr(sc, 0, A_DBG, 0);
 +	emu_wrptr(sc, 0, EMU_A_DBG, 0);
  }
  
  static void
 @@ -1534,7 +1616,7 @@ emu_initefx(struct sc_info *sc)
  	}
  
  	for (i = 0; i < 256; i++)
 -		emu_wrptr(sc, 0, FXGPREGBASE + i, 0);
 +		emu_wrptr(sc, 0, EMU_FXGPREGBASE + i, 0);
  
  	/* FX-8010 DSP Registers:
  	   FX Bus
 @@ -1654,7 +1736,7 @@ emu_initefx(struct sc_info *sc)
  			C_00000000, EXTIN(EXTIN_AC97_R), &pc);
  
  	/* resume normal operations */
 -	emu_wrptr(sc, 0, DBG, 0);
 +	emu_wrptr(sc, 0, EMU_DBG, 0);
  }
  
  /* Probe and attach the card */
 @@ -1665,69 +1747,69 @@ emu_init(struct sc_info *sc)
  
  	if (sc->audigy) {
  		/* enable additional AC97 slots */
 -		emu_wrptr(sc, 0, AC97SLOT, AC97SLOT_CNTR | AC97SLOT_LFE);
 +		emu_wrptr(sc, 0, EMU_AC97SLOT, EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE);
  	}
  
  	/* disable audio and lock cache */
 -	emu_wr(sc, HCFG,
 -	    HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
 +	emu_wr(sc, EMU_HCFG,
 +	    EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE,
  	    4);
  
  	/* reset recording buffers */
 -	emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, MICBA, 0);
 -	emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, FXBA, 0);
 -	emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, ADCBA, 0);
 +	emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_MICBA, 0);
 +	emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_FXBA, 0);
 +	emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_ADCBA, 0);
  
  	/* disable channel interrupt */
 -	emu_wr(sc, INTE,
 -	    INTE_INTERVALTIMERENB | INTE_SAMPLERATETRACKER | INTE_PCIERRORENABLE,
 +	emu_wr(sc, EMU_INTE,
 +	    EMU_INTE_INTERTIMERENB | EMU_INTE_SAMPLERATER | EMU_INTE_PCIERRENABLE,
  	    4);
 -	emu_wrptr(sc, 0, CLIEL, 0);
 -	emu_wrptr(sc, 0, CLIEH, 0);
 -	emu_wrptr(sc, 0, SOLEL, 0);
 -	emu_wrptr(sc, 0, SOLEH, 0);
 +	emu_wrptr(sc, 0, EMU_CLIEL, 0);
 +	emu_wrptr(sc, 0, EMU_CLIEH, 0);
 +	emu_wrptr(sc, 0, EMU_SOLEL, 0);
 +	emu_wrptr(sc, 0, EMU_SOLEH, 0);
  
  	/* wonder what these do... */
  	if (sc->audigy) {
 -		emu_wrptr(sc, 0, SPBYPASS, 0xf00);
 -		emu_wrptr(sc, 0, AC97SLOT, 0x3);
 +		emu_wrptr(sc, 0, EMU_SPBYPASS, 0xf00);
 +		emu_wrptr(sc, 0, EMU_AC97SLOT, 0x3);
  	}
  
  	/* init envelope engine */
  	for (ch = 0; ch < NUM_G; ch++) {
 -		emu_wrptr(sc, ch, DCYSUSV, ENV_OFF);
 -		emu_wrptr(sc, ch, IP, 0);
 -		emu_wrptr(sc, ch, VTFT, 0xffff);
 -		emu_wrptr(sc, ch, CVCF, 0xffff);
 -		emu_wrptr(sc, ch, PTRX, 0);
 -		emu_wrptr(sc, ch, CPF, 0);
 -		emu_wrptr(sc, ch, CCR, 0);
 -
 -		emu_wrptr(sc, ch, PSST, 0);
 -		emu_wrptr(sc, ch, DSL, 0x10);
 -		emu_wrptr(sc, ch, CCCA, 0);
 -		emu_wrptr(sc, ch, Z1, 0);
 -		emu_wrptr(sc, ch, Z2, 0);
 -		emu_wrptr(sc, ch, FXRT, 0xd01c0000);
 -
 -		emu_wrptr(sc, ch, ATKHLDM, 0);
 -		emu_wrptr(sc, ch, DCYSUSM, 0);
 -		emu_wrptr(sc, ch, IFATN, 0xffff);
 -		emu_wrptr(sc, ch, PEFE, 0);
 -		emu_wrptr(sc, ch, FMMOD, 0);
 -		emu_wrptr(sc, ch, TREMFRQ, 24);	/* 1 Hz */
 -		emu_wrptr(sc, ch, FM2FRQ2, 24);	/* 1 Hz */
 -		emu_wrptr(sc, ch, TEMPENV, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, ENV_OFF);
 +		emu_wrptr(sc, ch, EMU_CHAN_IP, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0xffff);
 +		emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0xffff);
 +		emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_CPF, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_CCR, 0);
 +
 +		emu_wrptr(sc, ch, EMU_CHAN_PSST, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_DSL, 0x10);
 +		emu_wrptr(sc, ch, EMU_CHAN_CCCA, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_Z1, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_Z2, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_FXRT, 0xd01c0000);
 +
 +		emu_wrptr(sc, ch, EMU_CHAN_ATKHLDM, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_DCYSUSM, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_IFATN, 0xffff);
 +		emu_wrptr(sc, ch, EMU_CHAN_PEFE, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_FMMOD, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_TREMFRQ, 24);	/* 1 Hz */
 +		emu_wrptr(sc, ch, EMU_CHAN_FM2FRQ2, 24);	/* 1 Hz */
 +		emu_wrptr(sc, ch, EMU_CHAN_TEMPENV, 0);
  
  		/*** these are last so OFF prevents writing ***/
 -		emu_wrptr(sc, ch, LFOVAL2, 0);
 -		emu_wrptr(sc, ch, LFOVAL1, 0);
 -		emu_wrptr(sc, ch, ATKHLDV, 0);
 -		emu_wrptr(sc, ch, ENVVOL, 0);
 -		emu_wrptr(sc, ch, ENVVAL, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_LFOVAL2, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_LFOVAL1, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_ATKHLDV, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_ENVVOL, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_ENVVAL, 0);
  
  		if (sc->audigy) {
  			/* audigy cards need this to initialize correctly */
 @@ -1736,9 +1818,9 @@ emu_init(struct sc_info *sc)
  			emu_wrptr(sc, ch, 0x4e, 0);
  			emu_wrptr(sc, ch, 0x4f, 0);
  			/* set default routing */
 -			emu_wrptr(sc, ch, A_FXRT1, 0x03020100);
 -			emu_wrptr(sc, ch, A_FXRT2, 0x3f3f3f3f);
 -			emu_wrptr(sc, ch, A_SENDAMOUNTS, 0);
 +			emu_wrptr(sc, ch, EMU_A_CHAN_FXRT1, 0x03020100);
 +			emu_wrptr(sc, ch, EMU_A_CHAN_FXRT2, 0x3f3f3f3f);
 +			emu_wrptr(sc, ch, EMU_A_CHAN_SENDAMOUNTS, 0);
  		}
  
  		sc->voice[ch].vnum = ch;
 @@ -1769,13 +1851,13 @@ emu_init(struct sc_info *sc)
  	 *  AN                = 0     (Audio data)
  	 *  P                 = 0     (Consumer)
  	 */
 -	spcs = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
 -	    SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
 -	    SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
 -	    SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
 -	emu_wrptr(sc, 0, SPCS0, spcs);
 -	emu_wrptr(sc, 0, SPCS1, spcs);
 -	emu_wrptr(sc, 0, SPCS2, spcs);
 +	spcs = EMU_SPCS_CLKACCY_1000PPM | EMU_SPCS_SAMPLERATE_48 |
 +	    EMU_SPCS_CHANNELNUM_LEFT | EMU_SPCS_SOURCENUM_UNSPEC |
 +	    EMU_SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
 +	    EMU_SPCS_EMPHASIS_NONE | EMU_SPCS_COPYRIGHT;
 +	emu_wrptr(sc, 0, EMU_SPCS0, spcs);
 +	emu_wrptr(sc, 0, EMU_SPCS1, spcs);
 +	emu_wrptr(sc, 0, EMU_SPCS2, spcs);
  
  	if (!sc->audigy)
  		emu_initefx(sc);
 @@ -1786,8 +1868,8 @@ emu_init(struct sc_info *sc)
  		u_int32_t tmp;
  
  		/* Setup SRCMulti_I2S SamplingRate */
 -		tmp = emu_rdptr(sc, 0, A_SPDIF_SAMPLERATE) & 0xfffff1ff;
 -		emu_wrptr(sc, 0, A_SPDIF_SAMPLERATE, tmp | 0x400);
 +		tmp = emu_rdptr(sc, 0, EMU_A_SPDIF_SAMPLERATE) & 0xfffff1ff;
 +		emu_wrptr(sc, 0, EMU_A_SPDIF_SAMPLERATE, tmp | 0x400);
  
  		/* Setup SRCSel (Enable SPDIF, I2S SRCMulti) */
  		emu_wr(sc, 0x20, 0x00600000, 4);
 @@ -1816,13 +1898,13 @@ emu_init(struct sc_info *sc)
  	for (i = 0; i < EMUMAXPAGES; i++)
  		sc->mem.ptb_pages[i] = tmp | i;
  
 -	emu_wrptr(sc, 0, PTB, (sc->mem.ptb_pages_addr));
 -	emu_wrptr(sc, 0, TCB, 0);	/* taken from original driver */
 -	emu_wrptr(sc, 0, TCBS, 0);	/* taken from original driver */
 +	emu_wrptr(sc, 0, EMU_PTB, (sc->mem.ptb_pages_addr));
 +	emu_wrptr(sc, 0, EMU_TCB, 0);	/* taken from original driver */
 +	emu_wrptr(sc, 0, EMU_TCBS, 0);	/* taken from original driver */
  
  	for (ch = 0; ch < NUM_G; ch++) {
 -		emu_wrptr(sc, ch, MAPA, tmp | MAP_PTI_MASK);
 -		emu_wrptr(sc, ch, MAPB, tmp | MAP_PTI_MASK);
 +		emu_wrptr(sc, ch, EMU_CHAN_MAPA, tmp | EMU_CHAN_MAP_PTI_MASK);
 +		emu_wrptr(sc, ch, EMU_CHAN_MAPB, tmp | EMU_CHAN_MAP_PTI_MASK);
  	}
  
  	/* emu_memalloc(sc, EMUPAGESIZE); */
 @@ -1850,19 +1932,19 @@ emu_init(struct sc_info *sc)
  	 */
  
  	if (sc->audigy) {
 -		tmp = HCFG_AUTOMUTE | HCFG_JOYENABLE;
 +		tmp = EMU_HCFG_AUTOMUTE | EMU_HCFG_JOYENABLE;
  		if (sc->audigy2)	/* Audigy 2 */
 -			tmp = HCFG_AUDIOENABLE | HCFG_AC3ENABLE_CDSPDIF |
 -			    HCFG_AC3ENABLE_GPSPDIF;
 -		emu_wr(sc, HCFG, tmp, 4);
 +			tmp = EMU_HCFG_AUDIOENABLE | EMU_HCFG_AC3ENABLE_CDSPDIF |
 +			    EMU_HCFG_AC3ENABLE_GPSPDIF;
 +		emu_wr(sc, EMU_HCFG, tmp, 4);
  
  		audigy_initefx(sc);
  
  		/* from ALSA initialization code: */
  
  		/* enable audio and disable both audio/digital outputs */
 -		emu_wr(sc, HCFG, emu_rd(sc, HCFG, 4) | HCFG_AUDIOENABLE, 4);
 -		emu_wr(sc, A_IOCFG, emu_rd(sc, A_IOCFG, 4) & ~A_IOCFG_GPOUT_AD,
 +		emu_wr(sc, EMU_HCFG, emu_rd(sc, EMU_HCFG, 4) | EMU_HCFG_AUDIOENABLE, 4);
 +		emu_wr(sc, EMU_A_IOCFG, emu_rd(sc, EMU_A_IOCFG, 4) & ~EMU_A_IOCFG_GPOUT_AD,
  		    4);
  		if (sc->audigy2) {	/* Audigy 2 */
  			/* Unmute Analog.
 @@ -1870,27 +1952,27 @@ emu_init(struct sc_info *sc)
  			 * init Alice3 I2SOut beyond 48kHz.
  			 * So, sequence is important.
  			 */
 -			emu_wr(sc, A_IOCFG,
 -			    emu_rd(sc, A_IOCFG, 4) | A_IOCFG_GPOUT_A, 4);
 +			emu_wr(sc, EMU_A_IOCFG,
 +			    emu_rd(sc, EMU_A_IOCFG, 4) | EMU_A_IOCFG_GPOUT_A, 4);
  		}
  	} else {
  		/* EMU10K1 initialization code */
 -		tmp = HCFG_AUDIOENABLE | HCFG_LOCKTANKCACHE_MASK 
 -		    | HCFG_AUTOMUTE;
 +		tmp = EMU_HCFG_AUDIOENABLE | EMU_HCFG_LOCKTANKCACHE_MASK 
 +		    | EMU_HCFG_AUTOMUTE;
  		if (sc->rev >= 6)
 -			tmp |= HCFG_JOYENABLE;
 +			tmp |= EMU_HCFG_JOYENABLE;
  
 -		emu_wr(sc, HCFG, tmp, 4);
 +		emu_wr(sc, EMU_HCFG, tmp, 4);
  
  		/* TOSLink detection */
  		sc->tos_link = 0;
 -		tmp = emu_rd(sc, HCFG, 4);
 -		if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
 -			emu_wr(sc, HCFG, tmp | HCFG_GPOUT1, 4);
 +		tmp = emu_rd(sc, EMU_HCFG, 4);
 +		if (tmp & (EMU_HCFG_GPINPUT0 | EMU_HCFG_GPINPUT1)) {
 +			emu_wr(sc, EMU_HCFG, tmp | EMU_HCFG_GPOUT1, 4);
  			DELAY(50);
 -			if (tmp != (emu_rd(sc, HCFG, 4) & ~HCFG_GPOUT1)) {
 +			if (tmp != (emu_rd(sc, EMU_HCFG, 4) & ~EMU_HCFG_GPOUT1)) {
  				sc->tos_link = 1;
 -				emu_wr(sc, HCFG, tmp, 4);
 +				emu_wr(sc, EMU_HCFG, tmp, 4);
  			}
  		}
  	}
 @@ -1903,42 +1985,42 @@ emu_uninit(struct sc_info *sc)
  {
  	u_int32_t ch;
  
 -	emu_wr(sc, INTE, 0, 4);
 +	emu_wr(sc, EMU_INTE, 0, 4);
  	for (ch = 0; ch < NUM_G; ch++)
 -		emu_wrptr(sc, ch, DCYSUSV, ENV_OFF);
 +		emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, ENV_OFF);
  	for (ch = 0; ch < NUM_G; ch++) {
 -		emu_wrptr(sc, ch, VTFT, 0);
 -		emu_wrptr(sc, ch, CVCF, 0);
 -		emu_wrptr(sc, ch, PTRX, 0);
 -		emu_wrptr(sc, ch, CPF, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_CPF, 0);
  	}
  
  	if (sc->audigy) {	/* stop fx processor */
 -		emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP);
 +		emu_wrptr(sc, 0, EMU_A_DBG, EMU_A_DBG_SINGLE_STEP);
  	}
  
  	/* disable audio and lock cache */
 -	emu_wr(sc, HCFG,
 -	    HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
 +	emu_wr(sc, EMU_HCFG,
 +	    EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE,
  	    4);
  
 -	emu_wrptr(sc, 0, PTB, 0);
 +	emu_wrptr(sc, 0, EMU_PTB, 0);
  	/* reset recording buffers */
 -	emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, MICBA, 0);
 -	emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, FXBA, 0);
 -	emu_wrptr(sc, 0, FXWC, 0);
 -	emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, ADCBA, 0);
 -	emu_wrptr(sc, 0, TCB, 0);
 -	emu_wrptr(sc, 0, TCBS, 0);
 +	emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_MICBA, 0);
 +	emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_FXBA, 0);
 +	emu_wrptr(sc, 0, EMU_FXWC, 0);
 +	emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_ADCBA, 0);
 +	emu_wrptr(sc, 0, EMU_TCB, 0);
 +	emu_wrptr(sc, 0, EMU_TCBS, 0);
  
  	/* disable channel interrupt */
 -	emu_wrptr(sc, 0, CLIEL, 0);
 -	emu_wrptr(sc, 0, CLIEH, 0);
 -	emu_wrptr(sc, 0, SOLEL, 0);
 -	emu_wrptr(sc, 0, SOLEH, 0);
 +	emu_wrptr(sc, 0, EMU_CLIEL, 0);
 +	emu_wrptr(sc, 0, EMU_CLIEH, 0);
 +	emu_wrptr(sc, 0, EMU_SOLEL, 0);
 +	emu_wrptr(sc, 0, EMU_SOLEH, 0);
  
  	/* init envelope engine */
  	if (!SLIST_EMPTY(&sc->mem.blocks))
 @@ -1997,7 +2079,7 @@ emu_pci_attach(device_t dev)
  	sc->audigy = sc->type == EMU10K2_PCI_ID || sc->type == EMU10K3_PCI_ID;
  	sc->audigy2 = (sc->audigy && sc->rev == 0x04);
  	sc->nchans = sc->audigy ? 8 : 4;
 -	sc->addrmask = sc->audigy ? A_PTR_ADDRESS_MASK : PTR_ADDRESS_MASK;
 +	sc->addrmask = sc->audigy ? EMU_A_PTR_ADDR_MASK : EMU_PTR_ADDR_MASK;
  
  	data = pci_read_config(dev, PCIR_COMMAND, 2);
  	data |= (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN);
 
 Copied: stable/9/sys/dev/sound/pci/emuxkireg.h (from r229430, head/sys/dev/sound/pci/emuxkireg.h)
 ==============================================================================
 --- /dev/null	00:00:00 1970	(empty, because file is newly added)
 +++ stable/9/sys/dev/sound/pci/emuxkireg.h	Fri Feb  3 22:06:27 2012	(r230962, copy of r229430, head/sys/dev/sound/pci/emuxkireg.h)
 @@ -0,0 +1,689 @@
 +/* $FreeBSD$ */
 +/*	$NetBSD: emuxkireg.h,v 1.8 2008/04/28 20:23:54 martin Exp $	*/
 +
 +/*-
 + * Copyright (c) 2001 The NetBSD Foundation, Inc.
 + * All rights reserved.
 + *
 + * This code is derived from software contributed to The NetBSD Foundation
 + * by Yannick Montulet.
 + *
 + * Redistribution and use in source and binary forms, with or without
 + * modification, are permitted provided that the following conditions
 + * are met:
 + * 1. Redistributions of source code must retain the above copyright
 + *    notice, this list of conditions and the following disclaimer.
 + * 2. Redistributions in binary form must reproduce the above copyright
 + *    notice, this list of conditions and the following disclaimer in the
 + *    documentation and/or other materials provided with the distribution.
 + *
 + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 + * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 + * POSSIBILITY OF SUCH DAMAGE.
 + */
 +
 +#ifndef _DEV_PCI_EMUXKIREG_H_
 +#define _DEV_PCI_EMUXKIREG_H_
 +
 +/*
 + * Register values for Creative EMU10000. The register values have been
 + * taken from GPLed SBLive! header file published by Creative. The comments
 + * have been stripped to avoid GPL pollution in kernel. The Creative version
 + * including comments is available in Linux 2.4.* kernel as file
 + *	drivers/sound/emu10k1/8010.h
 + */
 
 *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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From: dfilter@FreeBSD.ORG (dfilter service)
To: bug-followup@FreeBSD.org
Cc:  
Subject: Re: kern/153901: commit references a PR
Date: Fri,  3 Feb 2012 22:13:59 +0000 (UTC)

 Author: pfg
 Date: Fri Feb  3 22:13:36 2012
 New Revision: 230963
 URL: http://svn.freebsd.org/changeset/base/230963
 
 Log:
   MFC:	 r229430, r229980
   
   Replace a GPL'd header in the emu10k1 snd driver code.
   
   This brings in the emuxkireg.h from NetBSD (dev/pci) which
   is used for the same purpose but is smaller. The emu10k1
   is now free from the GPL.
   
   While here also merge some cleanups to the module Makefile.
   
   PR:		153901
   Obtained from:	NetBSD
   Approved by:	core (mentor implicit)
 
 Added:
   stable/8/sys/dev/sound/pci/emuxkireg.h
      - copied unchanged from r229430, head/sys/dev/sound/pci/emuxkireg.h
 Modified:
   stable/8/sys/conf/files
   stable/8/sys/dev/sound/pci/emu10k1.c
   stable/8/sys/modules/sound/driver/emu10k1/Makefile
 Directory Properties:
   stable/8/sys/   (props changed)
   stable/8/sys/modules/sound/driver/emu10k1/   (props changed)
 
 Modified: stable/8/sys/conf/files
 ==============================================================================
 --- stable/8/sys/conf/files	Fri Feb  3 22:06:27 2012	(r230962)
 +++ stable/8/sys/conf/files	Fri Feb  3 22:13:36 2012	(r230963)
 @@ -50,7 +50,7 @@ aic79xx_reg_print.c	optional ahd pci				
  aic79xx_reg_print.o		optional ahd pci ahd_reg_pretty_print	   \
  	compile-with	"${NORMAL_C}"					   \
  	no-implicit-rule local
 -emu10k1-alsa%diked.h		optional snd_emu10k1 | snd_emu10kx	   \
 +emu10k1-alsa%diked.h		optional snd_emu10kx	   \
  	dependency	"$S/tools/sound/emu10k1-mkalsa.sh $S/gnu/dev/sound/pci/emu10k1-alsa.h" \
  	compile-with	"CC='${CC}' AWK=${AWK} sh $S/tools/sound/emu10k1-mkalsa.sh $S/gnu/dev/sound/pci/emu10k1-alsa.h emu10k1-alsa%diked.h" \
  	no-obj no-implicit-rule before-depend				   \
 @@ -1601,9 +1601,7 @@ dev/sound/pci/csa.c		optional snd_csa pc
  	warning "kernel contains GPL contaminated csaimg.h header"
  dev/sound/pci/csapcm.c		optional snd_csa pci
  dev/sound/pci/ds1.c		optional snd_ds1 pci
 -dev/sound/pci/emu10k1.c		optional snd_emu10k1 pci \
 -	dependency "emu10k1-alsa%diked.h" \
 -	warning "kernel contains GPL contaminated emu10k1 headers"
 +dev/sound/pci/emu10k1.c		optional snd_emu10k1 pci
  dev/sound/pci/emu10kx.c		optional snd_emu10kx pci \
  	dependency "emu10k1-alsa%diked.h" \
  	dependency "p16v-alsa%diked.h" \
 
 Modified: stable/8/sys/dev/sound/pci/emu10k1.c
 ==============================================================================
 --- stable/8/sys/dev/sound/pci/emu10k1.c	Fri Feb  3 22:06:27 2012	(r230962)
 +++ stable/8/sys/dev/sound/pci/emu10k1.c	Fri Feb  3 22:13:36 2012	(r230963)
 @@ -32,7 +32,7 @@
  
  #include <dev/sound/pcm/sound.h>
  #include <dev/sound/pcm/ac97.h>
 -#include "emu10k1-alsa%diked.h"
 +#include <dev/sound/pci/emuxkireg.h>
  
  #include <dev/pci/pcireg.h>
  #include <dev/pci/pcivar.h>
 @@ -66,12 +66,94 @@ SND_DECLARE_FILE("$FreeBSD$");
  
  #define	ENABLE		0xffffffff
  #define	DISABLE		0x00000000
 -#define	ENV_ON		DCYSUSV_CHANNELENABLE_MASK
 +#define	ENV_ON		EMU_CHAN_DCYSUSV_CHANNELENABLE_MASK
  #define	ENV_OFF		0x00	/* XXX: should this be 1? */
  
 -#define	A_IOCFG_GPOUT_A	0x40	/* Analog Output */
 -#define	A_IOCFG_GPOUT_D	0x04	/* Digital Output */
 -#define	A_IOCFG_GPOUT_AD (A_IOCFG_GPOUT_A|A_IOCFG_GPOUT_D)  /* A_IOCFG_GPOUT0 */
 +#define	EMU_A_IOCFG_GPOUT_A	0x40
 +#define	EMU_A_IOCFG_GPOUT_D	0x04
 +#define	EMU_A_IOCFG_GPOUT_AD (EMU_A_IOCFG_GPOUT_A|EMU_A_IOCFG_GPOUT_D)  /* EMU_A_IOCFG_GPOUT0 */
 +
 +#define	EMU_HCFG_GPOUT1		0x00000800
 +
 +/* instruction set */
 +#define iACC3	 0x06
 +#define iMACINT0 0x04
 +#define iINTERP  0x0e
 +
 +#define C_00000000	0x40
 +#define C_00000001	0x41
 +#define C_00000004	0x44
 +#define C_40000000	0x4d
 +/* Audigy constants */
 +#define A_C_00000000	0xc0
 +#define A_C_40000000	0xcd
 +
 +/* GPRs */
 +#define FXBUS(x)	(0x00 + (x))
 +#define EXTIN(x)	(0x10 + (x))
 +#define EXTOUT(x)	(0x20 + (x))
 +
 +#define GPR(x)		(EMU_FXGPREGBASE + (x))
 +#define A_EXTIN(x)	(0x40 + (x))
 +#define A_FXBUS(x)	(0x00 + (x))
 +#define A_EXTOUT(x)	(0x60 + (x))
 +#define A_GPR(x)	(EMU_A_FXGPREGBASE + (x))
 +
 +/* FX buses */
 +#define FXBUS_PCM_LEFT		0x00
 +#define FXBUS_PCM_RIGHT		0x01
 +#define FXBUS_MIDI_LEFT		0x04
 +#define FXBUS_MIDI_RIGHT	0x05
 +#define FXBUS_MIDI_REVERB	0x0c
 +#define FXBUS_MIDI_CHORUS	0x0d
 +
 +/* Inputs */
 +#define EXTIN_AC97_L		0x00
 +#define EXTIN_AC97_R		0x01
 +#define EXTIN_SPDIF_CD_L	0x02
 +#define EXTIN_SPDIF_CD_R	0x03
 +#define EXTIN_TOSLINK_L		0x06
 +#define EXTIN_TOSLINK_R		0x07
 +#define EXTIN_COAX_SPDIF_L	0x0a
 +#define EXTIN_COAX_SPDIF_R	0x0b
 +/* Audigy Inputs */
 +#define A_EXTIN_AC97_L		0x00
 +#define A_EXTIN_AC97_R		0x01
 +
 +/* Outputs */
 +#define EXTOUT_AC97_L	   0x00
 +#define EXTOUT_AC97_R	   0x01
 +#define EXTOUT_TOSLINK_L   0x02
 +#define EXTOUT_TOSLINK_R   0x03
 +#define EXTOUT_AC97_CENTER 0x04
 +#define EXTOUT_AC97_LFE	   0x05
 +#define EXTOUT_HEADPHONE_L 0x06
 +#define EXTOUT_HEADPHONE_R 0x07
 +#define EXTOUT_REAR_L	   0x08
 +#define EXTOUT_REAR_R	   0x09
 +#define EXTOUT_ADC_CAP_L   0x0a
 +#define EXTOUT_ADC_CAP_R   0x0b
 +#define EXTOUT_ACENTER	   0x11
 +#define EXTOUT_ALFE	   0x12
 +/* Audigy Outputs */
 +#define A_EXTOUT_FRONT_L	0x00
 +#define A_EXTOUT_FRONT_R	0x01
 +#define A_EXTOUT_CENTER		0x02
 +#define A_EXTOUT_LFE		0x03
 +#define A_EXTOUT_HEADPHONE_L	0x04
 +#define A_EXTOUT_HEADPHONE_R	0x05
 +#define A_EXTOUT_REAR_L		0x06
 +#define A_EXTOUT_REAR_R		0x07
 +#define A_EXTOUT_AFRONT_L	0x08
 +#define A_EXTOUT_AFRONT_R	0x09
 +#define A_EXTOUT_ACENTER	0x0a
 +#define A_EXTOUT_ALFE		0x0b
 +#define A_EXTOUT_AREAR_L	0x0e
 +#define A_EXTOUT_AREAR_R	0x0f
 +#define A_EXTOUT_AC97_L		0x10
 +#define A_EXTOUT_AC97_R		0x11
 +#define A_EXTOUT_ADC_CAP_L	0x16
 +#define A_EXTOUT_ADC_CAP_R	0x17
  
  struct emu_memblk {
  	SLIST_ENTRY(emu_memblk) link;
 @@ -247,9 +329,9 @@ emu_rdptr(struct sc_info *sc, int chn, i
  {
  	u_int32_t ptr, val, mask, size, offset;
  
 -	ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK);
 -	emu_wr(sc, PTR, ptr, 4);
 -	val = emu_rd(sc, DATA, 4);
 +	ptr = ((reg << 16) & sc->addrmask) | (chn & EMU_PTR_CHNO_MASK);
 +	emu_wr(sc, EMU_PTR, ptr, 4);
 +	val = emu_rd(sc, EMU_DATA, 4);
  	if (reg & 0xff000000) {
  		size = (reg >> 24) & 0x3f;
  		offset = (reg >> 16) & 0x1f;
 @@ -265,23 +347,23 @@ emu_wrptr(struct sc_info *sc, int chn, i
  {
  	u_int32_t ptr, mask, size, offset;
  
 -	ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK);
 -	emu_wr(sc, PTR, ptr, 4);
 +	ptr = ((reg << 16) & sc->addrmask) | (chn & EMU_PTR_CHNO_MASK);
 +	emu_wr(sc, EMU_PTR, ptr, 4);
  	if (reg & 0xff000000) {
  		size = (reg >> 24) & 0x3f;
  		offset = (reg >> 16) & 0x1f;
  		mask = ((1 << size) - 1) << offset;
  		data <<= offset;
  		data &= mask;
 -		data |= emu_rd(sc, DATA, 4) & ~mask;
 +		data |= emu_rd(sc, EMU_DATA, 4) & ~mask;
  	}
 -	emu_wr(sc, DATA, data, 4);
 +	emu_wr(sc, EMU_DATA, data, 4);
  }
  
  static void
  emu_wrefx(struct sc_info *sc, unsigned int pc, unsigned int data)
  {
 -	pc += sc->audigy ? A_MICROCODEBASE : MICROCODEBASE;
 +	pc += sc->audigy ? EMU_A_MICROCODEBASE : EMU_MICROCODEBASE;
  	emu_wrptr(sc, 0, pc, data);
  }
  
 @@ -294,8 +376,8 @@ emu_rdcd(kobj_t obj, void *devinfo, int 
  {
  	struct sc_info *sc = (struct sc_info *)devinfo;
  
 -	emu_wr(sc, AC97ADDRESS, regno, 1);
 -	return emu_rd(sc, AC97DATA, 2);
 +	emu_wr(sc, EMU_AC97ADDR, regno, 1);
 +	return emu_rd(sc, EMU_AC97DATA, 2);
  }
  
  static int
 @@ -303,8 +385,8 @@ emu_wrcd(kobj_t obj, void *devinfo, int 
  {
  	struct sc_info *sc = (struct sc_info *)devinfo;
  
 -	emu_wr(sc, AC97ADDRESS, regno, 1);
 -	emu_wr(sc, AC97DATA, data, 2);
 +	emu_wr(sc, EMU_AC97ADDR, regno, 1);
 +	emu_wr(sc, EMU_AC97DATA, data, 2);
  	return 0;
  }
  
 @@ -346,7 +428,7 @@ emu_settimer(struct sc_info *sc)
  	}
  	RANGE(rate, 48, 9600);
  	sc->timerinterval = 48000 / rate;
 -	emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2);
 +	emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2);
  
  	return sc->timerinterval;
  }
 @@ -357,15 +439,15 @@ emu_enatimer(struct sc_info *sc, int go)
  	u_int32_t x;
  	if (go) {
  		if (sc->timer++ == 0) {
 -			x = emu_rd(sc, INTE, 4);
 -			x |= INTE_INTERVALTIMERENB;
 -			emu_wr(sc, INTE, x, 4);
 +			x = emu_rd(sc, EMU_INTE, 4);
 +			x |= EMU_INTE_INTERTIMERENB;
 +			emu_wr(sc, EMU_INTE, x, 4);
  		}
  	} else {
  		sc->timer = 0;
 -		x = emu_rd(sc, INTE, 4);
 -		x &= ~INTE_INTERVALTIMERENB;
 -		emu_wr(sc, INTE, x, 4);
 +		x = emu_rd(sc, EMU_INTE, 4);
 +		x &= ~EMU_INTE_INTERTIMERENB;
 +		emu_wr(sc, EMU_INTE, x, 4);
  	}
  	return 0;
  }
 @@ -373,7 +455,7 @@ emu_enatimer(struct sc_info *sc, int go)
  static void
  emu_enastop(struct sc_info *sc, char channel, int enable)
  {
 -	int reg = (channel & 0x20) ? SOLEH : SOLEL;
 +	int reg = (channel & 0x20) ? EMU_SOLEH : EMU_SOLEL;
  	channel &= 0x1f;
  	reg |= 1 << 24;
  	reg |= channel << 16;
 @@ -568,49 +650,49 @@ emu_vwrite(struct sc_info *sc, struct em
  		r = v->ismaster ? 0 : r;
  	}
  
 -	emu_wrptr(sc, v->vnum, CPF, v->stereo ? CPF_STEREO_MASK : 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, v->stereo ? EMU_CHAN_CPF_STEREO_MASK : 0);
  	val = v->stereo ? 28 : 30;
  	val *= v->b16 ? 1 : 2;
  	start = sa + val;
  
  	if (sc->audigy) {
 -		emu_wrptr(sc, v->vnum, A_FXRT1, v->fxrt1);
 -		emu_wrptr(sc, v->vnum, A_FXRT2, v->fxrt2);
 -		emu_wrptr(sc, v->vnum, A_SENDAMOUNTS, 0);
 +		emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT1, v->fxrt1);
 +		emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT2, v->fxrt2);
 +		emu_wrptr(sc, v->vnum, EMU_A_CHAN_SENDAMOUNTS, 0);
  	}
  	else
 -		emu_wrptr(sc, v->vnum, FXRT, v->fxrt1 << 16);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_FXRT, v->fxrt1 << 16);
  
 -	emu_wrptr(sc, v->vnum, PTRX, (x << 8) | r);
 -	emu_wrptr(sc, v->vnum, DSL, ea | (y << 24));
 -	emu_wrptr(sc, v->vnum, PSST, sa | (l << 24));
 -	emu_wrptr(sc, v->vnum, CCCA, start | (v->b16 ? 0 : CCCA_8BITSELECT));
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX, (x << 8) | r);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_DSL, ea | (y << 24));
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_PSST, sa | (l << 24));
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_CCCA, start | (v->b16 ? 0 : EMU_CHAN_CCCA_8BITSELECT));
  
 -	emu_wrptr(sc, v->vnum, Z1, 0);
 -	emu_wrptr(sc, v->vnum, Z2, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_Z1, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_Z2, 0);
  
  	silent_page = ((u_int32_t)(sc->mem.silent_page_addr) << 1)
 -	    | MAP_PTI_MASK;
 -	emu_wrptr(sc, v->vnum, MAPA, silent_page);
 -	emu_wrptr(sc, v->vnum, MAPB, silent_page);
 -
 -	emu_wrptr(sc, v->vnum, CVCF, CVCF_CURRENTFILTER_MASK);
 -	emu_wrptr(sc, v->vnum, VTFT, VTFT_FILTERTARGET_MASK);
 -	emu_wrptr(sc, v->vnum, ATKHLDM, 0);
 -	emu_wrptr(sc, v->vnum, DCYSUSM, DCYSUSM_DECAYTIME_MASK);
 -	emu_wrptr(sc, v->vnum, LFOVAL1, 0x8000);
 -	emu_wrptr(sc, v->vnum, LFOVAL2, 0x8000);
 -	emu_wrptr(sc, v->vnum, FMMOD, 0);
 -	emu_wrptr(sc, v->vnum, TREMFRQ, 0);
 -	emu_wrptr(sc, v->vnum, FM2FRQ2, 0);
 -	emu_wrptr(sc, v->vnum, ENVVAL, 0x8000);
 -
 -	emu_wrptr(sc, v->vnum, ATKHLDV,
 -	    ATKHLDV_HOLDTIME_MASK | ATKHLDV_ATTACKTIME_MASK);
 -	emu_wrptr(sc, v->vnum, ENVVOL, 0x8000);
 +	    | EMU_CHAN_MAP_PTI_MASK;
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_MAPA, silent_page);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_MAPB, silent_page);
 +
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, EMU_CHAN_CVCF_CURRFILTER_MASK);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, EMU_CHAN_VTFT_FILTERTARGET_MASK);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDM, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSM, EMU_CHAN_DCYSUSM_DECAYTIME_MASK);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL1, 0x8000);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL2, 0x8000);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_FMMOD, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_TREMFRQ, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_FM2FRQ2, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVAL, 0x8000);
 +
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDV,
 +	    EMU_CHAN_ATKHLDV_HOLDTIME_MASK | EMU_CHAN_ATKHLDV_ATTACKTIME_MASK);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVOL, 0x8000);
  
 -	emu_wrptr(sc, v->vnum, PEFE_FILTERAMOUNT, 0x7f);
 -	emu_wrptr(sc, v->vnum, PEFE_PITCHAMOUNT, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_FILTERAMOUNT, 0x7f);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_PITCHAMOUNT, 0);
  
  	if (v->slave != NULL)
  		emu_vwrite(sc, v->slave);
 @@ -631,29 +713,29 @@ emu_vtrigger(struct sc_info *sc, struct 
  		sample = v->b16 ? 0x00000000 : 0x80808080;
  
  		for (i = 0; i < cs; i++)
 -			emu_wrptr(sc, v->vnum, CD0 + i, sample);
 -		emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, 0);
 -		emu_wrptr(sc, v->vnum, CCR_READADDRESS, cra);
 -		emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, ccis);
 -
 -		emu_wrptr(sc, v->vnum, IFATN, 0xff00);
 -		emu_wrptr(sc, v->vnum, VTFT, 0xffffffff);
 -		emu_wrptr(sc, v->vnum, CVCF, 0xffffffff);
 -		emu_wrptr(sc, v->vnum, DCYSUSV, 0x00007f7f);
 +			emu_wrptr(sc, v->vnum, EMU_CHAN_CD0 + i, sample);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_READADDRESS, cra);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, ccis);
 +
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xff00);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0xffffffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0xffffffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSV, 0x00007f7f);
  		emu_enastop(sc, v->vnum, 0);
  
  		pitch_target = emu_rate_to_linearpitch(v->speed);
  		initial_pitch = emu_rate_to_pitch(v->speed) >> 8;
 -		emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, pitch_target);
 -		emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, pitch_target);
 -		emu_wrptr(sc, v->vnum, IP, initial_pitch);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, pitch_target);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, pitch_target);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_IP, initial_pitch);
  	} else {
 -		emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, 0);
 -		emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, 0);
 -		emu_wrptr(sc, v->vnum, IFATN, 0xffff);
 -		emu_wrptr(sc, v->vnum, VTFT, 0x0000ffff);
 -		emu_wrptr(sc, v->vnum, CVCF, 0x0000ffff);
 -		emu_wrptr(sc, v->vnum, IP, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0x0000ffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0x0000ffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_IP, 0);
  		emu_enastop(sc, v->vnum, 1);
  	}
  	if (v->slave != NULL)
 @@ -666,7 +748,7 @@ emu_vpos(struct sc_info *sc, struct emu_
  	int s, ptr;
  
  	s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0);
 -	ptr = (emu_rdptr(sc, v->vnum, CCCA_CURRADDR) - (v->start >> s)) << s;
 +	ptr = (emu_rdptr(sc, v->vnum, EMU_CHAN_CCCA_CURRADDR) - (v->start >> s)) << s;
  	return ptr & ~0x0000001f;
  }
  
 @@ -875,27 +957,27 @@ emurchan_init(kobj_t obj, void *devinfo,
  	ch->num = sc->rnum;
  	switch(sc->rnum) {
  	case 0:
 -		ch->idxreg = sc->audigy ? A_ADCIDX : ADCIDX;
 -		ch->basereg = ADCBA;
 -		ch->sizereg = ADCBS;
 -		ch->setupreg = ADCCR;
 -		ch->irqmask = INTE_ADCBUFENABLE;
 +		ch->idxreg = sc->audigy ? EMU_A_ADCIDX : EMU_ADCIDX;
 +		ch->basereg = EMU_ADCBA;
 +		ch->sizereg = EMU_ADCBS;
 +		ch->setupreg = EMU_ADCCR;
 +		ch->irqmask = EMU_INTE_ADCBUFENABLE;
  		break;
  
  	case 1:
 -		ch->idxreg = FXIDX;
 -		ch->basereg = FXBA;
 -		ch->sizereg = FXBS;
 -		ch->setupreg = FXWC;
 -		ch->irqmask = INTE_EFXBUFENABLE;
 +		ch->idxreg = EMU_FXIDX;
 +		ch->basereg = EMU_FXBA;
 +		ch->sizereg = EMU_FXBS;
 +		ch->setupreg = EMU_FXWC;
 +		ch->irqmask = EMU_INTE_EFXBUFENABLE;
  		break;
  
  	case 2:
 -		ch->idxreg = MICIDX;
 -		ch->basereg = MICBA;
 -		ch->sizereg = MICBS;
 +		ch->idxreg = EMU_MICIDX;
 +		ch->basereg = EMU_MICBA;
 +		ch->sizereg = EMU_MICBS;
  		ch->setupreg = 0;
 -		ch->irqmask = INTE_MICBUFENABLE;
 +		ch->irqmask = EMU_INTE_MICBUFENABLE;
  		break;
  	}
  	sc->rnum++;
 @@ -967,27 +1049,27 @@ emurchan_trigger(kobj_t obj, void *data,
  
  	switch(sc->bufsz) {
  	case 4096:
 -		sz = ADCBS_BUFSIZE_4096;
 +		sz = EMU_RECBS_BUFSIZE_4096;
  		break;
  
  	case 8192:
 -		sz = ADCBS_BUFSIZE_8192;
 +		sz = EMU_RECBS_BUFSIZE_8192;
  		break;
  
  	case 16384:
 -		sz = ADCBS_BUFSIZE_16384;
 +		sz = EMU_RECBS_BUFSIZE_16384;
  		break;
  
  	case 32768:
 -		sz = ADCBS_BUFSIZE_32768;
 +		sz = EMU_RECBS_BUFSIZE_32768;
  		break;
  
  	case 65536:
 -		sz = ADCBS_BUFSIZE_65536;
 +		sz = EMU_RECBS_BUFSIZE_65536;
  		break;
  
  	default:
 -		sz = ADCBS_BUFSIZE_4096;
 +		sz = EMU_RECBS_BUFSIZE_4096;
  	}
  
  	snd_mtxlock(sc->lock);
 @@ -997,23 +1079,23 @@ emurchan_trigger(kobj_t obj, void *data,
  		emu_wrptr(sc, 0, ch->sizereg, sz);
  		if (ch->num == 0) {
  			if (sc->audigy) {
 -				val = A_ADCCR_LCHANENABLE;
 +				val = EMU_A_ADCCR_LCHANENABLE;
  				if (AFMT_CHANNEL(ch->fmt) > 1)
 -					val |= A_ADCCR_RCHANENABLE;
 +					val |= EMU_A_ADCCR_RCHANENABLE;
  				val |= audigy_recval(ch->spd);
  			} else {
 -				val = ADCCR_LCHANENABLE;
 +				val = EMU_ADCCR_LCHANENABLE;
  				if (AFMT_CHANNEL(ch->fmt) > 1)
 -					val |= ADCCR_RCHANENABLE;
 +					val |= EMU_ADCCR_RCHANENABLE;
  				val |= emu_recval(ch->spd);
  			}
  
  			emu_wrptr(sc, 0, ch->setupreg, 0);
  			emu_wrptr(sc, 0, ch->setupreg, val);
  		}
 -		val = emu_rd(sc, INTE, 4);
 +		val = emu_rd(sc, EMU_INTE, 4);
  		val |= ch->irqmask;
 -		emu_wr(sc, INTE, val, 4);
 +		emu_wr(sc, EMU_INTE, val, 4);
  		break;
  
  	case PCMTRIG_STOP:
 @@ -1022,9 +1104,9 @@ emurchan_trigger(kobj_t obj, void *data,
  		emu_wrptr(sc, 0, ch->sizereg, 0);
  		if (ch->setupreg)
  			emu_wrptr(sc, 0, ch->setupreg, 0);
 -		val = emu_rd(sc, INTE, 4);
 +		val = emu_rd(sc, EMU_INTE, 4);
  		val &= ~ch->irqmask;
 -		emu_wr(sc, INTE, val, 4);
 +		emu_wr(sc, EMU_INTE, val, 4);
  		break;
  
  	case PCMTRIG_EMLDMAWR:
 @@ -1122,9 +1204,9 @@ emu_midiattach(struct sc_info *sc)
  {
  	int i;
  
 -	i = emu_rd(sc, INTE, 4);
 -	i |= INTE_MIDIRXENABLE;
 -	emu_wr(sc, INTE, i, 4);
 +	i = emu_rd(sc, EMU_INTE, 4);
 +	i |= EMU_INTE_MIDIRXENABLE;
 +	emu_wr(sc, EMU_INTE, i, 4);
  
  	sc->mpu = mpu401_init(&emu_mpu_class, sc, emu_intr2, &sc->mpu_intr);
  }
 @@ -1139,52 +1221,52 @@ emu_intr(void *data)
  
  	snd_mtxlock(sc->lock);
  	while (1) {
 -		stat = emu_rd(sc, IPR, 4);
 +		stat = emu_rd(sc, EMU_IPR, 4);
  		if (stat == 0)
  			break;
  		ack = 0;
  
  		/* process irq */
 -		if (stat & IPR_INTERVALTIMER)
 -			ack |= IPR_INTERVALTIMER;
 +		if (stat & EMU_IPR_INTERVALTIMER)
 +			ack |= EMU_IPR_INTERVALTIMER;
  
 -		if (stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL))
 -			ack |= stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL);
 +		if (stat & (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL))
 +			ack |= stat & (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL);
  
 -		if (stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL))
 -			ack |= stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL);
 +		if (stat & (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL))
 +			ack |= stat & (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL);
  
 -		if (stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL))
 -			ack |= stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL);
 +		if (stat & (EMU_IPR_MICBUFFULL | EMU_IPR_MICBUFHALFFULL))
 +			ack |= stat & (EMU_IPR_MICBUFFULL | EMU_IPR_MICBUFHALFFULL);
  
 -		if (stat & IPR_PCIERROR) {
 -			ack |= IPR_PCIERROR;
 +		if (stat & EMU_PCIERROR) {
 +			ack |= EMU_PCIERROR;
  			device_printf(sc->dev, "pci error\n");
  			/* we still get an nmi with ecc ram even if we ack this */
  		}
 -		if (stat & IPR_SAMPLERATETRACKER) {
 -			ack |= IPR_SAMPLERATETRACKER;
 +		if (stat & EMU_IPR_RATETRCHANGE) {
 +			ack |= EMU_IPR_RATETRCHANGE;
  #ifdef EMUDEBUG
  			device_printf(sc->dev,
  			    "sample rate tracker lock status change\n");
  #endif
  		}
  
 -	    if (stat & IPR_MIDIRECVBUFEMPTY)
 +	    if (stat & EMU_IPR_MIDIRECVBUFE)
  		if (sc->mpu_intr) {
  		    (sc->mpu_intr)(sc->mpu);
 -		    ack |= IPR_MIDIRECVBUFEMPTY | IPR_MIDITRANSBUFEMPTY;
 +		    ack |= EMU_IPR_MIDIRECVBUFE | EMU_IPR_MIDITRANSBUFE;
   		}
  		if (stat & ~ack)
  			device_printf(sc->dev, "dodgy irq: %x (harmless)\n",
  			    stat & ~ack);
  
 -		emu_wr(sc, IPR, stat, 4);
 +		emu_wr(sc, EMU_IPR, stat, 4);
  
  		if (ack) {
  			snd_mtxunlock(sc->lock);
  
 -			if (ack & IPR_INTERVALTIMER) {
 +			if (ack & EMU_IPR_INTERVALTIMER) {
  				x = 0;
  				for (i = 0; i < sc->nchans; i++) {
  					if (sc->pch[i].run) {
 @@ -1197,15 +1279,15 @@ emu_intr(void *data)
  			}
  
  
 -			if (ack & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) {
 +			if (ack & (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL)) {
  				if (sc->rch[0].channel)
  					chn_intr(sc->rch[0].channel);
  			}
 -			if (ack & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) {
 +			if (ack & (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL)) {
  				if (sc->rch[1].channel)
  					chn_intr(sc->rch[1].channel);
  			}
 -			if (ack & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL)) {
 +			if (ack & (EMU_IPR_MICBUFFULL | EMU_IPR_MICBUFHALFFULL)) {
  				if (sc->rch[2].channel)
  					chn_intr(sc->rch[2].channel);
  			}
 @@ -1378,12 +1460,12 @@ audigy_initefx(struct sc_info *sc)
  		audigy_addefxop(sc, 0x0f, 0x0c0, 0x0c0, 0x0cf, 0x0c0, &pc);
  
  	for (i = 0; i < 512; i++)
 -		emu_wrptr(sc, 0, A_FXGPREGBASE + i, 0x0);
 +		emu_wrptr(sc, 0, EMU_A_FXGPREGBASE + i, 0x0);
  
  	pc = 16;
  
  	/* stop fx processor */
 -	emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP);
 +	emu_wrptr(sc, 0, EMU_A_DBG, EMU_A_DBG_SINGLE_STEP);
  
  	/* Audigy 2 (EMU10K2) DSP Registers:
  	   FX Bus
 @@ -1518,7 +1600,7 @@ audigy_initefx(struct sc_info *sc)
  			A_C_00000000, A_EXTIN(A_EXTIN_AC97_R), &pc);
  
  	/* resume normal operations */
 -	emu_wrptr(sc, 0, A_DBG, 0);
 +	emu_wrptr(sc, 0, EMU_A_DBG, 0);
  }
  
  static void
 @@ -1534,7 +1616,7 @@ emu_initefx(struct sc_info *sc)
  	}
  
  	for (i = 0; i < 256; i++)
 -		emu_wrptr(sc, 0, FXGPREGBASE + i, 0);
 +		emu_wrptr(sc, 0, EMU_FXGPREGBASE + i, 0);
  
  	/* FX-8010 DSP Registers:
  	   FX Bus
 @@ -1654,7 +1736,7 @@ emu_initefx(struct sc_info *sc)
  			C_00000000, EXTIN(EXTIN_AC97_R), &pc);
  
  	/* resume normal operations */
 -	emu_wrptr(sc, 0, DBG, 0);
 +	emu_wrptr(sc, 0, EMU_DBG, 0);
  }
  
  /* Probe and attach the card */
 @@ -1665,69 +1747,69 @@ emu_init(struct sc_info *sc)
  
  	if (sc->audigy) {
  		/* enable additional AC97 slots */
 -		emu_wrptr(sc, 0, AC97SLOT, AC97SLOT_CNTR | AC97SLOT_LFE);
 +		emu_wrptr(sc, 0, EMU_AC97SLOT, EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE);
  	}
  
  	/* disable audio and lock cache */
 -	emu_wr(sc, HCFG,
 -	    HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
 +	emu_wr(sc, EMU_HCFG,
 +	    EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE,
  	    4);
  
  	/* reset recording buffers */
 -	emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, MICBA, 0);
 -	emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, FXBA, 0);
 -	emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, ADCBA, 0);
 +	emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_MICBA, 0);
 +	emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_FXBA, 0);
 +	emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_ADCBA, 0);
  
  	/* disable channel interrupt */
 -	emu_wr(sc, INTE,
 -	    INTE_INTERVALTIMERENB | INTE_SAMPLERATETRACKER | INTE_PCIERRORENABLE,
 +	emu_wr(sc, EMU_INTE,
 +	    EMU_INTE_INTERTIMERENB | EMU_INTE_SAMPLERATER | EMU_INTE_PCIERRENABLE,
  	    4);
 -	emu_wrptr(sc, 0, CLIEL, 0);
 -	emu_wrptr(sc, 0, CLIEH, 0);
 -	emu_wrptr(sc, 0, SOLEL, 0);
 -	emu_wrptr(sc, 0, SOLEH, 0);
 +	emu_wrptr(sc, 0, EMU_CLIEL, 0);
 +	emu_wrptr(sc, 0, EMU_CLIEH, 0);
 +	emu_wrptr(sc, 0, EMU_SOLEL, 0);
 +	emu_wrptr(sc, 0, EMU_SOLEH, 0);
  
  	/* wonder what these do... */
  	if (sc->audigy) {
 -		emu_wrptr(sc, 0, SPBYPASS, 0xf00);
 -		emu_wrptr(sc, 0, AC97SLOT, 0x3);
 +		emu_wrptr(sc, 0, EMU_SPBYPASS, 0xf00);
 +		emu_wrptr(sc, 0, EMU_AC97SLOT, 0x3);
  	}
  
  	/* init envelope engine */
  	for (ch = 0; ch < NUM_G; ch++) {
 -		emu_wrptr(sc, ch, DCYSUSV, ENV_OFF);
 -		emu_wrptr(sc, ch, IP, 0);
 -		emu_wrptr(sc, ch, VTFT, 0xffff);
 -		emu_wrptr(sc, ch, CVCF, 0xffff);
 -		emu_wrptr(sc, ch, PTRX, 0);
 -		emu_wrptr(sc, ch, CPF, 0);
 -		emu_wrptr(sc, ch, CCR, 0);
 -
 -		emu_wrptr(sc, ch, PSST, 0);
 -		emu_wrptr(sc, ch, DSL, 0x10);
 -		emu_wrptr(sc, ch, CCCA, 0);
 -		emu_wrptr(sc, ch, Z1, 0);
 -		emu_wrptr(sc, ch, Z2, 0);
 -		emu_wrptr(sc, ch, FXRT, 0xd01c0000);
 -
 -		emu_wrptr(sc, ch, ATKHLDM, 0);
 -		emu_wrptr(sc, ch, DCYSUSM, 0);
 -		emu_wrptr(sc, ch, IFATN, 0xffff);
 -		emu_wrptr(sc, ch, PEFE, 0);
 -		emu_wrptr(sc, ch, FMMOD, 0);
 -		emu_wrptr(sc, ch, TREMFRQ, 24);	/* 1 Hz */
 -		emu_wrptr(sc, ch, FM2FRQ2, 24);	/* 1 Hz */
 -		emu_wrptr(sc, ch, TEMPENV, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, ENV_OFF);
 +		emu_wrptr(sc, ch, EMU_CHAN_IP, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0xffff);
 +		emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0xffff);
 +		emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_CPF, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_CCR, 0);
 +
 +		emu_wrptr(sc, ch, EMU_CHAN_PSST, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_DSL, 0x10);
 +		emu_wrptr(sc, ch, EMU_CHAN_CCCA, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_Z1, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_Z2, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_FXRT, 0xd01c0000);
 +
 +		emu_wrptr(sc, ch, EMU_CHAN_ATKHLDM, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_DCYSUSM, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_IFATN, 0xffff);
 +		emu_wrptr(sc, ch, EMU_CHAN_PEFE, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_FMMOD, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_TREMFRQ, 24);	/* 1 Hz */
 +		emu_wrptr(sc, ch, EMU_CHAN_FM2FRQ2, 24);	/* 1 Hz */
 +		emu_wrptr(sc, ch, EMU_CHAN_TEMPENV, 0);
  
  		/*** these are last so OFF prevents writing ***/
 -		emu_wrptr(sc, ch, LFOVAL2, 0);
 -		emu_wrptr(sc, ch, LFOVAL1, 0);
 -		emu_wrptr(sc, ch, ATKHLDV, 0);
 -		emu_wrptr(sc, ch, ENVVOL, 0);
 -		emu_wrptr(sc, ch, ENVVAL, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_LFOVAL2, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_LFOVAL1, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_ATKHLDV, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_ENVVOL, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_ENVVAL, 0);
  
  		if (sc->audigy) {
  			/* audigy cards need this to initialize correctly */
 @@ -1736,9 +1818,9 @@ emu_init(struct sc_info *sc)
  			emu_wrptr(sc, ch, 0x4e, 0);
  			emu_wrptr(sc, ch, 0x4f, 0);
  			/* set default routing */
 -			emu_wrptr(sc, ch, A_FXRT1, 0x03020100);
 -			emu_wrptr(sc, ch, A_FXRT2, 0x3f3f3f3f);
 -			emu_wrptr(sc, ch, A_SENDAMOUNTS, 0);
 +			emu_wrptr(sc, ch, EMU_A_CHAN_FXRT1, 0x03020100);
 +			emu_wrptr(sc, ch, EMU_A_CHAN_FXRT2, 0x3f3f3f3f);
 +			emu_wrptr(sc, ch, EMU_A_CHAN_SENDAMOUNTS, 0);
  		}
  
  		sc->voice[ch].vnum = ch;
 @@ -1769,13 +1851,13 @@ emu_init(struct sc_info *sc)
  	 *  AN                = 0     (Audio data)
  	 *  P                 = 0     (Consumer)
  	 */
 -	spcs = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
 -	    SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
 -	    SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
 -	    SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
 -	emu_wrptr(sc, 0, SPCS0, spcs);
 -	emu_wrptr(sc, 0, SPCS1, spcs);
 -	emu_wrptr(sc, 0, SPCS2, spcs);
 +	spcs = EMU_SPCS_CLKACCY_1000PPM | EMU_SPCS_SAMPLERATE_48 |
 +	    EMU_SPCS_CHANNELNUM_LEFT | EMU_SPCS_SOURCENUM_UNSPEC |
 +	    EMU_SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
 +	    EMU_SPCS_EMPHASIS_NONE | EMU_SPCS_COPYRIGHT;
 +	emu_wrptr(sc, 0, EMU_SPCS0, spcs);
 +	emu_wrptr(sc, 0, EMU_SPCS1, spcs);
 +	emu_wrptr(sc, 0, EMU_SPCS2, spcs);
  
  	if (!sc->audigy)
  		emu_initefx(sc);
 @@ -1786,8 +1868,8 @@ emu_init(struct sc_info *sc)
  		u_int32_t tmp;
  
  		/* Setup SRCMulti_I2S SamplingRate */
 -		tmp = emu_rdptr(sc, 0, A_SPDIF_SAMPLERATE) & 0xfffff1ff;
 -		emu_wrptr(sc, 0, A_SPDIF_SAMPLERATE, tmp | 0x400);
 +		tmp = emu_rdptr(sc, 0, EMU_A_SPDIF_SAMPLERATE) & 0xfffff1ff;
 +		emu_wrptr(sc, 0, EMU_A_SPDIF_SAMPLERATE, tmp | 0x400);
  
  		/* Setup SRCSel (Enable SPDIF, I2S SRCMulti) */
  		emu_wr(sc, 0x20, 0x00600000, 4);
 @@ -1816,13 +1898,13 @@ emu_init(struct sc_info *sc)
  	for (i = 0; i < EMUMAXPAGES; i++)
  		sc->mem.ptb_pages[i] = tmp | i;
  
 -	emu_wrptr(sc, 0, PTB, (sc->mem.ptb_pages_addr));
 -	emu_wrptr(sc, 0, TCB, 0);	/* taken from original driver */
 -	emu_wrptr(sc, 0, TCBS, 0);	/* taken from original driver */
 +	emu_wrptr(sc, 0, EMU_PTB, (sc->mem.ptb_pages_addr));
 +	emu_wrptr(sc, 0, EMU_TCB, 0);	/* taken from original driver */
 +	emu_wrptr(sc, 0, EMU_TCBS, 0);	/* taken from original driver */
  
  	for (ch = 0; ch < NUM_G; ch++) {
 -		emu_wrptr(sc, ch, MAPA, tmp | MAP_PTI_MASK);
 -		emu_wrptr(sc, ch, MAPB, tmp | MAP_PTI_MASK);
 +		emu_wrptr(sc, ch, EMU_CHAN_MAPA, tmp | EMU_CHAN_MAP_PTI_MASK);
 +		emu_wrptr(sc, ch, EMU_CHAN_MAPB, tmp | EMU_CHAN_MAP_PTI_MASK);
  	}
  
  	/* emu_memalloc(sc, EMUPAGESIZE); */
 @@ -1850,19 +1932,19 @@ emu_init(struct sc_info *sc)
  	 */
  
  	if (sc->audigy) {
 -		tmp = HCFG_AUTOMUTE | HCFG_JOYENABLE;
 +		tmp = EMU_HCFG_AUTOMUTE | EMU_HCFG_JOYENABLE;
  		if (sc->audigy2)	/* Audigy 2 */
 -			tmp = HCFG_AUDIOENABLE | HCFG_AC3ENABLE_CDSPDIF |
 -			    HCFG_AC3ENABLE_GPSPDIF;
 -		emu_wr(sc, HCFG, tmp, 4);
 +			tmp = EMU_HCFG_AUDIOENABLE | EMU_HCFG_AC3ENABLE_CDSPDIF |
 +			    EMU_HCFG_AC3ENABLE_GPSPDIF;
 +		emu_wr(sc, EMU_HCFG, tmp, 4);
  
  		audigy_initefx(sc);
  
  		/* from ALSA initialization code: */
  
  		/* enable audio and disable both audio/digital outputs */
 -		emu_wr(sc, HCFG, emu_rd(sc, HCFG, 4) | HCFG_AUDIOENABLE, 4);
 -		emu_wr(sc, A_IOCFG, emu_rd(sc, A_IOCFG, 4) & ~A_IOCFG_GPOUT_AD,
 +		emu_wr(sc, EMU_HCFG, emu_rd(sc, EMU_HCFG, 4) | EMU_HCFG_AUDIOENABLE, 4);
 +		emu_wr(sc, EMU_A_IOCFG, emu_rd(sc, EMU_A_IOCFG, 4) & ~EMU_A_IOCFG_GPOUT_AD,
  		    4);
  		if (sc->audigy2) {	/* Audigy 2 */
  			/* Unmute Analog.
 @@ -1870,27 +1952,27 @@ emu_init(struct sc_info *sc)
  			 * init Alice3 I2SOut beyond 48kHz.
  			 * So, sequence is important.
  			 */
 -			emu_wr(sc, A_IOCFG,
 -			    emu_rd(sc, A_IOCFG, 4) | A_IOCFG_GPOUT_A, 4);
 +			emu_wr(sc, EMU_A_IOCFG,
 +			    emu_rd(sc, EMU_A_IOCFG, 4) | EMU_A_IOCFG_GPOUT_A, 4);
  		}
  	} else {
  		/* EMU10K1 initialization code */
 -		tmp = HCFG_AUDIOENABLE | HCFG_LOCKTANKCACHE_MASK 
 -		    | HCFG_AUTOMUTE;
 +		tmp = EMU_HCFG_AUDIOENABLE | EMU_HCFG_LOCKTANKCACHE_MASK 
 +		    | EMU_HCFG_AUTOMUTE;
  		if (sc->rev >= 6)
 -			tmp |= HCFG_JOYENABLE;
 +			tmp |= EMU_HCFG_JOYENABLE;
  
 -		emu_wr(sc, HCFG, tmp, 4);
 +		emu_wr(sc, EMU_HCFG, tmp, 4);
  
  		/* TOSLink detection */
  		sc->tos_link = 0;
 -		tmp = emu_rd(sc, HCFG, 4);
 -		if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
 -			emu_wr(sc, HCFG, tmp | HCFG_GPOUT1, 4);
 +		tmp = emu_rd(sc, EMU_HCFG, 4);
 +		if (tmp & (EMU_HCFG_GPINPUT0 | EMU_HCFG_GPINPUT1)) {
 +			emu_wr(sc, EMU_HCFG, tmp | EMU_HCFG_GPOUT1, 4);
  			DELAY(50);
 -			if (tmp != (emu_rd(sc, HCFG, 4) & ~HCFG_GPOUT1)) {
 +			if (tmp != (emu_rd(sc, EMU_HCFG, 4) & ~EMU_HCFG_GPOUT1)) {
  				sc->tos_link = 1;
 -				emu_wr(sc, HCFG, tmp, 4);
 +				emu_wr(sc, EMU_HCFG, tmp, 4);
  			}
  		}
  	}
 @@ -1903,42 +1985,42 @@ emu_uninit(struct sc_info *sc)
  {
  	u_int32_t ch;
  
 -	emu_wr(sc, INTE, 0, 4);
 +	emu_wr(sc, EMU_INTE, 0, 4);
  	for (ch = 0; ch < NUM_G; ch++)
 -		emu_wrptr(sc, ch, DCYSUSV, ENV_OFF);
 +		emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, ENV_OFF);
  	for (ch = 0; ch < NUM_G; ch++) {
 -		emu_wrptr(sc, ch, VTFT, 0);
 -		emu_wrptr(sc, ch, CVCF, 0);
 -		emu_wrptr(sc, ch, PTRX, 0);
 -		emu_wrptr(sc, ch, CPF, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0);
 +		emu_wrptr(sc, ch, EMU_CHAN_CPF, 0);
  	}
  
  	if (sc->audigy) {	/* stop fx processor */
 -		emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP);
 +		emu_wrptr(sc, 0, EMU_A_DBG, EMU_A_DBG_SINGLE_STEP);
  	}
  
  	/* disable audio and lock cache */
 -	emu_wr(sc, HCFG,
 -	    HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
 +	emu_wr(sc, EMU_HCFG,
 +	    EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE,
  	    4);
  
 -	emu_wrptr(sc, 0, PTB, 0);
 +	emu_wrptr(sc, 0, EMU_PTB, 0);
  	/* reset recording buffers */
 -	emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, MICBA, 0);
 -	emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, FXBA, 0);
 -	emu_wrptr(sc, 0, FXWC, 0);
 -	emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, ADCBA, 0);
 -	emu_wrptr(sc, 0, TCB, 0);
 -	emu_wrptr(sc, 0, TCBS, 0);
 +	emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_MICBA, 0);
 +	emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_FXBA, 0);
 +	emu_wrptr(sc, 0, EMU_FXWC, 0);
 +	emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_ADCBA, 0);
 +	emu_wrptr(sc, 0, EMU_TCB, 0);
 +	emu_wrptr(sc, 0, EMU_TCBS, 0);
  
  	/* disable channel interrupt */
 -	emu_wrptr(sc, 0, CLIEL, 0);
 -	emu_wrptr(sc, 0, CLIEH, 0);
 -	emu_wrptr(sc, 0, SOLEL, 0);
 -	emu_wrptr(sc, 0, SOLEH, 0);
 +	emu_wrptr(sc, 0, EMU_CLIEL, 0);
 +	emu_wrptr(sc, 0, EMU_CLIEH, 0);
 +	emu_wrptr(sc, 0, EMU_SOLEL, 0);
 +	emu_wrptr(sc, 0, EMU_SOLEH, 0);
  
  	/* init envelope engine */
  	if (!SLIST_EMPTY(&sc->mem.blocks))
 @@ -1997,7 +2079,7 @@ emu_pci_attach(device_t dev)
  	sc->audigy = sc->type == EMU10K2_PCI_ID || sc->type == EMU10K3_PCI_ID;
  	sc->audigy2 = (sc->audigy && sc->rev == 0x04);
  	sc->nchans = sc->audigy ? 8 : 4;
 -	sc->addrmask = sc->audigy ? A_PTR_ADDRESS_MASK : PTR_ADDRESS_MASK;
 +	sc->addrmask = sc->audigy ? EMU_A_PTR_ADDR_MASK : EMU_PTR_ADDR_MASK;
  
  	data = pci_read_config(dev, PCIR_COMMAND, 2);
  	data |= (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN);
 
 Copied: stable/8/sys/dev/sound/pci/emuxkireg.h (from r229430, head/sys/dev/sound/pci/emuxkireg.h)
 ==============================================================================
 --- /dev/null	00:00:00 1970	(empty, because file is newly added)
 +++ stable/8/sys/dev/sound/pci/emuxkireg.h	Fri Feb  3 22:13:36 2012	(r230963, copy of r229430, head/sys/dev/sound/pci/emuxkireg.h)
 @@ -0,0 +1,689 @@
 +/* $FreeBSD$ */
 +/*	$NetBSD: emuxkireg.h,v 1.8 2008/04/28 20:23:54 martin Exp $	*/
 +
 +/*-
 + * Copyright (c) 2001 The NetBSD Foundation, Inc.
 + * All rights reserved.
 + *
 + * This code is derived from software contributed to The NetBSD Foundation
 + * by Yannick Montulet.
 + *
 + * Redistribution and use in source and binary forms, with or without
 + * modification, are permitted provided that the following conditions
 + * are met:
 + * 1. Redistributions of source code must retain the above copyright
 + *    notice, this list of conditions and the following disclaimer.
 + * 2. Redistributions in binary form must reproduce the above copyright
 + *    notice, this list of conditions and the following disclaimer in the
 + *    documentation and/or other materials provided with the distribution.
 + *
 + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 + * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 + * POSSIBILITY OF SUCH DAMAGE.
 + */
 +
 +#ifndef _DEV_PCI_EMUXKIREG_H_
 +#define _DEV_PCI_EMUXKIREG_H_
 +
 +/*
 + * Register values for Creative EMU10000. The register values have been
 + * taken from GPLed SBLive! header file published by Creative. The comments
 + * have been stripped to avoid GPL pollution in kernel. The Creative version
 + * including comments is available in Linux 2.4.* kernel as file
 + *	drivers/sound/emu10k1/8010.h
 + */
 
 *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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From: dfilter@FreeBSD.ORG (dfilter service)
To: bug-followup@FreeBSD.org
Cc:  
Subject: Re: kern/153901: commit references a PR
Date: Fri,  3 Feb 2012 22:39:15 +0000 (UTC)

 Author: pfg
 Date: Fri Feb  3 22:39:04 2012
 New Revision: 230964
 URL: http://svn.freebsd.org/changeset/base/230964
 
 Log:
   MFC:	 r229981, r230898
   
   Replace a GPL'd header in the emu10kx snd driver code.
   
   This uses the emuxkireg.h already used in the emu10k1
   snd driver. Special thanks go to Alexander Motin as
   he was able to find some errors and reverse engineer
   some wrong values in the emuxkireg header.
   
   While here also merge some cleanups to the module Makefile.
   
   PR:		153901
   Obtained from:	NetBSD
   Approved by:	core (mentor implicit)
 
 Deleted:
   stable/9/sys/gnu/dev/sound/pci/emu10k1-alsa.h
   stable/9/sys/gnu/dev/sound/pci/p16v-alsa.h
   stable/9/sys/gnu/dev/sound/pci/p17v-alsa.h
 Modified:
   stable/9/sys/conf/files
   stable/9/sys/dev/sound/pci/emu10kx-midi.c
   stable/9/sys/dev/sound/pci/emu10kx-pcm.c
   stable/9/sys/dev/sound/pci/emu10kx.c
   stable/9/sys/dev/sound/pci/emu10kx.h
   stable/9/sys/dev/sound/pci/emuxkireg.h
   stable/9/sys/modules/sound/driver/emu10kx/Makefile
 Directory Properties:
   stable/9/sys/   (props changed)
   stable/9/sys/conf/   (props changed)
   stable/9/sys/modules/sound/driver/emu10kx/   (props changed)
 
 Modified: stable/9/sys/conf/files
 ==============================================================================
 --- stable/9/sys/conf/files	Fri Feb  3 22:13:36 2012	(r230963)
 +++ stable/9/sys/conf/files	Fri Feb  3 22:39:04 2012	(r230964)
 @@ -50,11 +50,6 @@ aic79xx_reg_print.c	optional ahd pci				
  aic79xx_reg_print.o		optional ahd pci ahd_reg_pretty_print	   \
  	compile-with	"${NORMAL_C}"					   \
  	no-implicit-rule local
 -emu10k1-alsa%diked.h		optional snd_emu10kx	   \
 -	dependency	"$S/tools/sound/emu10k1-mkalsa.sh $S/gnu/dev/sound/pci/emu10k1-alsa.h" \
 -	compile-with	"CC='${CC}' AWK=${AWK} sh $S/tools/sound/emu10k1-mkalsa.sh $S/gnu/dev/sound/pci/emu10k1-alsa.h emu10k1-alsa%diked.h" \
 -	no-obj no-implicit-rule before-depend				   \
 -	clean		"emu10k1-alsa%diked.h"
  #
  # The 'fdt_dtb_file' target covers an actual DTB file name, which is derived
  # from the specified source (DTS) file: <platform>.dts -> <platform>.dtb
 @@ -67,16 +62,6 @@ fdt_static_dtb.h		optional fdt fdt_dtb_s
  	compile-with "sh $S/tools/fdt/make_dtbh.sh ${FDT_DTS_FILE} ." \
  	no-obj no-implicit-rule before-depend \
  	clean		"fdt_static_dtb.h"
 -p16v-alsa%diked.h		optional snd_emu10kx pci		   \
 -	dependency	"$S/tools/sound/emu10k1-mkalsa.sh $S/gnu/dev/sound/pci/p16v-alsa.h" \
 -	compile-with	"CC='${CC}' AWK=${AWK} sh $S/tools/sound/emu10k1-mkalsa.sh $S/gnu/dev/sound/pci/p16v-alsa.h p16v-alsa%diked.h" \
 -	no-obj no-implicit-rule before-depend				   \
 -	clean		"p16v-alsa%diked.h"
 -p17v-alsa%diked.h		optional snd_emu10kx pci		   \
 -	dependency	"$S/tools/sound/emu10k1-mkalsa.sh $S/gnu/dev/sound/pci/p17v-alsa.h" \
 -	compile-with	"CC='${CC}' AWK=${AWK} sh $S/tools/sound/emu10k1-mkalsa.sh $S/gnu/dev/sound/pci/p17v-alsa.h p17v-alsa%diked.h" \
 -	no-obj no-implicit-rule before-depend				   \
 -	clean		"p17v-alsa%diked.h"
  feeder_eq_gen.h			optional sound				   \
  	dependency	"$S/tools/sound/feeder_eq_mkfilter.awk"		   \
  	compile-with	"${AWK} -f $S/tools/sound/feeder_eq_mkfilter.awk -- ${FEEDER_EQ_PRESETS} > feeder_eq_gen.h" \
 @@ -1728,19 +1713,9 @@ dev/sound/pci/csa.c		optional snd_csa pc
  dev/sound/pci/csapcm.c		optional snd_csa pci
  dev/sound/pci/ds1.c		optional snd_ds1 pci
  dev/sound/pci/emu10k1.c		optional snd_emu10k1 pci
 -dev/sound/pci/emu10kx.c		optional snd_emu10kx pci \
 -	dependency "emu10k1-alsa%diked.h" \
 -	dependency "p16v-alsa%diked.h" \
 -	dependency "p17v-alsa%diked.h" \
 -	warning "kernel contains GPL contaminated emu10kx headers"
 -dev/sound/pci/emu10kx-pcm.c	optional snd_emu10kx pci \
 -	dependency "emu10k1-alsa%diked.h" \
 -	dependency "p16v-alsa%diked.h" \
 -	dependency "p17v-alsa%diked.h" \
 -	warning "kernel contains GPL contaminated emu10kx headers"
 -dev/sound/pci/emu10kx-midi.c	optional snd_emu10kx pci \
 -	dependency "emu10k1-alsa%diked.h" \
 -	warning "kernel contains GPL contaminated emu10kx headers"
 +dev/sound/pci/emu10kx.c		optional snd_emu10kx pci
 +dev/sound/pci/emu10kx-pcm.c	optional snd_emu10kx pci
 +dev/sound/pci/emu10kx-midi.c	optional snd_emu10kx pci
  dev/sound/pci/envy24.c		optional snd_envy24 pci
  dev/sound/pci/envy24ht.c	optional snd_envy24ht pci
  dev/sound/pci/es137x.c		optional snd_es137x pci
 
 Modified: stable/9/sys/dev/sound/pci/emu10kx-midi.c
 ==============================================================================
 --- stable/9/sys/dev/sound/pci/emu10kx-midi.c	Fri Feb  3 22:13:36 2012	(r230963)
 +++ stable/9/sys/dev/sound/pci/emu10kx-midi.c	Fri Feb  3 22:39:04 2012	(r230964)
 @@ -50,8 +50,8 @@
  #include <dev/sound/midi/mpu401.h>
  #include "mpufoi_if.h"
  
 +#include <dev/sound/pci/emuxkireg.h>
  #include <dev/sound/pci/emu10kx.h>
 -#include "emu10k1-alsa%diked.h"
  
  struct emu_midi_softc {
  	struct mtx	mtx;
 @@ -176,25 +176,25 @@ emu_midi_attach(device_t dev)
  	if (scp->is_emu10k1) {
  		/* SB Live! - only one MIDI device here */
  		inte_val = 0;
 -		/* inte_val |= INTE_MIDITXENABLE;*/
 -		inte_val |= INTE_MIDIRXENABLE;
 -		ipr_val = IPR_MIDITRANSBUFEMPTY;
 -		ipr_val |= IPR_MIDIRECVBUFEMPTY;
 +		/* inte_val |= EMU_INTE_MIDITXENABLE;*/
 +		inte_val |= EMU_INTE_MIDIRXENABLE;
 +		ipr_val = EMU_IPR_MIDITRANSBUFE;
 +		ipr_val |= EMU_IPR_MIDIRECVBUFE;
  	} else {
 -		if (scp->port == A_MUDATA1) {
 +		if (scp->port == EMU_A_MUDATA1) {
  			/* EXTERNAL MIDI (AudigyDrive) */
  			inte_val = 0;
 -			/* inte_val |= A_INTE_MIDITXENABLE1;*/
 -			inte_val |= INTE_MIDIRXENABLE;
 -			ipr_val = IPR_MIDITRANSBUFEMPTY;
 -			ipr_val |= IPR_MIDIRECVBUFEMPTY;
 +			/* inte_val |= A_EMU_INTE_MIDITXENABLE1;*/
 +			inte_val |= EMU_INTE_MIDIRXENABLE;
 +			ipr_val = EMU_IPR_MIDITRANSBUFE;
 +			ipr_val |= EMU_IPR_MIDIRECVBUFE;
  		} else {
  			/* MIDI hw config port 2 */
  			inte_val = 0;
 -			/* inte_val |= A_INTE_MIDITXENABLE2;*/
 -			inte_val |= INTE_A_MIDIRXENABLE2;
 -			ipr_val = IPR_A_MIDITRANSBUFEMPTY2;
 -			ipr_val |= IPR_A_MIDIRECVBUFEMPTY2;
 +			/* inte_val |= A_EMU_INTE_MIDITXENABLE2;*/
 +			inte_val |= EMU_INTE_A_MIDIRXENABLE2;
 +			ipr_val = EMU_IPR_A_MIDITRANSBUFE2;
 +			ipr_val |= EMU_IPR_A_MIDIRECBUFE2;
  		}
  	}
  
 @@ -214,7 +214,7 @@ emu_midi_attach(device_t dev)
  	if (scp->is_emu10k1)
  		emu_enable_ir(scp->card);
  	else {
 -		if (scp->port == A_MUDATA1)
 +		if (scp->port == EMU_A_MUDATA1)
  			emu_enable_ir(scp->card);
  	}
  
 
 Modified: stable/9/sys/dev/sound/pci/emu10kx-pcm.c
 ==============================================================================
 --- stable/9/sys/dev/sound/pci/emu10kx-pcm.c	Fri Feb  3 22:13:36 2012	(r230963)
 +++ stable/9/sys/dev/sound/pci/emu10kx-pcm.c	Fri Feb  3 22:39:04 2012	(r230964)
 @@ -49,8 +49,8 @@
  
  #include "mixer_if.h"
  
 +#include <dev/sound/pci/emuxkireg.h>
  #include <dev/sound/pci/emu10kx.h>
 -#include "emu10k1-alsa%diked.h"
  
  struct emu_pcm_pchinfo {
  	int		spd;
 @@ -555,8 +555,8 @@ emu_ac97_read_emulation(struct emu_pcm_i
  		break;
  	}
  
 -	emu_wr(sc->card, AC97ADDRESS, regno, 1);
 -	tmp = emu_rd(sc->card, AC97DATA, 2);
 +	emu_wr(sc->card, EMU_AC97ADDR, regno, 1);
 +	tmp = emu_rd(sc->card, EMU_AC97DATA, 2);
  
  	if (use_ac97)
  		emulated = tmp;
 @@ -621,8 +621,8 @@ emu_ac97_write_emulation(struct emu_pcm_
  		break;
  	}
  	if (write_ac97) {
 -		emu_wr(sc->card, AC97ADDRESS, regno, 1);
 -		emu_wr(sc->card, AC97DATA, data, 2);
 +		emu_wr(sc->card, EMU_AC97ADDR, regno, 1);
 +		emu_wr(sc->card, EMU_AC97DATA, data, 2);
  	}
  }
  
 @@ -658,8 +658,8 @@ emu_rdcd(kobj_t obj __unused, void *devi
  	struct emu_pcm_info *sc = (struct emu_pcm_info *)devinfo;
  
  	KASSERT(sc->card != NULL, ("emu_rdcd: no soundcard"));
 -	emu_wr(sc->card, AC97ADDRESS, regno, 1);
 -	rd = emu_rd(sc->card, AC97DATA, 2);
 +	emu_wr(sc->card, EMU_AC97ADDR, regno, 1);
 +	rd = emu_rd(sc->card, EMU_AC97DATA, 2);
  	return (rd);
  }
  
 @@ -669,8 +669,8 @@ emu_wrcd(kobj_t obj __unused, void *devi
  	struct emu_pcm_info *sc = (struct emu_pcm_info *)devinfo;
  
  	KASSERT(sc->card != NULL, ("emu_wrcd: no soundcard"));
 -	emu_wr(sc->card, AC97ADDRESS, regno, 1);
 -	emu_wr(sc->card, AC97DATA, data, 2);
 +	emu_wr(sc->card, EMU_AC97ADDR, regno, 1);
 +	emu_wr(sc->card, EMU_AC97DATA, data, 2);
  	return (0);
  }
  
 @@ -870,12 +870,12 @@ emurchan_init(kobj_t obj __unused, void 
  	ch->blksz = sc->bufsz / 2; /* We rise interrupt for half-full buffer */
  	ch->fmt = SND_FORMAT(AFMT_U8, 1, 0);
  	ch->spd = 8000;
 -	ch->idxreg = sc->is_emu10k1 ? ADCIDX : A_ADCIDX;
 -	ch->basereg = ADCBA;
 -	ch->sizereg = ADCBS;
 -	ch->setupreg = ADCCR;
 -	ch->irqmask = INTE_ADCBUFENABLE;
 -	ch->iprmask = IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL;
 +	ch->idxreg = sc->is_emu10k1 ? EMU_ADCIDX : EMU_A_ADCIDX;
 +	ch->basereg = EMU_ADCBA;
 +	ch->sizereg = EMU_ADCBS;
 +	ch->setupreg = EMU_ADCCR;
 +	ch->irqmask = EMU_INTE_ADCBUFENABLE;
 +	ch->iprmask = EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL;
  
  	if (sndbuf_alloc(ch->buffer, emu_gettag(sc->card), 0, sc->bufsz) != 0)
  		return (NULL);
 @@ -953,22 +953,22 @@ emurchan_trigger(kobj_t obj __unused, vo
  
  	switch (sc->bufsz) {
  	case 4096:
 -		sz = ADCBS_BUFSIZE_4096;
 +		sz = EMU_RECBS_BUFSIZE_4096;
  		break;
  	case 8192:
 -		sz = ADCBS_BUFSIZE_8192;
 +		sz = EMU_RECBS_BUFSIZE_8192;
  		break;
  	case 16384:
 -		sz = ADCBS_BUFSIZE_16384;
 +		sz = EMU_RECBS_BUFSIZE_16384;
  		break;
  	case 32768:
 -		sz = ADCBS_BUFSIZE_32768;
 +		sz = EMU_RECBS_BUFSIZE_32768;
  		break;
  	case 65536:
 -		sz = ADCBS_BUFSIZE_65536;
 +		sz = EMU_RECBS_BUFSIZE_65536;
  		break;
  	default:
 -		sz = ADCBS_BUFSIZE_4096;
 +		sz = EMU_RECBS_BUFSIZE_4096;
  	}
  
  	snd_mtxlock(sc->lock);
 @@ -976,9 +976,9 @@ emurchan_trigger(kobj_t obj __unused, vo
  	case PCMTRIG_START:
  		ch->run = 1;
  		emu_wrptr(sc->card, 0, ch->sizereg, sz);
 -		val = sc->is_emu10k1 ? ADCCR_LCHANENABLE : A_ADCCR_LCHANENABLE;
 +		val = sc->is_emu10k1 ? EMU_ADCCR_LCHANENABLE : EMU_A_ADCCR_LCHANENABLE;
  		if (AFMT_CHANNEL(ch->fmt) > 1)
 -			val |= sc->is_emu10k1 ? ADCCR_RCHANENABLE : A_ADCCR_RCHANENABLE;
 +			val |= sc->is_emu10k1 ? EMU_ADCCR_RCHANENABLE : EMU_A_ADCCR_RCHANENABLE;
  		val |= sc->is_emu10k1 ? emu_k1_recval(ch->spd) : emu_k2_recval(ch->spd);
  		emu_wrptr(sc->card, 0, ch->setupreg, 0);
  		emu_wrptr(sc->card, 0, ch->setupreg, val);
 @@ -1049,11 +1049,11 @@ emufxrchan_init(kobj_t obj __unused, voi
  	ch = &(sc->rch_efx);
  	ch->fmt = SND_FORMAT(AFMT_S16_LE, 1, 0);
  	ch->spd = sc->is_emu10k1 ? 48000*32 : 48000 * 64;
 -	ch->idxreg = FXIDX;
 -	ch->basereg = FXBA;
 -	ch->sizereg = FXBS;
 -	ch->irqmask = INTE_EFXBUFENABLE;
 -	ch->iprmask = IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL;
 +	ch->idxreg = EMU_FXIDX;
 +	ch->basereg = EMU_FXBA;
 +	ch->sizereg = EMU_FXBS;
 +	ch->irqmask = EMU_INTE_EFXBUFENABLE;
 +	ch->iprmask = EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL;
  	ch->buffer = b;
  	ch->pcm = sc;
  	ch->channel = c;
 @@ -1113,22 +1113,22 @@ emufxrchan_trigger(kobj_t obj __unused, 
  
  	switch (sc->bufsz) {
  	case 4096:
 -		sz = ADCBS_BUFSIZE_4096;
 +		sz = EMU_RECBS_BUFSIZE_4096;
  		break;
  	case 8192:
 -		sz = ADCBS_BUFSIZE_8192;
 +		sz = EMU_RECBS_BUFSIZE_8192;
  		break;
  	case 16384:
 -		sz = ADCBS_BUFSIZE_16384;
 +		sz = EMU_RECBS_BUFSIZE_16384;
  		break;
  	case 32768:
 -		sz = ADCBS_BUFSIZE_32768;
 +		sz = EMU_RECBS_BUFSIZE_32768;
  		break;
  	case 65536:
 -		sz = ADCBS_BUFSIZE_65536;
 +		sz = EMU_RECBS_BUFSIZE_65536;
  		break;
  	default:
 -		sz = ADCBS_BUFSIZE_4096;
 +		sz = EMU_RECBS_BUFSIZE_4096;
  	}
  
  	snd_mtxlock(sc->lock);
 @@ -1140,14 +1140,14 @@ emufxrchan_trigger(kobj_t obj __unused, 
  		/*
  		 * SB Live! is limited to 32 mono channels. Audigy
  		 * has 64 mono channels. Channels are enabled
 -		 * by setting a bit in A_FXWC[1|2] registers.
 +		 * by setting a bit in EMU_A_FXWC[1|2] registers.
  		 */
  		/* XXX there is no way to demultiplex this streams for now */
  		if (sc->is_emu10k1) {
 -			emu_wrptr(sc->card, 0, FXWC, 0xffffffff);
 +			emu_wrptr(sc->card, 0, EMU_FXWC, 0xffffffff);
  		} else {
 -			emu_wrptr(sc->card, 0, A_FXWC1, 0xffffffff);
 -			emu_wrptr(sc->card, 0, A_FXWC2, 0xffffffff);
 +			emu_wrptr(sc->card, 0, EMU_A_FXWC1, 0xffffffff);
 +			emu_wrptr(sc->card, 0, EMU_A_FXWC2, 0xffffffff);
  		}
  		break;
  	case PCMTRIG_STOP:
 @@ -1155,10 +1155,10 @@ emufxrchan_trigger(kobj_t obj __unused, 
  	case PCMTRIG_ABORT:
  		ch->run = 0;
  		if (sc->is_emu10k1) {
 -			emu_wrptr(sc->card, 0, FXWC, 0x0);
 +			emu_wrptr(sc->card, 0, EMU_FXWC, 0x0);
  		} else {
 -			emu_wrptr(sc->card, 0, A_FXWC1, 0x0);
 -			emu_wrptr(sc->card, 0, A_FXWC2, 0x0);
 +			emu_wrptr(sc->card, 0, EMU_A_FXWC1, 0x0);
 +			emu_wrptr(sc->card, 0, EMU_A_FXWC2, 0x0);
  		}
  		emu_wrptr(sc->card, 0, ch->sizereg, 0);
  		(void)emu_intr_unregister(sc->card, ch->ihandle);
 @@ -1238,8 +1238,8 @@ emu_pcm_intr(void *pcm, uint32_t stat)
  
  	snd_mtxlock(sc->lock);
  	
 -	if (stat & IPR_INTERVALTIMER) {
 -		ack |= IPR_INTERVALTIMER;
 +	if (stat & EMU_IPR_INTERVALTIMER) {
 +		ack |= EMU_IPR_INTERVALTIMER;
  		for (i = 0; i < MAX_CHANNELS; i++)
  			if (sc->pch[i].channel) {
  				if (sc->pch[i].run == 1) {
 @@ -1262,8 +1262,8 @@ emu_pcm_intr(void *pcm, uint32_t stat)
  	}
  
  
 -	if (stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) {
 -		ack |= stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL);
 +	if (stat & (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL)) {
 +		ack |= stat & (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL);
  		if (sc->rch_adc.channel) {
  			snd_mtxunlock(sc->lock);
  			chn_intr(sc->rch_adc.channel);
 @@ -1271,8 +1271,8 @@ emu_pcm_intr(void *pcm, uint32_t stat)
  		}
  	}
  
 -	if (stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) {
 -		ack |= stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL);
 +	if (stat & (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL)) {
 +		ack |= stat & (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL);
  		if (sc->rch_efx.channel) {
  			snd_mtxunlock(sc->lock);
  			chn_intr(sc->rch_efx.channel);
 @@ -1450,8 +1450,8 @@ emu_pcm_attach(device_t dev)
  		goto bad;
  	}
  
 -	inte = INTE_INTERVALTIMERENB;
 -	ipr = IPR_INTERVALTIMER; /* Used by playback & ADC */
 +	inte = EMU_INTE_INTERTIMERENB;
 +	ipr = EMU_IPR_INTERVALTIMER; /* Used by playback & ADC */
  	sc->ihandle = emu_intr_register(sc->card, inte, ipr, &emu_pcm_intr, sc);
  
  	if (emu_pcm_init(sc) == -1) {
 
 Modified: stable/9/sys/dev/sound/pci/emu10kx.c
 ==============================================================================
 --- stable/9/sys/dev/sound/pci/emu10kx.c	Fri Feb  3 22:13:36 2012	(r230963)
 +++ stable/9/sys/dev/sound/pci/emu10kx.c	Fri Feb  3 22:39:04 2012	(r230964)
 @@ -53,6 +53,7 @@
  #include <dev/sound/pcm/sound.h>
  #include <dev/sound/pcm/ac97.h>
  
 +#include <dev/sound/pci/emuxkireg.h>
  #include <dev/sound/pci/emu10kx.h>
  
  /* hw flags */
 @@ -181,7 +182,7 @@
  #define	A_IN_AUX2_R	0x0d
  #define	A_IN_AUX2	A_IN_AUX2_L
  
 -/* Audigiy Outputs */
 +/* Audigy Outputs */
  #define	A_OUT_D_FRONT_L	0x00
  #define	A_OUT_D_FRONT_R	0x01
  #define	A_OUT_D_FRONT	A_OUT_D_FRONT_L
 @@ -217,9 +218,19 @@
  #define	A_OUT_ADC_REC_R	0x17
  #define	A_OUT_ADC_REC	A_OUT_ADC_REC_L
  
 -#include "emu10k1-alsa%diked.h"
 -#include "p16v-alsa%diked.h"
 -#include "p17v-alsa%diked.h"
 +#define EMU_DATA2	0x24
 +#define EMU_IPR2	0x28
 +#define EMU_INTE2	0x2c
 +#define EMU_IPR3	0x38
 +#define EMU_INTE3	0x3c
 +
 +#define EMU_A2_SRCSel		0x60
 +#define EMU_A2_SRCMULTI_ENABLE	0x6e
 +
 +#define EMU_A_I2S_CAPTURE_96000	0x00000400
 +
 +#define EMU_A2_MIXER_I2S_ENABLE           0x7B
 +#define EMU_A2_MIXER_SPDIF_ENABLE         0x7A
  
  #define	C_FRONT_L	0
  #define	C_FRONT_R	1
 @@ -630,7 +641,7 @@ emu_wr_nolock(struct emu_sc_info *sc, un
  	}
  }
  /*
 - * PTR / DATA interface. Access to EMU10Kx is made
 + * EMU_PTR / EMU_DATA interface. Access to EMU10Kx is made
   * via (channel, register) pair. Some registers are channel-specific,
   * some not.
   */
 @@ -639,11 +650,11 @@ emu_rdptr(struct emu_sc_info *sc, unsign
  {
  	uint32_t ptr, val, mask, size, offset;
  
 -	ptr = ((reg << 16) & sc->address_mask) | (chn & PTR_CHANNELNUM_MASK);
 +	ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK);
  
  	EMU_RWLOCK();
 -	emu_wr_nolock(sc, PTR, ptr, 4);
 -	val = emu_rd_nolock(sc, DATA, 4);
 +	emu_wr_nolock(sc, EMU_PTR, ptr, 4);
 +	val = emu_rd_nolock(sc, EMU_DATA, 4);
  	EMU_RWUNLOCK();
  
  	/*
 @@ -666,10 +677,10 @@ emu_wrptr(struct emu_sc_info *sc, unsign
  {
  	uint32_t ptr, mask, size, offset;
  
 -	ptr = ((reg << 16) & sc->address_mask) | (chn & PTR_CHANNELNUM_MASK);
 +	ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK);
  
  	EMU_RWLOCK();
 -	emu_wr_nolock(sc, PTR, ptr, 4);
 +	emu_wr_nolock(sc, EMU_PTR, ptr, 4);
  	/*
  	 * XXX Another kind of magic encoding in register number. This can
  	 * give you side effect - it will read previous data from register
 @@ -681,13 +692,13 @@ emu_wrptr(struct emu_sc_info *sc, unsign
  		mask = ((1 << size) - 1) << offset;
  		data <<= offset;
  		data &= mask;
 -		data |= emu_rd_nolock(sc, DATA, 4) & ~mask;
 +		data |= emu_rd_nolock(sc, EMU_DATA, 4) & ~mask;
  	}
 -	emu_wr_nolock(sc, DATA, data, 4);
 +	emu_wr_nolock(sc, EMU_DATA, data, 4);
  	EMU_RWUNLOCK();
  }
  /*
 - * PTR2 / DATA2 interface. Access to P16v is made
 + * EMU_A2_PTR / EMU_DATA2 interface. Access to P16v is made
   * via (channel, register) pair. Some registers are channel-specific,
   * some not. This interface is supported by CA0102 and CA0108 chips only.
   */
 @@ -698,8 +709,8 @@ emu_rd_p16vptr(struct emu_sc_info *sc, u
  
  	/* XXX separate lock? */
  	EMU_RWLOCK();
 -	emu_wr_nolock(sc, PTR2, (reg << 16) | chn, 4);
 -	val = emu_rd_nolock(sc, DATA2, 4);
 +	emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4);
 +	val = emu_rd_nolock(sc, EMU_DATA2, 4);
  
  	EMU_RWUNLOCK();
  
 @@ -711,8 +722,8 @@ emu_wr_p16vptr(struct emu_sc_info *sc, u
  {
  
  	EMU_RWLOCK();
 -	emu_wr_nolock(sc, PTR2, (reg << 16) | chn, 4);
 -	emu_wr_nolock(sc, DATA2, data, 4);
 +	emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4);
 +	emu_wr_nolock(sc, EMU_DATA2, data, 4);
  	EMU_RWUNLOCK();
  }
  /*
 @@ -737,13 +748,13 @@ emu_wr_cbptr(struct emu_sc_info *sc, uin
  
  /*
   * Direct hardware register access
 - * Assume that it is never used to access PTR-based registers and can run unlocked.
 + * Assume that it is never used to access EMU_PTR-based registers and can run unlocked.
   */
  void
  emu_wr(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size)
  {
 -	KASSERT(regno != PTR, ("emu_wr: attempt to write to PTR"));
 -	KASSERT(regno != PTR2, ("emu_wr: attempt to write to PTR2"));
 +	KASSERT(regno != EMU_PTR, ("emu_wr: attempt to write to EMU_PTR"));
 +	KASSERT(regno != EMU_A2_PTR, ("emu_wr: attempt to write to EMU_A2_PTR"));
  
  	emu_wr_nolock(sc, regno, data, size);
  }
 @@ -753,8 +764,8 @@ emu_rd(struct emu_sc_info *sc, unsigned 
  {
  	uint32_t rd;
  
 -	KASSERT(regno != DATA, ("emu_rd: attempt to read DATA"));
 -	KASSERT(regno != DATA2, ("emu_rd: attempt to read DATA2"));
 +	KASSERT(regno != EMU_DATA, ("emu_rd: attempt to read DATA"));
 +	KASSERT(regno != EMU_DATA2, ("emu_rd: attempt to read DATA2"));
  
  	rd = emu_rd_nolock(sc, regno, size);
  	return (rd);
 @@ -770,24 +781,24 @@ emu_enable_ir(struct emu_sc_info *sc)
  	uint32_t iocfg;
  
  	if (sc->is_emu10k2 || sc->is_ca0102) {
 -		iocfg = emu_rd_nolock(sc, A_IOCFG, 2);
 -		emu_wr_nolock(sc, A_IOCFG, iocfg | A_IOCFG_GPOUT2, 2);
 +		iocfg = emu_rd_nolock(sc, EMU_A_IOCFG, 2);
 +		emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT2, 2);
  		DELAY(500);
 -		emu_wr_nolock(sc, A_IOCFG, iocfg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, 2);
 +		emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1 | EMU_A_IOCFG_GPOUT2, 2);
  		DELAY(500);
 -		emu_wr_nolock(sc, A_IOCFG, iocfg | A_IOCFG_GPOUT1, 2);
 +		emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1, 2);
  		DELAY(100);
 -		emu_wr_nolock(sc, A_IOCFG, iocfg, 2);
 +		emu_wr_nolock(sc, EMU_A_IOCFG, iocfg, 2);
  		device_printf(sc->dev, "Audigy IR MIDI events enabled.\n");
  		sc->enable_ir = 1;
  	}
  	if (sc->is_emu10k1) {
 -		iocfg = emu_rd_nolock(sc, HCFG, 4);
 -		emu_wr_nolock(sc, HCFG, iocfg | HCFG_GPOUT2, 4);
 +		iocfg = emu_rd_nolock(sc, EMU_HCFG, 4);
 +		emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT2, 4);
  		DELAY(500);
 -		emu_wr_nolock(sc, HCFG, iocfg | HCFG_GPOUT1 | HCFG_GPOUT2, 4);
 +		emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT1 | EMU_HCFG_GPOUT2, 4);
  		DELAY(100);
 -		emu_wr_nolock(sc, HCFG, iocfg, 4);
 +		emu_wr_nolock(sc, EMU_HCFG, iocfg, 4);
  		device_printf(sc->dev, "SB Live! IR MIDI events enabled.\n");
  		sc->enable_ir = 1;
  	}
 @@ -835,7 +846,7 @@ emu_timer_set(struct emu_sc_info *sc, in
  			sc->timerinterval = sc->timer[i];
  
  	/* XXX */
 -	emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2);
 +	emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2);
  	mtx_unlock(&sc->lock);
  
  	return (timer);
 @@ -868,16 +879,16 @@ emu_timer_enable(struct emu_sc_info *sc,
  			ena_int = 1;
  	}
  
 -	emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2);
 +	emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2);
  
  	if (ena_int == 1) {
 -		x = emu_rd(sc, INTE, 4);
 -		x |= INTE_INTERVALTIMERENB;
 -		emu_wr(sc, INTE, x, 4);
 +		x = emu_rd(sc, EMU_INTE, 4);
 +		x |= EMU_INTE_INTERTIMERENB;
 +		emu_wr(sc, EMU_INTE, x, 4);
  	} else {
 -		x = emu_rd(sc, INTE, 4);
 -		x &= ~INTE_INTERVALTIMERENB;
 -		emu_wr(sc, INTE, x, 4);
 +		x = emu_rd(sc, EMU_INTE, 4);
 +		x &= ~EMU_INTE_INTERTIMERENB;
 +		emu_wr(sc, EMU_INTE, x, 4);
  	}
  	mtx_unlock(&sc->lock);
  	return (0);
 @@ -917,9 +928,9 @@ emu_intr_register(struct emu_sc_info *sc
  			sc->ihandler[i].intr_mask = intr_mask;
  			sc->ihandler[i].softc = isc;
  			sc->ihandler[i].irq_func = func;
 -			x = emu_rd(sc, INTE, 4);
 +			x = emu_rd(sc, EMU_INTE, 4);
  			x |= inte_mask;
 -			emu_wr(sc, INTE, x, 4);
 +			emu_wr(sc, EMU_INTE, x, 4);
  			mtx_unlock(&sc->lock);
  			if (sc->dbg_level > 1)
  				device_printf(sc->dev, "ihandle %d registered\n", i);
 @@ -946,7 +957,7 @@ emu_intr_unregister(struct emu_sc_info *
  		return (-1);
  	}
  
 -	x = emu_rd(sc, INTE, 4);
 +	x = emu_rd(sc, EMU_INTE, 4);
  	x &= ~sc->ihandler[hnumber].inte_mask;
  
  	sc->ihandler[hnumber].inte_mask = 0;
 @@ -954,12 +965,12 @@ emu_intr_unregister(struct emu_sc_info *
  	sc->ihandler[hnumber].softc = NULL;
  	sc->ihandler[hnumber].irq_func = NULL;
  
 -	/* other interrupt handlers may use this INTE value */
 +	/* other interrupt handlers may use this EMU_INTE value */
  	for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
  		if (sc->ihandler[i].inte_mask != 0)
  			x |= sc->ihandler[i].inte_mask;
  
 -	emu_wr(sc, INTE, x, 4);
 +	emu_wr(sc, EMU_INTE, x, 4);
  
  	mtx_unlock(&sc->lock);
  	return (hnumber);
 @@ -973,11 +984,11 @@ emu_intr(void *p)
  	int i;
  
  	for (;;) {
 -		stat = emu_rd(sc, IPR, 4);
 +		stat = emu_rd(sc, EMU_IPR, 4);
  		ack = 0;
  		if (stat == 0)
  			break;
 -		emu_wr(sc, IPR, stat, 4);
 +		emu_wr(sc, EMU_IPR, stat, 4);
  		for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) {
  			if ((((sc->ihandler[i].intr_mask) & stat) != 0) &&
  			    (((void *)sc->ihandler[i].irq_func) != NULL)) {
 @@ -993,13 +1004,13 @@ emu_intr(void *p)
  
  	if ((sc->is_ca0102) || (sc->is_ca0108))
  		for (;;) {
 -			stat = emu_rd(sc, IPR2, 4);
 +			stat = emu_rd(sc, EMU_IPR2, 4);
  			ack = 0;
  			if (stat == 0)
  				break;
 -			emu_wr(sc, IPR2, stat, 4);
 +			emu_wr(sc, EMU_IPR2, stat, 4);
  			if (sc->dbg_level > 1)
 -				device_printf(sc->dev, "IPR2: %08x\n", stat);
 +				device_printf(sc->dev, "EMU_IPR2: %08x\n", stat);
  
  			break;	/* to avoid infinite loop. shoud be removed
  				 * after completion of P16V interface. */
 @@ -1007,13 +1018,13 @@ emu_intr(void *p)
  
  	if (sc->is_ca0102)
  		for (;;) {
 -			stat = emu_rd(sc, IPR3, 4);
 +			stat = emu_rd(sc, EMU_IPR3, 4);
  			ack = 0;
  			if (stat == 0)
  				break;
 -			emu_wr(sc, IPR3, stat, 4);
 +			emu_wr(sc, EMU_IPR3, stat, 4);
  			if (sc->dbg_level > 1)
 -				device_printf(sc->dev, "IPR3: %08x\n", stat);
 +				device_printf(sc->dev, "EMU_IPR3: %08x\n", stat);
  
  			break;	/* to avoid infinite loop. should be removed
  				 * after completion of S/PDIF interface */
 @@ -1374,61 +1385,61 @@ emu_vwrite(struct emu_sc_info *sc, struc
  
  
  	if (v->stereo) {
 -		emu_wrptr(sc, v->vnum, CPF, CPF_STEREO_MASK);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, EMU_CHAN_CPF_STEREO_MASK);
  	} else {
 -		emu_wrptr(sc, v->vnum, CPF, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, 0);
  	}
  	val = v->stereo ? 28 : 30;
  	val *= v->b16 ? 1 : 2;
  	start = v->sa + val;
  
  	if (sc->is_emu10k1) {
 -		emu_wrptr(sc, v->vnum, FXRT, ((v->routing[3] << 12) |
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_FXRT, ((v->routing[3] << 12) |
  		    (v->routing[2] << 8) |
  		    (v->routing[1] << 4) |
  		    (v->routing[0] << 0)) << 16);
  	} else {
 -		emu_wrptr(sc, v->vnum, A_FXRT1, (v->routing[3] << 24) |
 +		emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT1, (v->routing[3] << 24) |
  		    (v->routing[2] << 16) |
  		    (v->routing[1] << 8) |
  		    (v->routing[0] << 0));
 -		emu_wrptr(sc, v->vnum, A_FXRT2, (v->routing[7] << 24) |
 +		emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT2, (v->routing[7] << 24) |
  		    (v->routing[6] << 16) |
  		    (v->routing[5] << 8) |
  		    (v->routing[4] << 0));
 -		emu_wrptr(sc, v->vnum, A_SENDAMOUNTS, (v->amounts[7] << 24) |
 +		emu_wrptr(sc, v->vnum, EMU_A_CHAN_SENDAMOUNTS, (v->amounts[7] << 24) |
  		    (v->amounts[6] << 26) |
  		    (v->amounts[5] << 8) |
  		    (v->amounts[4] << 0));
  	}
 -	emu_wrptr(sc, v->vnum, PTRX, (v->amounts[0] << 8) | (v->amounts[1] << 0));
 -	emu_wrptr(sc, v->vnum, DSL, v->ea | (v->amounts[3] << 24));
 -	emu_wrptr(sc, v->vnum, PSST, v->sa | (v->amounts[2] << 24));
 -
 -	emu_wrptr(sc, v->vnum, CCCA, start | (v->b16 ? 0 : CCCA_8BITSELECT));
 -	emu_wrptr(sc, v->vnum, Z1, 0);
 -	emu_wrptr(sc, v->vnum, Z2, 0);
 -
 -	silent_page = ((uint32_t) (sc->mem.silent_page_addr) << 1) | MAP_PTI_MASK;
 -	emu_wrptr(sc, v->vnum, MAPA, silent_page);
 -	emu_wrptr(sc, v->vnum, MAPB, silent_page);
 -
 -	emu_wrptr(sc, v->vnum, CVCF, CVCF_CURRENTFILTER_MASK);
 -	emu_wrptr(sc, v->vnum, VTFT, VTFT_FILTERTARGET_MASK);
 -	emu_wrptr(sc, v->vnum, ATKHLDM, 0);
 -	emu_wrptr(sc, v->vnum, DCYSUSM, DCYSUSM_DECAYTIME_MASK);
 -	emu_wrptr(sc, v->vnum, LFOVAL1, 0x8000);
 -	emu_wrptr(sc, v->vnum, LFOVAL2, 0x8000);
 -	emu_wrptr(sc, v->vnum, FMMOD, 0);
 -	emu_wrptr(sc, v->vnum, TREMFRQ, 0);
 -	emu_wrptr(sc, v->vnum, FM2FRQ2, 0);
 -	emu_wrptr(sc, v->vnum, ENVVAL, 0x8000);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX, (v->amounts[0] << 8) | (v->amounts[1] << 0));
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_DSL, v->ea | (v->amounts[3] << 24));
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_PSST, v->sa | (v->amounts[2] << 24));
 +
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_CCCA, start | (v->b16 ? 0 : EMU_CHAN_CCCA_8BITSELECT));
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_Z1, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_Z2, 0);
 +
 +	silent_page = ((uint32_t) (sc->mem.silent_page_addr) << 1) | EMU_CHAN_MAP_PTI_MASK;
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_MAPA, silent_page);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_MAPB, silent_page);
 +
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, EMU_CHAN_CVCF_CURRFILTER_MASK);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, EMU_CHAN_VTFT_FILTERTARGET_MASK);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDM, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSM, EMU_CHAN_DCYSUSM_DECAYTIME_MASK);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL1, 0x8000);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL2, 0x8000);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_FMMOD, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_TREMFRQ, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_FM2FRQ2, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVAL, 0x8000);
  
 -	emu_wrptr(sc, v->vnum, ATKHLDV, ATKHLDV_HOLDTIME_MASK | ATKHLDV_ATTACKTIME_MASK);
 -	emu_wrptr(sc, v->vnum, ENVVOL, 0x8000);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDV, EMU_CHAN_ATKHLDV_HOLDTIME_MASK | EMU_CHAN_ATKHLDV_ATTACKTIME_MASK);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVOL, 0x8000);
  
 -	emu_wrptr(sc, v->vnum, PEFE_FILTERAMOUNT, 0x7f);
 -	emu_wrptr(sc, v->vnum, PEFE_PITCHAMOUNT, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_FILTERAMOUNT, 0x7f);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_PITCHAMOUNT, 0);
  	if ((v->stereo) && (v->slave != NULL))
  		emu_vwrite(sc, v->slave);
  }
 @@ -1438,7 +1449,7 @@ emu_vstop(struct emu_sc_info *sc, char c
  {
  	int reg;
  
 -	reg = (channel & 0x20) ? SOLEH : SOLEL;
 +	reg = (channel & 0x20) ? EMU_SOLEH : EMU_SOLEL;
  	channel &= 0x1f;
  	reg |= 1 << 24;
  	reg |= channel << 16;
 @@ -1459,29 +1470,29 @@ emu_vtrigger(struct emu_sc_info *sc, str
  		ccis *= v->b16 ? 1 : 2;
  		sample = v->b16 ? 0x00000000 : 0x80808080;
  		for (i = 0; i < cs; i++)
 -			emu_wrptr(sc, v->vnum, CD0 + i, sample);
 -		emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, 0);
 -		emu_wrptr(sc, v->vnum, CCR_READADDRESS, cra);
 -		emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, ccis);
 -
 -		emu_wrptr(sc, v->vnum, IFATN, 0xff00);
 -		emu_wrptr(sc, v->vnum, VTFT, 0xffffffff);
 -		emu_wrptr(sc, v->vnum, CVCF, 0xffffffff);
 -		emu_wrptr(sc, v->vnum, DCYSUSV, 0x00007f7f);
 +			emu_wrptr(sc, v->vnum, EMU_CHAN_CD0 + i, sample);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_READADDRESS, cra);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, ccis);
 +
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xff00);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0xffffffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0xffffffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSV, 0x00007f7f);
  		emu_vstop(sc, v->vnum, 0);
  
  		pitch_target = emu_rate_to_linearpitch(v->speed);
  		initial_pitch = emu_rate_to_pitch(v->speed) >> 8;
 -		emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, pitch_target);
 -		emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, pitch_target);
 -		emu_wrptr(sc, v->vnum, IP, initial_pitch);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, pitch_target);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, pitch_target);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_IP, initial_pitch);
  	} else {
 -		emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, 0);
 -		emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, 0);
 -		emu_wrptr(sc, v->vnum, IFATN, 0xffff);
 -		emu_wrptr(sc, v->vnum, VTFT, 0x0000ffff);
 -		emu_wrptr(sc, v->vnum, CVCF, 0x0000ffff);
 -		emu_wrptr(sc, v->vnum, IP, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0x0000ffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0x0000ffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_IP, 0);
  		emu_vstop(sc, v->vnum, 1);
  	}
  	if ((v->stereo) && (v->slave != NULL))
 @@ -1494,7 +1505,7 @@ emu_vpos(struct emu_sc_info *sc, struct 
  	int s, ptr;
  
  	s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0);
 -	ptr = (emu_rdptr(sc, v->vnum, CCCA_CURRADDR) - (v->start >> s)) << s;
 +	ptr = (emu_rdptr(sc, v->vnum, EMU_CHAN_CCCA_CURRADDR) - (v->start >> s)) << s;
  	return (ptr & ~0x0000001f);
  }
  
 @@ -1694,9 +1705,9 @@ emu_initefx(struct emu_sc_info *sc)
  
  	/* stop DSP */
  	if (sc->is_emu10k1) {
 -		emu_wrptr(sc, 0, DBG, EMU10K1_DBG_SINGLE_STEP);
 +		emu_wrptr(sc, 0, EMU_DBG, EMU_DBG_SINGLE_STEP);
  	} else {
 -		emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP);
 +		emu_wrptr(sc, 0, EMU_A_DBG, EMU_A_DBG_SINGLE_STEP);
  	}
  
  	/* code size is in instructions */
 @@ -2162,9 +2173,9 @@ emu_initefx(struct emu_sc_info *sc)
  
  	/* start DSP */
  	if (sc->is_emu10k1) {
 -		emu_wrptr(sc, 0, DBG, 0);
 +		emu_wrptr(sc, 0, EMU_DBG, 0);
  	} else {
 -		emu_wrptr(sc, 0, A_DBG, 0);
 +		emu_wrptr(sc, 0, EMU_A_DBG, 0);
  	}
  }
  
 @@ -2450,24 +2461,24 @@ emumix_set_mode(struct emu_sc_info *sc, 
  		return;
  	}
  
 -	hcfg = HCFG_AUDIOENABLE | HCFG_AUTOMUTE;
 +	hcfg = EMU_HCFG_AUDIOENABLE | EMU_HCFG_AUTOMUTE;
  	a_iocfg = 0;
  
  	if (sc->rev >= 6)
 -		hcfg |= HCFG_JOYENABLE;
 +		hcfg |= EMU_HCFG_JOYENABLE;
  
  	if (sc->is_emu10k1)
 -		hcfg |= HCFG_LOCKTANKCACHE_MASK;
 +		hcfg |= EMU_HCFG_LOCKTANKCACHE_MASK;
  	else
 -		hcfg |= HCFG_CODECFORMAT_I2S | HCFG_JOYENABLE;
 +		hcfg |= EMU_HCFG_CODECFMT_I2S | EMU_HCFG_JOYENABLE;
  
  
  	if (mode == MODE_DIGITAL) {
  		if (sc->broken_digital) {
  			device_printf(sc->dev, "Digital mode is reported as broken on this card.\n");
  		}
 -		a_iocfg |= A_IOCFG_ENABLE_DIGITAL;
 -		hcfg |= HCFG_GPOUT0;
 +		a_iocfg |= EMU_A_IOCFG_GPOUT1;
 +		hcfg |= EMU_HCFG_GPOUT0;
  	}
  
  	if (mode == MODE_ANALOG)
 @@ -2478,12 +2489,12 @@ emumix_set_mode(struct emu_sc_info *sc, 
  
  	if ((sc->is_ca0102) || (sc->is_ca0108))
  		/*
 -		 * Setting A_IOCFG_DISABLE_ANALOG will do opposite things
 +		 * Setting EMU_A_IOCFG_DISABLE_ANALOG will do opposite things
  		 * on diffrerent cards.
  		 * "don't disable analog outs" on Audigy 2 (ca0102/ca0108)
  		 * "disable analog outs" on Audigy (emu10k2)
  		 */
 -		a_iocfg |= A_IOCFG_DISABLE_ANALOG;
 +		a_iocfg |= EMU_A_IOCFG_DISABLE_ANALOG;
  
  	if (sc->is_ca0108)
  		a_iocfg |= 0x20; /* XXX */
 @@ -2492,12 +2503,12 @@ emumix_set_mode(struct emu_sc_info *sc, 
  	if (mode == MODE_DIGITAL)
  		emumix_set_gpr(sc, sc->mute_gpr[ANALOGMUTE], 1);
  
 -	emu_wr(sc, HCFG, hcfg, 4);
 +	emu_wr(sc, EMU_HCFG, hcfg, 4);
  
  	if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
 -		tmp = emu_rd(sc, A_IOCFG, 2);
 +		tmp = emu_rd(sc, EMU_A_IOCFG, 2);
  		tmp = a_iocfg;
 -		emu_wr(sc, A_IOCFG, tmp, 2);
 +		emu_wr(sc, EMU_A_IOCFG, tmp, 2);
  	}
  
  	/* Unmute if we have changed mode to analog. */
 @@ -2523,16 +2534,16 @@ emumix_set_spdif_mode(struct emu_sc_info
  		return;
  	}
  
 -	spcs = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
 -	    SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
 -	    SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
 -	    SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
 +	spcs = EMU_SPCS_CLKACCY_1000PPM | EMU_SPCS_SAMPLERATE_48 |
 +	    EMU_SPCS_CHANNELNUM_LEFT | EMU_SPCS_SOURCENUM_UNSPEC |
 +	    EMU_SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
 +	    EMU_SPCS_EMPHASIS_NONE | EMU_SPCS_COPYRIGHT;
  
  	mode = SPDIF_MODE_PCM;
  
 -	emu_wrptr(sc, 0, SPCS0, spcs);
 -	emu_wrptr(sc, 0, SPCS1, spcs);
 -	emu_wrptr(sc, 0, SPCS2, spcs);
 +	emu_wrptr(sc, 0, EMU_SPCS0, spcs);
 +	emu_wrptr(sc, 0, EMU_SPCS1, spcs);
 +	emu_wrptr(sc, 0, EMU_SPCS2, spcs);
  }
  
  #define	L2L_POINTS	10
 @@ -2635,8 +2646,8 @@ emu_cardbus_init(struct emu_sc_info *sc)
  {
  
  	/*
 -	 * XXX May not need this if we have IPR3 handler.
 -	 * Is it a real init calls, or IPR3 interrupt acknowledgments?
 +	 * XXX May not need this if we have EMU_IPR3 handler.
 +	 * Is it a real init calls, or EMU_IPR3 interrupt acknowledgments?
  	 * Looks much like "(data << 16) | register".
  	 */
  	emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0000);
 @@ -2660,42 +2671,42 @@ emu_init(struct emu_sc_info *sc)
  	int i;
  
  	/* disable audio and lock cache */
 -	emu_wr(sc, HCFG, HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, 4);
 +	emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4);
  
  	/* reset recording buffers */
 -	emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, MICBA, 0);
 -	emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, FXBA, 0);
 -	emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, ADCBA, 0);
 +	emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_MICBA, 0);
 +	emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_FXBA, 0);
 +	emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_ADCBA, 0);
  
  	/* disable channel interrupt */
 -	emu_wr(sc, INTE, INTE_INTERVALTIMERENB | INTE_SAMPLERATETRACKER | INTE_PCIERRORENABLE, 4);
 -	emu_wrptr(sc, 0, CLIEL, 0);
 -	emu_wrptr(sc, 0, CLIEH, 0);
 -	emu_wrptr(sc, 0, SOLEL, 0);
 -	emu_wrptr(sc, 0, SOLEH, 0);
 +	emu_wr(sc, EMU_INTE, EMU_INTE_INTERTIMERENB | EMU_INTE_SAMPLERATER | EMU_INTE_PCIERRENABLE, 4);
 +	emu_wrptr(sc, 0, EMU_CLIEL, 0);
 +	emu_wrptr(sc, 0, EMU_CLIEH, 0);
 +	emu_wrptr(sc, 0, EMU_SOLEL, 0);
 +	emu_wrptr(sc, 0, EMU_SOLEH, 0);
  
  	/* disable P16V and S/PDIF interrupts */
  	if ((sc->is_ca0102) || (sc->is_ca0108))
 -		emu_wr(sc, INTE2, 0, 4);
 +		emu_wr(sc, EMU_INTE2, 0, 4);
  
  	if (sc->is_ca0102)
 -		emu_wr(sc, INTE3, 0, 4);
 +		emu_wr(sc, EMU_INTE3, 0, 4);
  
  	/* init phys inputs and outputs */
  	ac97slot = 0;
  	if (sc->has_51)
 -		ac97slot = AC97SLOT_CNTR | AC97SLOT_LFE;
 +		ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE;
  	if (sc->has_71)
 -		ac97slot = AC97SLOT_CNTR | AC97SLOT_LFE | AC97SLOT_REAR_LEFT | AC97SLOT_REAR_RIGHT;
 +		ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE | EMU_AC97SLOT_REAR_LEFT | EMU_AC97SLOT_REAR_RIGHT;
  	if (sc->is_emu10k2)
  		ac97slot |= 0x40;
 -	emu_wrptr(sc, 0, AC97SLOT, ac97slot);
 +	emu_wrptr(sc, 0, EMU_AC97SLOT, ac97slot);
  
  	if (sc->is_emu10k2)	/* XXX for later cards? */
 -		emu_wrptr(sc, 0, SPBYPASS, 0xf00);	/* What will happen if
 +		emu_wrptr(sc, 0, EMU_SPBYPASS, 0xf00);	/* What will happen if
  							 * we write 1 here? */
  
  	if (bus_dma_tag_create( /* parent */ bus_get_dma_tag(sc->dev),
 @@ -2729,61 +2740,61 @@ emu_init(struct emu_sc_info *sc)
  		sc->mem.ptb_pages[i] = tmp | i;
  
  	for (ch = 0; ch < NUM_G; ch++) {
 -		emu_wrptr(sc, ch, MAPA, tmp | MAP_PTI_MASK);
 -		emu_wrptr(sc, ch, MAPB, tmp | MAP_PTI_MASK);
 +		emu_wrptr(sc, ch, EMU_CHAN_MAPA, tmp | EMU_CHAN_MAP_PTI_MASK);
 +		emu_wrptr(sc, ch, EMU_CHAN_MAPB, tmp | EMU_CHAN_MAP_PTI_MASK);
 
 *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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State-Changed-From-To: patched->closed 
State-Changed-By: pfg 
State-Changed-When: Fri Feb 3 23:04:42 UTC 2012 
State-Changed-Why:  
Committed and MFC to 9 and 8 

http://www.freebsd.org/cgi/query-pr.cgi?pr=153901 

From: dfilter@FreeBSD.ORG (dfilter service)
To: bug-followup@FreeBSD.org
Cc:  
Subject: Re: kern/153901: commit references a PR
Date: Fri,  3 Feb 2012 23:00:53 +0000 (UTC)

 Author: pfg
 Date: Fri Feb  3 23:00:28 2012
 New Revision: 230965
 URL: http://svn.freebsd.org/changeset/base/230965
 
 Log:
   MFC:	 r229981, r230898
   
   Replace a GPL'd header in the emu10kx snd driver code.
   
   This uses the emuxkireg.h already used in the emu10k1
   snd driver. Special thanks go to Alexander Motin as
   he was able to find some errors and reverse engineer
   some wrong values in the emuxkireg header.
   
   While here also merge some cleanups to the module Makefile.
   
   PR:		153901
   Obtained from:	NetBSD
   Approved by:	core (mentor implicit)
 
 Deleted:
   stable/8/sys/gnu/dev/sound/pci/emu10k1-alsa.h
   stable/8/sys/gnu/dev/sound/pci/p16v-alsa.h
   stable/8/sys/gnu/dev/sound/pci/p17v-alsa.h
 Modified:
   stable/8/sys/conf/files
   stable/8/sys/dev/sound/pci/emu10kx-midi.c
   stable/8/sys/dev/sound/pci/emu10kx-pcm.c
   stable/8/sys/dev/sound/pci/emu10kx.c
   stable/8/sys/dev/sound/pci/emu10kx.h
   stable/8/sys/dev/sound/pci/emuxkireg.h
   stable/8/sys/modules/sound/driver/emu10kx/Makefile
 Directory Properties:
   stable/8/sys/   (props changed)
   stable/8/sys/modules/sound/driver/emu10kx/   (props changed)
 
 Modified: stable/8/sys/conf/files
 ==============================================================================
 --- stable/8/sys/conf/files	Fri Feb  3 22:39:04 2012	(r230964)
 +++ stable/8/sys/conf/files	Fri Feb  3 23:00:28 2012	(r230965)
 @@ -50,21 +50,6 @@ aic79xx_reg_print.c	optional ahd pci				
  aic79xx_reg_print.o		optional ahd pci ahd_reg_pretty_print	   \
  	compile-with	"${NORMAL_C}"					   \
  	no-implicit-rule local
 -emu10k1-alsa%diked.h		optional snd_emu10kx	   \
 -	dependency	"$S/tools/sound/emu10k1-mkalsa.sh $S/gnu/dev/sound/pci/emu10k1-alsa.h" \
 -	compile-with	"CC='${CC}' AWK=${AWK} sh $S/tools/sound/emu10k1-mkalsa.sh $S/gnu/dev/sound/pci/emu10k1-alsa.h emu10k1-alsa%diked.h" \
 -	no-obj no-implicit-rule before-depend				   \
 -	clean		"emu10k1-alsa%diked.h"
 -p16v-alsa%diked.h		optional snd_emu10kx pci			   \
 -	dependency	"$S/tools/sound/emu10k1-mkalsa.sh $S/gnu/dev/sound/pci/p16v-alsa.h" \
 -	compile-with	"CC='${CC}' AWK=${AWK} sh $S/tools/sound/emu10k1-mkalsa.sh $S/gnu/dev/sound/pci/p16v-alsa.h p16v-alsa%diked.h" \
 -	no-obj no-implicit-rule before-depend				   \
 -	clean		"p16v-alsa%diked.h"
 -p17v-alsa%diked.h		optional snd_emu10kx pci			   \
 -	dependency	"$S/tools/sound/emu10k1-mkalsa.sh $S/gnu/dev/sound/pci/p17v-alsa.h" \
 -	compile-with	"CC='${CC}' AWK=${AWK} sh $S/tools/sound/emu10k1-mkalsa.sh $S/gnu/dev/sound/pci/p17v-alsa.h p17v-alsa%diked.h" \
 -	no-obj no-implicit-rule before-depend				   \
 -	clean		"p17v-alsa%diked.h"
  feeder_eq_gen.h			optional sound				   \
  	dependency	"$S/tools/sound/feeder_eq_mkfilter.awk"		   \
  	compile-with	"${AWK} -f $S/tools/sound/feeder_eq_mkfilter.awk -- ${FEEDER_EQ_PRESETS} > feeder_eq_gen.h" \
 @@ -1602,19 +1587,9 @@ dev/sound/pci/csa.c		optional snd_csa pc
  dev/sound/pci/csapcm.c		optional snd_csa pci
  dev/sound/pci/ds1.c		optional snd_ds1 pci
  dev/sound/pci/emu10k1.c		optional snd_emu10k1 pci
 -dev/sound/pci/emu10kx.c		optional snd_emu10kx pci \
 -	dependency "emu10k1-alsa%diked.h" \
 -	dependency "p16v-alsa%diked.h" \
 -	dependency "p17v-alsa%diked.h" \
 -	warning "kernel contains GPL contaminated emu10kx headers"
 -dev/sound/pci/emu10kx-pcm.c	optional snd_emu10kx pci \
 -	dependency "emu10k1-alsa%diked.h" \
 -	dependency "p16v-alsa%diked.h" \
 -	dependency "p17v-alsa%diked.h" \
 -	warning "kernel contains GPL contaminated emu10kx headers"
 -dev/sound/pci/emu10kx-midi.c	optional snd_emu10kx pci \
 -	dependency "emu10k1-alsa%diked.h" \
 -	warning "kernel contains GPL contaminated emu10kx headers"
 +dev/sound/pci/emu10kx.c		optional snd_emu10kx pci
 +dev/sound/pci/emu10kx-pcm.c	optional snd_emu10kx pci
 +dev/sound/pci/emu10kx-midi.c	optional snd_emu10kx pci
  dev/sound/pci/envy24.c		optional snd_envy24 pci
  dev/sound/pci/envy24ht.c	optional snd_envy24ht pci
  dev/sound/pci/es137x.c		optional snd_es137x pci
 
 Modified: stable/8/sys/dev/sound/pci/emu10kx-midi.c
 ==============================================================================
 --- stable/8/sys/dev/sound/pci/emu10kx-midi.c	Fri Feb  3 22:39:04 2012	(r230964)
 +++ stable/8/sys/dev/sound/pci/emu10kx-midi.c	Fri Feb  3 23:00:28 2012	(r230965)
 @@ -50,8 +50,8 @@
  #include <dev/sound/midi/mpu401.h>
  #include "mpufoi_if.h"
  
 +#include <dev/sound/pci/emuxkireg.h>
  #include <dev/sound/pci/emu10kx.h>
 -#include "emu10k1-alsa%diked.h"
  
  struct emu_midi_softc {
  	struct mtx	mtx;
 @@ -176,25 +176,25 @@ emu_midi_attach(device_t dev)
  	if (scp->is_emu10k1) {
  		/* SB Live! - only one MIDI device here */
  		inte_val = 0;
 -		/* inte_val |= INTE_MIDITXENABLE;*/
 -		inte_val |= INTE_MIDIRXENABLE;
 -		ipr_val = IPR_MIDITRANSBUFEMPTY;
 -		ipr_val |= IPR_MIDIRECVBUFEMPTY;
 +		/* inte_val |= EMU_INTE_MIDITXENABLE;*/
 +		inte_val |= EMU_INTE_MIDIRXENABLE;
 +		ipr_val = EMU_IPR_MIDITRANSBUFE;
 +		ipr_val |= EMU_IPR_MIDIRECVBUFE;
  	} else {
 -		if (scp->port == A_MUDATA1) {
 +		if (scp->port == EMU_A_MUDATA1) {
  			/* EXTERNAL MIDI (AudigyDrive) */
  			inte_val = 0;
 -			/* inte_val |= A_INTE_MIDITXENABLE1;*/
 -			inte_val |= INTE_MIDIRXENABLE;
 -			ipr_val = IPR_MIDITRANSBUFEMPTY;
 -			ipr_val |= IPR_MIDIRECVBUFEMPTY;
 +			/* inte_val |= A_EMU_INTE_MIDITXENABLE1;*/
 +			inte_val |= EMU_INTE_MIDIRXENABLE;
 +			ipr_val = EMU_IPR_MIDITRANSBUFE;
 +			ipr_val |= EMU_IPR_MIDIRECVBUFE;
  		} else {
  			/* MIDI hw config port 2 */
  			inte_val = 0;
 -			/* inte_val |= A_INTE_MIDITXENABLE2;*/
 -			inte_val |= INTE_A_MIDIRXENABLE2;
 -			ipr_val = IPR_A_MIDITRANSBUFEMPTY2;
 -			ipr_val |= IPR_A_MIDIRECVBUFEMPTY2;
 +			/* inte_val |= A_EMU_INTE_MIDITXENABLE2;*/
 +			inte_val |= EMU_INTE_A_MIDIRXENABLE2;
 +			ipr_val = EMU_IPR_A_MIDITRANSBUFE2;
 +			ipr_val |= EMU_IPR_A_MIDIRECBUFE2;
  		}
  	}
  
 @@ -214,7 +214,7 @@ emu_midi_attach(device_t dev)
  	if (scp->is_emu10k1)
  		emu_enable_ir(scp->card);
  	else {
 -		if (scp->port == A_MUDATA1)
 +		if (scp->port == EMU_A_MUDATA1)
  			emu_enable_ir(scp->card);
  	}
  
 
 Modified: stable/8/sys/dev/sound/pci/emu10kx-pcm.c
 ==============================================================================
 --- stable/8/sys/dev/sound/pci/emu10kx-pcm.c	Fri Feb  3 22:39:04 2012	(r230964)
 +++ stable/8/sys/dev/sound/pci/emu10kx-pcm.c	Fri Feb  3 23:00:28 2012	(r230965)
 @@ -49,8 +49,8 @@
  
  #include "mixer_if.h"
  
 +#include <dev/sound/pci/emuxkireg.h>
  #include <dev/sound/pci/emu10kx.h>
 -#include "emu10k1-alsa%diked.h"
  
  struct emu_pcm_pchinfo {
  	int		spd;
 @@ -555,8 +555,8 @@ emu_ac97_read_emulation(struct emu_pcm_i
  		break;
  	}
  
 -	emu_wr(sc->card, AC97ADDRESS, regno, 1);
 -	tmp = emu_rd(sc->card, AC97DATA, 2);
 +	emu_wr(sc->card, EMU_AC97ADDR, regno, 1);
 +	tmp = emu_rd(sc->card, EMU_AC97DATA, 2);
  
  	if (use_ac97)
  		emulated = tmp;
 @@ -621,8 +621,8 @@ emu_ac97_write_emulation(struct emu_pcm_
  		break;
  	}
  	if (write_ac97) {
 -		emu_wr(sc->card, AC97ADDRESS, regno, 1);
 -		emu_wr(sc->card, AC97DATA, data, 2);
 +		emu_wr(sc->card, EMU_AC97ADDR, regno, 1);
 +		emu_wr(sc->card, EMU_AC97DATA, data, 2);
  	}
  }
  
 @@ -658,8 +658,8 @@ emu_rdcd(kobj_t obj __unused, void *devi
  	struct emu_pcm_info *sc = (struct emu_pcm_info *)devinfo;
  
  	KASSERT(sc->card != NULL, ("emu_rdcd: no soundcard"));
 -	emu_wr(sc->card, AC97ADDRESS, regno, 1);
 -	rd = emu_rd(sc->card, AC97DATA, 2);
 +	emu_wr(sc->card, EMU_AC97ADDR, regno, 1);
 +	rd = emu_rd(sc->card, EMU_AC97DATA, 2);
  	return (rd);
  }
  
 @@ -669,8 +669,8 @@ emu_wrcd(kobj_t obj __unused, void *devi
  	struct emu_pcm_info *sc = (struct emu_pcm_info *)devinfo;
  
  	KASSERT(sc->card != NULL, ("emu_wrcd: no soundcard"));
 -	emu_wr(sc->card, AC97ADDRESS, regno, 1);
 -	emu_wr(sc->card, AC97DATA, data, 2);
 +	emu_wr(sc->card, EMU_AC97ADDR, regno, 1);
 +	emu_wr(sc->card, EMU_AC97DATA, data, 2);
  	return (0);
  }
  
 @@ -870,12 +870,12 @@ emurchan_init(kobj_t obj __unused, void 
  	ch->blksz = sc->bufsz / 2; /* We rise interrupt for half-full buffer */
  	ch->fmt = SND_FORMAT(AFMT_U8, 1, 0);
  	ch->spd = 8000;
 -	ch->idxreg = sc->is_emu10k1 ? ADCIDX : A_ADCIDX;
 -	ch->basereg = ADCBA;
 -	ch->sizereg = ADCBS;
 -	ch->setupreg = ADCCR;
 -	ch->irqmask = INTE_ADCBUFENABLE;
 -	ch->iprmask = IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL;
 +	ch->idxreg = sc->is_emu10k1 ? EMU_ADCIDX : EMU_A_ADCIDX;
 +	ch->basereg = EMU_ADCBA;
 +	ch->sizereg = EMU_ADCBS;
 +	ch->setupreg = EMU_ADCCR;
 +	ch->irqmask = EMU_INTE_ADCBUFENABLE;
 +	ch->iprmask = EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL;
  
  	if (sndbuf_alloc(ch->buffer, emu_gettag(sc->card), 0, sc->bufsz) != 0)
  		return (NULL);
 @@ -953,22 +953,22 @@ emurchan_trigger(kobj_t obj __unused, vo
  
  	switch (sc->bufsz) {
  	case 4096:
 -		sz = ADCBS_BUFSIZE_4096;
 +		sz = EMU_RECBS_BUFSIZE_4096;
  		break;
  	case 8192:
 -		sz = ADCBS_BUFSIZE_8192;
 +		sz = EMU_RECBS_BUFSIZE_8192;
  		break;
  	case 16384:
 -		sz = ADCBS_BUFSIZE_16384;
 +		sz = EMU_RECBS_BUFSIZE_16384;
  		break;
  	case 32768:
 -		sz = ADCBS_BUFSIZE_32768;
 +		sz = EMU_RECBS_BUFSIZE_32768;
  		break;
  	case 65536:
 -		sz = ADCBS_BUFSIZE_65536;
 +		sz = EMU_RECBS_BUFSIZE_65536;
  		break;
  	default:
 -		sz = ADCBS_BUFSIZE_4096;
 +		sz = EMU_RECBS_BUFSIZE_4096;
  	}
  
  	snd_mtxlock(sc->lock);
 @@ -976,9 +976,9 @@ emurchan_trigger(kobj_t obj __unused, vo
  	case PCMTRIG_START:
  		ch->run = 1;
  		emu_wrptr(sc->card, 0, ch->sizereg, sz);
 -		val = sc->is_emu10k1 ? ADCCR_LCHANENABLE : A_ADCCR_LCHANENABLE;
 +		val = sc->is_emu10k1 ? EMU_ADCCR_LCHANENABLE : EMU_A_ADCCR_LCHANENABLE;
  		if (AFMT_CHANNEL(ch->fmt) > 1)
 -			val |= sc->is_emu10k1 ? ADCCR_RCHANENABLE : A_ADCCR_RCHANENABLE;
 +			val |= sc->is_emu10k1 ? EMU_ADCCR_RCHANENABLE : EMU_A_ADCCR_RCHANENABLE;
  		val |= sc->is_emu10k1 ? emu_k1_recval(ch->spd) : emu_k2_recval(ch->spd);
  		emu_wrptr(sc->card, 0, ch->setupreg, 0);
  		emu_wrptr(sc->card, 0, ch->setupreg, val);
 @@ -1049,11 +1049,11 @@ emufxrchan_init(kobj_t obj __unused, voi
  	ch = &(sc->rch_efx);
  	ch->fmt = SND_FORMAT(AFMT_S16_LE, 1, 0);
  	ch->spd = sc->is_emu10k1 ? 48000*32 : 48000 * 64;
 -	ch->idxreg = FXIDX;
 -	ch->basereg = FXBA;
 -	ch->sizereg = FXBS;
 -	ch->irqmask = INTE_EFXBUFENABLE;
 -	ch->iprmask = IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL;
 +	ch->idxreg = EMU_FXIDX;
 +	ch->basereg = EMU_FXBA;
 +	ch->sizereg = EMU_FXBS;
 +	ch->irqmask = EMU_INTE_EFXBUFENABLE;
 +	ch->iprmask = EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL;
  	ch->buffer = b;
  	ch->pcm = sc;
  	ch->channel = c;
 @@ -1113,22 +1113,22 @@ emufxrchan_trigger(kobj_t obj __unused, 
  
  	switch (sc->bufsz) {
  	case 4096:
 -		sz = ADCBS_BUFSIZE_4096;
 +		sz = EMU_RECBS_BUFSIZE_4096;
  		break;
  	case 8192:
 -		sz = ADCBS_BUFSIZE_8192;
 +		sz = EMU_RECBS_BUFSIZE_8192;
  		break;
  	case 16384:
 -		sz = ADCBS_BUFSIZE_16384;
 +		sz = EMU_RECBS_BUFSIZE_16384;
  		break;
  	case 32768:
 -		sz = ADCBS_BUFSIZE_32768;
 +		sz = EMU_RECBS_BUFSIZE_32768;
  		break;
  	case 65536:
 -		sz = ADCBS_BUFSIZE_65536;
 +		sz = EMU_RECBS_BUFSIZE_65536;
  		break;
  	default:
 -		sz = ADCBS_BUFSIZE_4096;
 +		sz = EMU_RECBS_BUFSIZE_4096;
  	}
  
  	snd_mtxlock(sc->lock);
 @@ -1140,14 +1140,14 @@ emufxrchan_trigger(kobj_t obj __unused, 
  		/*
  		 * SB Live! is limited to 32 mono channels. Audigy
  		 * has 64 mono channels. Channels are enabled
 -		 * by setting a bit in A_FXWC[1|2] registers.
 +		 * by setting a bit in EMU_A_FXWC[1|2] registers.
  		 */
  		/* XXX there is no way to demultiplex this streams for now */
  		if (sc->is_emu10k1) {
 -			emu_wrptr(sc->card, 0, FXWC, 0xffffffff);
 +			emu_wrptr(sc->card, 0, EMU_FXWC, 0xffffffff);
  		} else {
 -			emu_wrptr(sc->card, 0, A_FXWC1, 0xffffffff);
 -			emu_wrptr(sc->card, 0, A_FXWC2, 0xffffffff);
 +			emu_wrptr(sc->card, 0, EMU_A_FXWC1, 0xffffffff);
 +			emu_wrptr(sc->card, 0, EMU_A_FXWC2, 0xffffffff);
  		}
  		break;
  	case PCMTRIG_STOP:
 @@ -1155,10 +1155,10 @@ emufxrchan_trigger(kobj_t obj __unused, 
  	case PCMTRIG_ABORT:
  		ch->run = 0;
  		if (sc->is_emu10k1) {
 -			emu_wrptr(sc->card, 0, FXWC, 0x0);
 +			emu_wrptr(sc->card, 0, EMU_FXWC, 0x0);
  		} else {
 -			emu_wrptr(sc->card, 0, A_FXWC1, 0x0);
 -			emu_wrptr(sc->card, 0, A_FXWC2, 0x0);
 +			emu_wrptr(sc->card, 0, EMU_A_FXWC1, 0x0);
 +			emu_wrptr(sc->card, 0, EMU_A_FXWC2, 0x0);
  		}
  		emu_wrptr(sc->card, 0, ch->sizereg, 0);
  		(void)emu_intr_unregister(sc->card, ch->ihandle);
 @@ -1238,8 +1238,8 @@ emu_pcm_intr(void *pcm, uint32_t stat)
  
  	snd_mtxlock(sc->lock);
  	
 -	if (stat & IPR_INTERVALTIMER) {
 -		ack |= IPR_INTERVALTIMER;
 +	if (stat & EMU_IPR_INTERVALTIMER) {
 +		ack |= EMU_IPR_INTERVALTIMER;
  		for (i = 0; i < MAX_CHANNELS; i++)
  			if (sc->pch[i].channel) {
  				if (sc->pch[i].run == 1) {
 @@ -1262,8 +1262,8 @@ emu_pcm_intr(void *pcm, uint32_t stat)
  	}
  
  
 -	if (stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) {
 -		ack |= stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL);
 +	if (stat & (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL)) {
 +		ack |= stat & (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL);
  		if (sc->rch_adc.channel) {
  			snd_mtxunlock(sc->lock);
  			chn_intr(sc->rch_adc.channel);
 @@ -1271,8 +1271,8 @@ emu_pcm_intr(void *pcm, uint32_t stat)
  		}
  	}
  
 -	if (stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) {
 -		ack |= stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL);
 +	if (stat & (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL)) {
 +		ack |= stat & (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL);
  		if (sc->rch_efx.channel) {
  			snd_mtxunlock(sc->lock);
  			chn_intr(sc->rch_efx.channel);
 @@ -1450,8 +1450,8 @@ emu_pcm_attach(device_t dev)
  		goto bad;
  	}
  
 -	inte = INTE_INTERVALTIMERENB;
 -	ipr = IPR_INTERVALTIMER; /* Used by playback & ADC */
 +	inte = EMU_INTE_INTERTIMERENB;
 +	ipr = EMU_IPR_INTERVALTIMER; /* Used by playback & ADC */
  	sc->ihandle = emu_intr_register(sc->card, inte, ipr, &emu_pcm_intr, sc);
  
  	if (emu_pcm_init(sc) == -1) {
 
 Modified: stable/8/sys/dev/sound/pci/emu10kx.c
 ==============================================================================
 --- stable/8/sys/dev/sound/pci/emu10kx.c	Fri Feb  3 22:39:04 2012	(r230964)
 +++ stable/8/sys/dev/sound/pci/emu10kx.c	Fri Feb  3 23:00:28 2012	(r230965)
 @@ -53,6 +53,7 @@
  #include <dev/sound/pcm/sound.h>
  #include <dev/sound/pcm/ac97.h>
  
 +#include <dev/sound/pci/emuxkireg.h>
  #include <dev/sound/pci/emu10kx.h>
  
  /* hw flags */
 @@ -181,7 +182,7 @@
  #define	A_IN_AUX2_R	0x0d
  #define	A_IN_AUX2	A_IN_AUX2_L
  
 -/* Audigiy Outputs */
 +/* Audigy Outputs */
  #define	A_OUT_D_FRONT_L	0x00
  #define	A_OUT_D_FRONT_R	0x01
  #define	A_OUT_D_FRONT	A_OUT_D_FRONT_L
 @@ -217,9 +218,19 @@
  #define	A_OUT_ADC_REC_R	0x17
  #define	A_OUT_ADC_REC	A_OUT_ADC_REC_L
  
 -#include "emu10k1-alsa%diked.h"
 -#include "p16v-alsa%diked.h"
 -#include "p17v-alsa%diked.h"
 +#define EMU_DATA2	0x24
 +#define EMU_IPR2	0x28
 +#define EMU_INTE2	0x2c
 +#define EMU_IPR3	0x38
 +#define EMU_INTE3	0x3c
 +
 +#define EMU_A2_SRCSel		0x60
 +#define EMU_A2_SRCMULTI_ENABLE	0x6e
 +
 +#define EMU_A_I2S_CAPTURE_96000	0x00000400
 +
 +#define EMU_A2_MIXER_I2S_ENABLE           0x7B
 +#define EMU_A2_MIXER_SPDIF_ENABLE         0x7A
  
  #define	C_FRONT_L	0
  #define	C_FRONT_R	1
 @@ -630,7 +641,7 @@ emu_wr_nolock(struct emu_sc_info *sc, un
  	}
  }
  /*
 - * PTR / DATA interface. Access to EMU10Kx is made
 + * EMU_PTR / EMU_DATA interface. Access to EMU10Kx is made
   * via (channel, register) pair. Some registers are channel-specific,
   * some not.
   */
 @@ -639,11 +650,11 @@ emu_rdptr(struct emu_sc_info *sc, unsign
  {
  	uint32_t ptr, val, mask, size, offset;
  
 -	ptr = ((reg << 16) & sc->address_mask) | (chn & PTR_CHANNELNUM_MASK);
 +	ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK);
  
  	EMU_RWLOCK();
 -	emu_wr_nolock(sc, PTR, ptr, 4);
 -	val = emu_rd_nolock(sc, DATA, 4);
 +	emu_wr_nolock(sc, EMU_PTR, ptr, 4);
 +	val = emu_rd_nolock(sc, EMU_DATA, 4);
  	EMU_RWUNLOCK();
  
  	/*
 @@ -666,10 +677,10 @@ emu_wrptr(struct emu_sc_info *sc, unsign
  {
  	uint32_t ptr, mask, size, offset;
  
 -	ptr = ((reg << 16) & sc->address_mask) | (chn & PTR_CHANNELNUM_MASK);
 +	ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK);
  
  	EMU_RWLOCK();
 -	emu_wr_nolock(sc, PTR, ptr, 4);
 +	emu_wr_nolock(sc, EMU_PTR, ptr, 4);
  	/*
  	 * XXX Another kind of magic encoding in register number. This can
  	 * give you side effect - it will read previous data from register
 @@ -681,13 +692,13 @@ emu_wrptr(struct emu_sc_info *sc, unsign
  		mask = ((1 << size) - 1) << offset;
  		data <<= offset;
  		data &= mask;
 -		data |= emu_rd_nolock(sc, DATA, 4) & ~mask;
 +		data |= emu_rd_nolock(sc, EMU_DATA, 4) & ~mask;
  	}
 -	emu_wr_nolock(sc, DATA, data, 4);
 +	emu_wr_nolock(sc, EMU_DATA, data, 4);
  	EMU_RWUNLOCK();
  }
  /*
 - * PTR2 / DATA2 interface. Access to P16v is made
 + * EMU_A2_PTR / EMU_DATA2 interface. Access to P16v is made
   * via (channel, register) pair. Some registers are channel-specific,
   * some not. This interface is supported by CA0102 and CA0108 chips only.
   */
 @@ -698,8 +709,8 @@ emu_rd_p16vptr(struct emu_sc_info *sc, u
  
  	/* XXX separate lock? */
  	EMU_RWLOCK();
 -	emu_wr_nolock(sc, PTR2, (reg << 16) | chn, 4);
 -	val = emu_rd_nolock(sc, DATA2, 4);
 +	emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4);
 +	val = emu_rd_nolock(sc, EMU_DATA2, 4);
  
  	EMU_RWUNLOCK();
  
 @@ -711,8 +722,8 @@ emu_wr_p16vptr(struct emu_sc_info *sc, u
  {
  
  	EMU_RWLOCK();
 -	emu_wr_nolock(sc, PTR2, (reg << 16) | chn, 4);
 -	emu_wr_nolock(sc, DATA2, data, 4);
 +	emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4);
 +	emu_wr_nolock(sc, EMU_DATA2, data, 4);
  	EMU_RWUNLOCK();
  }
  /*
 @@ -737,13 +748,13 @@ emu_wr_cbptr(struct emu_sc_info *sc, uin
  
  /*
   * Direct hardware register access
 - * Assume that it is never used to access PTR-based registers and can run unlocked.
 + * Assume that it is never used to access EMU_PTR-based registers and can run unlocked.
   */
  void
  emu_wr(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size)
  {
 -	KASSERT(regno != PTR, ("emu_wr: attempt to write to PTR"));
 -	KASSERT(regno != PTR2, ("emu_wr: attempt to write to PTR2"));
 +	KASSERT(regno != EMU_PTR, ("emu_wr: attempt to write to EMU_PTR"));
 +	KASSERT(regno != EMU_A2_PTR, ("emu_wr: attempt to write to EMU_A2_PTR"));
  
  	emu_wr_nolock(sc, regno, data, size);
  }
 @@ -753,8 +764,8 @@ emu_rd(struct emu_sc_info *sc, unsigned 
  {
  	uint32_t rd;
  
 -	KASSERT(regno != DATA, ("emu_rd: attempt to read DATA"));
 -	KASSERT(regno != DATA2, ("emu_rd: attempt to read DATA2"));
 +	KASSERT(regno != EMU_DATA, ("emu_rd: attempt to read DATA"));
 +	KASSERT(regno != EMU_DATA2, ("emu_rd: attempt to read DATA2"));
  
  	rd = emu_rd_nolock(sc, regno, size);
  	return (rd);
 @@ -770,24 +781,24 @@ emu_enable_ir(struct emu_sc_info *sc)
  	uint32_t iocfg;
  
  	if (sc->is_emu10k2 || sc->is_ca0102) {
 -		iocfg = emu_rd_nolock(sc, A_IOCFG, 2);
 -		emu_wr_nolock(sc, A_IOCFG, iocfg | A_IOCFG_GPOUT2, 2);
 +		iocfg = emu_rd_nolock(sc, EMU_A_IOCFG, 2);
 +		emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT2, 2);
  		DELAY(500);
 -		emu_wr_nolock(sc, A_IOCFG, iocfg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, 2);
 +		emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1 | EMU_A_IOCFG_GPOUT2, 2);
  		DELAY(500);
 -		emu_wr_nolock(sc, A_IOCFG, iocfg | A_IOCFG_GPOUT1, 2);
 +		emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1, 2);
  		DELAY(100);
 -		emu_wr_nolock(sc, A_IOCFG, iocfg, 2);
 +		emu_wr_nolock(sc, EMU_A_IOCFG, iocfg, 2);
  		device_printf(sc->dev, "Audigy IR MIDI events enabled.\n");
  		sc->enable_ir = 1;
  	}
  	if (sc->is_emu10k1) {
 -		iocfg = emu_rd_nolock(sc, HCFG, 4);
 -		emu_wr_nolock(sc, HCFG, iocfg | HCFG_GPOUT2, 4);
 +		iocfg = emu_rd_nolock(sc, EMU_HCFG, 4);
 +		emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT2, 4);
  		DELAY(500);
 -		emu_wr_nolock(sc, HCFG, iocfg | HCFG_GPOUT1 | HCFG_GPOUT2, 4);
 +		emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT1 | EMU_HCFG_GPOUT2, 4);
  		DELAY(100);
 -		emu_wr_nolock(sc, HCFG, iocfg, 4);
 +		emu_wr_nolock(sc, EMU_HCFG, iocfg, 4);
  		device_printf(sc->dev, "SB Live! IR MIDI events enabled.\n");
  		sc->enable_ir = 1;
  	}
 @@ -835,7 +846,7 @@ emu_timer_set(struct emu_sc_info *sc, in
  			sc->timerinterval = sc->timer[i];
  
  	/* XXX */
 -	emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2);
 +	emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2);
  	mtx_unlock(&sc->lock);
  
  	return (timer);
 @@ -868,16 +879,16 @@ emu_timer_enable(struct emu_sc_info *sc,
  			ena_int = 1;
  	}
  
 -	emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2);
 +	emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2);
  
  	if (ena_int == 1) {
 -		x = emu_rd(sc, INTE, 4);
 -		x |= INTE_INTERVALTIMERENB;
 -		emu_wr(sc, INTE, x, 4);
 +		x = emu_rd(sc, EMU_INTE, 4);
 +		x |= EMU_INTE_INTERTIMERENB;
 +		emu_wr(sc, EMU_INTE, x, 4);
  	} else {
 -		x = emu_rd(sc, INTE, 4);
 -		x &= ~INTE_INTERVALTIMERENB;
 -		emu_wr(sc, INTE, x, 4);
 +		x = emu_rd(sc, EMU_INTE, 4);
 +		x &= ~EMU_INTE_INTERTIMERENB;
 +		emu_wr(sc, EMU_INTE, x, 4);
  	}
  	mtx_unlock(&sc->lock);
  	return (0);
 @@ -917,9 +928,9 @@ emu_intr_register(struct emu_sc_info *sc
  			sc->ihandler[i].intr_mask = intr_mask;
  			sc->ihandler[i].softc = isc;
  			sc->ihandler[i].irq_func = func;
 -			x = emu_rd(sc, INTE, 4);
 +			x = emu_rd(sc, EMU_INTE, 4);
  			x |= inte_mask;
 -			emu_wr(sc, INTE, x, 4);
 +			emu_wr(sc, EMU_INTE, x, 4);
  			mtx_unlock(&sc->lock);
  			if (sc->dbg_level > 1)
  				device_printf(sc->dev, "ihandle %d registered\n", i);
 @@ -946,7 +957,7 @@ emu_intr_unregister(struct emu_sc_info *
  		return (-1);
  	}
  
 -	x = emu_rd(sc, INTE, 4);
 +	x = emu_rd(sc, EMU_INTE, 4);
  	x &= ~sc->ihandler[hnumber].inte_mask;
  
  	sc->ihandler[hnumber].inte_mask = 0;
 @@ -954,12 +965,12 @@ emu_intr_unregister(struct emu_sc_info *
  	sc->ihandler[hnumber].softc = NULL;
  	sc->ihandler[hnumber].irq_func = NULL;
  
 -	/* other interrupt handlers may use this INTE value */
 +	/* other interrupt handlers may use this EMU_INTE value */
  	for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
  		if (sc->ihandler[i].inte_mask != 0)
  			x |= sc->ihandler[i].inte_mask;
  
 -	emu_wr(sc, INTE, x, 4);
 +	emu_wr(sc, EMU_INTE, x, 4);
  
  	mtx_unlock(&sc->lock);
  	return (hnumber);
 @@ -973,11 +984,11 @@ emu_intr(void *p)
  	int i;
  
  	for (;;) {
 -		stat = emu_rd(sc, IPR, 4);
 +		stat = emu_rd(sc, EMU_IPR, 4);
  		ack = 0;
  		if (stat == 0)
  			break;
 -		emu_wr(sc, IPR, stat, 4);
 +		emu_wr(sc, EMU_IPR, stat, 4);
  		for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) {
  			if ((((sc->ihandler[i].intr_mask) & stat) != 0) &&
  			    (((void *)sc->ihandler[i].irq_func) != NULL)) {
 @@ -993,13 +1004,13 @@ emu_intr(void *p)
  
  	if ((sc->is_ca0102) || (sc->is_ca0108))
  		for (;;) {
 -			stat = emu_rd(sc, IPR2, 4);
 +			stat = emu_rd(sc, EMU_IPR2, 4);
  			ack = 0;
  			if (stat == 0)
  				break;
 -			emu_wr(sc, IPR2, stat, 4);
 +			emu_wr(sc, EMU_IPR2, stat, 4);
  			if (sc->dbg_level > 1)
 -				device_printf(sc->dev, "IPR2: %08x\n", stat);
 +				device_printf(sc->dev, "EMU_IPR2: %08x\n", stat);
  
  			break;	/* to avoid infinite loop. shoud be removed
  				 * after completion of P16V interface. */
 @@ -1007,13 +1018,13 @@ emu_intr(void *p)
  
  	if (sc->is_ca0102)
  		for (;;) {
 -			stat = emu_rd(sc, IPR3, 4);
 +			stat = emu_rd(sc, EMU_IPR3, 4);
  			ack = 0;
  			if (stat == 0)
  				break;
 -			emu_wr(sc, IPR3, stat, 4);
 +			emu_wr(sc, EMU_IPR3, stat, 4);
  			if (sc->dbg_level > 1)
 -				device_printf(sc->dev, "IPR3: %08x\n", stat);
 +				device_printf(sc->dev, "EMU_IPR3: %08x\n", stat);
  
  			break;	/* to avoid infinite loop. should be removed
  				 * after completion of S/PDIF interface */
 @@ -1374,61 +1385,61 @@ emu_vwrite(struct emu_sc_info *sc, struc
  
  
  	if (v->stereo) {
 -		emu_wrptr(sc, v->vnum, CPF, CPF_STEREO_MASK);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, EMU_CHAN_CPF_STEREO_MASK);
  	} else {
 -		emu_wrptr(sc, v->vnum, CPF, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, 0);
  	}
  	val = v->stereo ? 28 : 30;
  	val *= v->b16 ? 1 : 2;
  	start = v->sa + val;
  
  	if (sc->is_emu10k1) {
 -		emu_wrptr(sc, v->vnum, FXRT, ((v->routing[3] << 12) |
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_FXRT, ((v->routing[3] << 12) |
  		    (v->routing[2] << 8) |
  		    (v->routing[1] << 4) |
  		    (v->routing[0] << 0)) << 16);
  	} else {
 -		emu_wrptr(sc, v->vnum, A_FXRT1, (v->routing[3] << 24) |
 +		emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT1, (v->routing[3] << 24) |
  		    (v->routing[2] << 16) |
  		    (v->routing[1] << 8) |
  		    (v->routing[0] << 0));
 -		emu_wrptr(sc, v->vnum, A_FXRT2, (v->routing[7] << 24) |
 +		emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT2, (v->routing[7] << 24) |
  		    (v->routing[6] << 16) |
  		    (v->routing[5] << 8) |
  		    (v->routing[4] << 0));
 -		emu_wrptr(sc, v->vnum, A_SENDAMOUNTS, (v->amounts[7] << 24) |
 +		emu_wrptr(sc, v->vnum, EMU_A_CHAN_SENDAMOUNTS, (v->amounts[7] << 24) |
  		    (v->amounts[6] << 26) |
  		    (v->amounts[5] << 8) |
  		    (v->amounts[4] << 0));
  	}
 -	emu_wrptr(sc, v->vnum, PTRX, (v->amounts[0] << 8) | (v->amounts[1] << 0));
 -	emu_wrptr(sc, v->vnum, DSL, v->ea | (v->amounts[3] << 24));
 -	emu_wrptr(sc, v->vnum, PSST, v->sa | (v->amounts[2] << 24));
 -
 -	emu_wrptr(sc, v->vnum, CCCA, start | (v->b16 ? 0 : CCCA_8BITSELECT));
 -	emu_wrptr(sc, v->vnum, Z1, 0);
 -	emu_wrptr(sc, v->vnum, Z2, 0);
 -
 -	silent_page = ((uint32_t) (sc->mem.silent_page_addr) << 1) | MAP_PTI_MASK;
 -	emu_wrptr(sc, v->vnum, MAPA, silent_page);
 -	emu_wrptr(sc, v->vnum, MAPB, silent_page);
 -
 -	emu_wrptr(sc, v->vnum, CVCF, CVCF_CURRENTFILTER_MASK);
 -	emu_wrptr(sc, v->vnum, VTFT, VTFT_FILTERTARGET_MASK);
 -	emu_wrptr(sc, v->vnum, ATKHLDM, 0);
 -	emu_wrptr(sc, v->vnum, DCYSUSM, DCYSUSM_DECAYTIME_MASK);
 -	emu_wrptr(sc, v->vnum, LFOVAL1, 0x8000);
 -	emu_wrptr(sc, v->vnum, LFOVAL2, 0x8000);
 -	emu_wrptr(sc, v->vnum, FMMOD, 0);
 -	emu_wrptr(sc, v->vnum, TREMFRQ, 0);
 -	emu_wrptr(sc, v->vnum, FM2FRQ2, 0);
 -	emu_wrptr(sc, v->vnum, ENVVAL, 0x8000);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX, (v->amounts[0] << 8) | (v->amounts[1] << 0));
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_DSL, v->ea | (v->amounts[3] << 24));
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_PSST, v->sa | (v->amounts[2] << 24));
 +
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_CCCA, start | (v->b16 ? 0 : EMU_CHAN_CCCA_8BITSELECT));
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_Z1, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_Z2, 0);
 +
 +	silent_page = ((uint32_t) (sc->mem.silent_page_addr) << 1) | EMU_CHAN_MAP_PTI_MASK;
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_MAPA, silent_page);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_MAPB, silent_page);
 +
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, EMU_CHAN_CVCF_CURRFILTER_MASK);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, EMU_CHAN_VTFT_FILTERTARGET_MASK);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDM, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSM, EMU_CHAN_DCYSUSM_DECAYTIME_MASK);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL1, 0x8000);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL2, 0x8000);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_FMMOD, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_TREMFRQ, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_FM2FRQ2, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVAL, 0x8000);
  
 -	emu_wrptr(sc, v->vnum, ATKHLDV, ATKHLDV_HOLDTIME_MASK | ATKHLDV_ATTACKTIME_MASK);
 -	emu_wrptr(sc, v->vnum, ENVVOL, 0x8000);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDV, EMU_CHAN_ATKHLDV_HOLDTIME_MASK | EMU_CHAN_ATKHLDV_ATTACKTIME_MASK);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVOL, 0x8000);
  
 -	emu_wrptr(sc, v->vnum, PEFE_FILTERAMOUNT, 0x7f);
 -	emu_wrptr(sc, v->vnum, PEFE_PITCHAMOUNT, 0);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_FILTERAMOUNT, 0x7f);
 +	emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_PITCHAMOUNT, 0);
  	if ((v->stereo) && (v->slave != NULL))
  		emu_vwrite(sc, v->slave);
  }
 @@ -1438,7 +1449,7 @@ emu_vstop(struct emu_sc_info *sc, char c
  {
  	int reg;
  
 -	reg = (channel & 0x20) ? SOLEH : SOLEL;
 +	reg = (channel & 0x20) ? EMU_SOLEH : EMU_SOLEL;
  	channel &= 0x1f;
  	reg |= 1 << 24;
  	reg |= channel << 16;
 @@ -1459,29 +1470,29 @@ emu_vtrigger(struct emu_sc_info *sc, str
  		ccis *= v->b16 ? 1 : 2;
  		sample = v->b16 ? 0x00000000 : 0x80808080;
  		for (i = 0; i < cs; i++)
 -			emu_wrptr(sc, v->vnum, CD0 + i, sample);
 -		emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, 0);
 -		emu_wrptr(sc, v->vnum, CCR_READADDRESS, cra);
 -		emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, ccis);
 -
 -		emu_wrptr(sc, v->vnum, IFATN, 0xff00);
 -		emu_wrptr(sc, v->vnum, VTFT, 0xffffffff);
 -		emu_wrptr(sc, v->vnum, CVCF, 0xffffffff);
 -		emu_wrptr(sc, v->vnum, DCYSUSV, 0x00007f7f);
 +			emu_wrptr(sc, v->vnum, EMU_CHAN_CD0 + i, sample);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_READADDRESS, cra);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, ccis);
 +
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xff00);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0xffffffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0xffffffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSV, 0x00007f7f);
  		emu_vstop(sc, v->vnum, 0);
  
  		pitch_target = emu_rate_to_linearpitch(v->speed);
  		initial_pitch = emu_rate_to_pitch(v->speed) >> 8;
 -		emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, pitch_target);
 -		emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, pitch_target);
 -		emu_wrptr(sc, v->vnum, IP, initial_pitch);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, pitch_target);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, pitch_target);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_IP, initial_pitch);
  	} else {
 -		emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, 0);
 -		emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, 0);
 -		emu_wrptr(sc, v->vnum, IFATN, 0xffff);
 -		emu_wrptr(sc, v->vnum, VTFT, 0x0000ffff);
 -		emu_wrptr(sc, v->vnum, CVCF, 0x0000ffff);
 -		emu_wrptr(sc, v->vnum, IP, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, 0);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0x0000ffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0x0000ffff);
 +		emu_wrptr(sc, v->vnum, EMU_CHAN_IP, 0);
  		emu_vstop(sc, v->vnum, 1);
  	}
  	if ((v->stereo) && (v->slave != NULL))
 @@ -1494,7 +1505,7 @@ emu_vpos(struct emu_sc_info *sc, struct 
  	int s, ptr;
  
  	s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0);
 -	ptr = (emu_rdptr(sc, v->vnum, CCCA_CURRADDR) - (v->start >> s)) << s;
 +	ptr = (emu_rdptr(sc, v->vnum, EMU_CHAN_CCCA_CURRADDR) - (v->start >> s)) << s;
  	return (ptr & ~0x0000001f);
  }
  
 @@ -1694,9 +1705,9 @@ emu_initefx(struct emu_sc_info *sc)
  
  	/* stop DSP */
  	if (sc->is_emu10k1) {
 -		emu_wrptr(sc, 0, DBG, EMU10K1_DBG_SINGLE_STEP);
 +		emu_wrptr(sc, 0, EMU_DBG, EMU_DBG_SINGLE_STEP);
  	} else {
 -		emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP);
 +		emu_wrptr(sc, 0, EMU_A_DBG, EMU_A_DBG_SINGLE_STEP);
  	}
  
  	/* code size is in instructions */
 @@ -2162,9 +2173,9 @@ emu_initefx(struct emu_sc_info *sc)
  
  	/* start DSP */
  	if (sc->is_emu10k1) {
 -		emu_wrptr(sc, 0, DBG, 0);
 +		emu_wrptr(sc, 0, EMU_DBG, 0);
  	} else {
 -		emu_wrptr(sc, 0, A_DBG, 0);
 +		emu_wrptr(sc, 0, EMU_A_DBG, 0);
  	}
  }
  
 @@ -2450,24 +2461,24 @@ emumix_set_mode(struct emu_sc_info *sc, 
  		return;
  	}
  
 -	hcfg = HCFG_AUDIOENABLE | HCFG_AUTOMUTE;
 +	hcfg = EMU_HCFG_AUDIOENABLE | EMU_HCFG_AUTOMUTE;
  	a_iocfg = 0;
  
  	if (sc->rev >= 6)
 -		hcfg |= HCFG_JOYENABLE;
 +		hcfg |= EMU_HCFG_JOYENABLE;
  
  	if (sc->is_emu10k1)
 -		hcfg |= HCFG_LOCKTANKCACHE_MASK;
 +		hcfg |= EMU_HCFG_LOCKTANKCACHE_MASK;
  	else
 -		hcfg |= HCFG_CODECFORMAT_I2S | HCFG_JOYENABLE;
 +		hcfg |= EMU_HCFG_CODECFMT_I2S | EMU_HCFG_JOYENABLE;
  
  
  	if (mode == MODE_DIGITAL) {
  		if (sc->broken_digital) {
  			device_printf(sc->dev, "Digital mode is reported as broken on this card.\n");
  		}
 -		a_iocfg |= A_IOCFG_ENABLE_DIGITAL;
 -		hcfg |= HCFG_GPOUT0;
 +		a_iocfg |= EMU_A_IOCFG_GPOUT1;
 +		hcfg |= EMU_HCFG_GPOUT0;
  	}
  
  	if (mode == MODE_ANALOG)
 @@ -2478,12 +2489,12 @@ emumix_set_mode(struct emu_sc_info *sc, 
  
  	if ((sc->is_ca0102) || (sc->is_ca0108))
  		/*
 -		 * Setting A_IOCFG_DISABLE_ANALOG will do opposite things
 +		 * Setting EMU_A_IOCFG_DISABLE_ANALOG will do opposite things
  		 * on diffrerent cards.
  		 * "don't disable analog outs" on Audigy 2 (ca0102/ca0108)
  		 * "disable analog outs" on Audigy (emu10k2)
  		 */
 -		a_iocfg |= A_IOCFG_DISABLE_ANALOG;
 +		a_iocfg |= EMU_A_IOCFG_DISABLE_ANALOG;
  
  	if (sc->is_ca0108)
  		a_iocfg |= 0x20; /* XXX */
 @@ -2492,12 +2503,12 @@ emumix_set_mode(struct emu_sc_info *sc, 
  	if (mode == MODE_DIGITAL)
  		emumix_set_gpr(sc, sc->mute_gpr[ANALOGMUTE], 1);
  
 -	emu_wr(sc, HCFG, hcfg, 4);
 +	emu_wr(sc, EMU_HCFG, hcfg, 4);
  
  	if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
 -		tmp = emu_rd(sc, A_IOCFG, 2);
 +		tmp = emu_rd(sc, EMU_A_IOCFG, 2);
  		tmp = a_iocfg;
 -		emu_wr(sc, A_IOCFG, tmp, 2);
 +		emu_wr(sc, EMU_A_IOCFG, tmp, 2);
  	}
  
  	/* Unmute if we have changed mode to analog. */
 @@ -2523,16 +2534,16 @@ emumix_set_spdif_mode(struct emu_sc_info
  		return;
  	}
  
 -	spcs = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
 -	    SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
 -	    SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
 -	    SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
 +	spcs = EMU_SPCS_CLKACCY_1000PPM | EMU_SPCS_SAMPLERATE_48 |
 +	    EMU_SPCS_CHANNELNUM_LEFT | EMU_SPCS_SOURCENUM_UNSPEC |
 +	    EMU_SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
 +	    EMU_SPCS_EMPHASIS_NONE | EMU_SPCS_COPYRIGHT;
  
  	mode = SPDIF_MODE_PCM;
  
 -	emu_wrptr(sc, 0, SPCS0, spcs);
 -	emu_wrptr(sc, 0, SPCS1, spcs);
 -	emu_wrptr(sc, 0, SPCS2, spcs);
 +	emu_wrptr(sc, 0, EMU_SPCS0, spcs);
 +	emu_wrptr(sc, 0, EMU_SPCS1, spcs);
 +	emu_wrptr(sc, 0, EMU_SPCS2, spcs);
  }
  
  #define	L2L_POINTS	10
 @@ -2635,8 +2646,8 @@ emu_cardbus_init(struct emu_sc_info *sc)
  {
  
  	/*
 -	 * XXX May not need this if we have IPR3 handler.
 -	 * Is it a real init calls, or IPR3 interrupt acknowledgments?
 +	 * XXX May not need this if we have EMU_IPR3 handler.
 +	 * Is it a real init calls, or EMU_IPR3 interrupt acknowledgments?
  	 * Looks much like "(data << 16) | register".
  	 */
  	emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0000);
 @@ -2660,42 +2671,42 @@ emu_init(struct emu_sc_info *sc)
  	int i;
  
  	/* disable audio and lock cache */
 -	emu_wr(sc, HCFG, HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, 4);
 +	emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4);
  
  	/* reset recording buffers */
 -	emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, MICBA, 0);
 -	emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, FXBA, 0);
 -	emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
 -	emu_wrptr(sc, 0, ADCBA, 0);
 +	emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_MICBA, 0);
 +	emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_FXBA, 0);
 +	emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE);
 +	emu_wrptr(sc, 0, EMU_ADCBA, 0);
  
  	/* disable channel interrupt */
 -	emu_wr(sc, INTE, INTE_INTERVALTIMERENB | INTE_SAMPLERATETRACKER | INTE_PCIERRORENABLE, 4);
 -	emu_wrptr(sc, 0, CLIEL, 0);
 -	emu_wrptr(sc, 0, CLIEH, 0);
 -	emu_wrptr(sc, 0, SOLEL, 0);
 -	emu_wrptr(sc, 0, SOLEH, 0);
 +	emu_wr(sc, EMU_INTE, EMU_INTE_INTERTIMERENB | EMU_INTE_SAMPLERATER | EMU_INTE_PCIERRENABLE, 4);
 +	emu_wrptr(sc, 0, EMU_CLIEL, 0);
 +	emu_wrptr(sc, 0, EMU_CLIEH, 0);
 +	emu_wrptr(sc, 0, EMU_SOLEL, 0);
 +	emu_wrptr(sc, 0, EMU_SOLEH, 0);
  
  	/* disable P16V and S/PDIF interrupts */
  	if ((sc->is_ca0102) || (sc->is_ca0108))
 -		emu_wr(sc, INTE2, 0, 4);
 +		emu_wr(sc, EMU_INTE2, 0, 4);
  
  	if (sc->is_ca0102)
 -		emu_wr(sc, INTE3, 0, 4);
 +		emu_wr(sc, EMU_INTE3, 0, 4);
  
  	/* init phys inputs and outputs */
  	ac97slot = 0;
  	if (sc->has_51)
 -		ac97slot = AC97SLOT_CNTR | AC97SLOT_LFE;
 +		ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE;
  	if (sc->has_71)
 -		ac97slot = AC97SLOT_CNTR | AC97SLOT_LFE | AC97SLOT_REAR_LEFT | AC97SLOT_REAR_RIGHT;
 +		ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE | EMU_AC97SLOT_REAR_LEFT | EMU_AC97SLOT_REAR_RIGHT;
  	if (sc->is_emu10k2)
  		ac97slot |= 0x40;
 -	emu_wrptr(sc, 0, AC97SLOT, ac97slot);
 +	emu_wrptr(sc, 0, EMU_AC97SLOT, ac97slot);
  
  	if (sc->is_emu10k2)	/* XXX for later cards? */
 -		emu_wrptr(sc, 0, SPBYPASS, 0xf00);	/* What will happen if
 +		emu_wrptr(sc, 0, EMU_SPBYPASS, 0xf00);	/* What will happen if
  							 * we write 1 here? */
  
  	if (bus_dma_tag_create( /* parent */ bus_get_dma_tag(sc->dev),
 @@ -2729,61 +2740,61 @@ emu_init(struct emu_sc_info *sc)
  		sc->mem.ptb_pages[i] = tmp | i;
  
  	for (ch = 0; ch < NUM_G; ch++) {
 -		emu_wrptr(sc, ch, MAPA, tmp | MAP_PTI_MASK);
 -		emu_wrptr(sc, ch, MAPB, tmp | MAP_PTI_MASK);
 +		emu_wrptr(sc, ch, EMU_CHAN_MAPA, tmp | EMU_CHAN_MAP_PTI_MASK);
 +		emu_wrptr(sc, ch, EMU_CHAN_MAPB, tmp | EMU_CHAN_MAP_PTI_MASK);
  	}
 -	emu_wrptr(sc, 0, PTB, (sc->mem.ptb_pages_addr));
 -	emu_wrptr(sc, 0, TCB, 0);	/* taken from original driver */
 -	emu_wrptr(sc, 0, TCBS, 0);	/* taken from original driver */
 +	emu_wrptr(sc, 0, EMU_PTB, (sc->mem.ptb_pages_addr));
 +	emu_wrptr(sc, 0, EMU_TCB, 0);	/* taken from original driver */
 +	emu_wrptr(sc, 0, EMU_TCBS, 0);	/* taken from original driver */
 
 *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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