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Message-Id: <201008030701.o7371Atn042616@www.freebsd.org>
Date: Tue, 3 Aug 2010 07:01:10 GMT
From: "S.Bat" <telesisc@gmail.com>
To: freebsd-gnats-submit@FreeBSD.org
Subject: FreeBSD don't see raid disk LSI1078 (IBM x3850 m2 72332LG)
X-Send-Pr-Version: www-3.1
X-GNATS-Notify:

>Number:         149220
>Category:       kern
>Synopsis:       FreeBSD doesn't see raid disk LSI1078 (IBM x3850 m2 72332LG)
>Confidential:   no
>Severity:       non-critical
>Priority:       low
>Responsible:    mjacob
>State:          closed
>Quarter:        
>Keywords:       
>Date-Required:  
>Class:          sw-bug
>Submitter-Id:   current-users
>Arrival-Date:   Tue Aug 03 07:10:05 UTC 2010
>Closed-Date:    Mon Aug 08 14:22:40 UTC 2011
>Last-Modified:  Tue Feb 14 01:10:14 UTC 2012
>Originator:     S.Bat
>Release:        FreeBSD 8.1
>Organization:
>Environment:
>Description:
Copyright (c) 1992-2010 The FreeBSD Project.
Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
	The Regents of the University of California. All rights reserved.
FreeBSD is a registered trademark of The FreeBSD Foundation.
FreeBSD 8.1-RC2 #0: Tue Jun 29 20:42:40 UTC 2010
    root@almeida.cse.buffalo.edu:/usr/obj/usr/src/sys/GENERIC i386
Preloaded elf kernel "/boot/kernel/kernel" at 0xc13ef000.
Preloaded mfs_root "/boot/mfsroot" at 0xc13ef1b0.
Timecounter "i8254" frequency 1193182 Hz quality 0
Calibrating TSC clock ... TSC clock: 2132267528 Hz
CPU: Intel(R) Xeon(R) CPU           E7420  @ 2.13GHz (2132.27-MHz 686-class CPU)
  Origin = "GenuineIntel"  Id = 0x106d1  Family = 6  Model = 1d  Stepping = 1
  Features=0xbfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE>
  Features2=0xce33d<SSE3,DTES64,MON,DS_CPL,VMX,TM2,SSSE3,CX16,xTPR,PDCM,DCA,SSE4.1>
  AMD Features=0x20100000<NX,LM>
  AMD Features2=0x1<LAHF>
  TSC: P-state invariant

Instruction TLB: 4 KB Pages, 4-way set associative, 128 entries
3rd-level cache: 8 MB, 8-way set associative, 64 byte line size
1st-level instruction cache: 32 KB, 8-way set associative, 64 byte line size
1st-level data cache: 32 KB, 8-way set associative, 64 byte line size
L2 cache: 3072 kbytes, 8-way associative, 64 bytes/line
real memory  = 8589934592 (8192 MB)
Physical memory chunk(s):
0x0000000000001000 - 0x000000000009afff, 630784 bytes (154 pages)
0x0000000000100000 - 0x00000000003fffff, 3145728 bytes (768 pages)
0x0000000001426000 - 0x00000000cc469fff, 3406053376 bytes (831556 pages)
avail memory = 3404689408 (3246 MB)
Table 'FACP' at 0xcff57900
Table 'APIC' at 0xcff57780
APIC: Found table at 0xcff57780
MP Configuration Table version 1.4 found at 0xc009d530
APIC: Using the MADT enumerator.
MADT: Found CPU APIC ID 8 ACPI ID 0: enabled
SMP: Added CPU 8 (AP)
MADT: Found CPU APIC ID 32 ACPI ID 1: enabled
SMP: Added CPU 32 (AP)
MADT: Found CPU APIC ID 16 ACPI ID 2: enabled
SMP: Added CPU 16 (AP)
MADT: Found CPU APIC ID 56 ACPI ID 3: enabled
SMP: Added CPU 56 (AP)
MADT: Found CPU APIC ID 9 ACPI ID 4: enabled
SMP: Added CPU 9 (AP)
MADT: Found CPU APIC ID 33 ACPI ID 5: enabled
SMP: Added CPU 33 (AP)
MADT: Found CPU APIC ID 17 ACPI ID 6: enabled
SMP: Added CPU 17 (AP)
MADT: Found CPU APIC ID 57 ACPI ID 7: enabled
SMP: Added CPU 57 (AP)
MADT: Found CPU APIC ID 10 ACPI ID 8: enabled
SMP: Added CPU 10 (AP)
MADT: Found CPU APIC ID 34 ACPI ID 9: enabled
SMP: Added CPU 34 (AP)
MADT: Found CPU APIC ID 18 ACPI ID 10: enabled
SMP: Added CPU 18 (AP)
MADT: Found CPU APIC ID 58 ACPI ID 11: enabled
SMP: Added CPU 58 (AP)
MADT: Found CPU APIC ID 11 ACPI ID 12: enabled
SMP: Added CPU 11 (AP)
MADT: Found CPU APIC ID 35 ACPI ID 13: enabled
SMP: Added CPU 35 (AP)
MADT: Found CPU APIC ID 19 ACPI ID 14: enabled
SMP: Added CPU 19 (AP)
MADT: Found CPU APIC ID 59 ACPI ID 15: enabled
SMP: Added CPU 59 (AP)
ACPI APIC Table: <IBM    EXA01ZEU>
INTR: Adding local APIC 9 as a target
INTR: Adding local APIC 10 as a target
INTR: Adding local APIC 11 as a target
INTR: Adding local APIC 16 as a target
INTR: Adding local APIC 17 as a target
INTR: Adding local APIC 18 as a target
INTR: Adding local APIC 19 as a target
INTR: Adding local APIC 32 as a target
INTR: Adding local APIC 33 as a target
INTR: Adding local APIC 34 as a target
INTR: Adding local APIC 35 as a target
INTR: Adding local APIC 56 as a target
INTR: Adding local APIC 57 as a target
INTR: Adding local APIC 58 as a target
INTR: Adding local APIC 59 as a target
FreeBSD/SMP: Multiprocessor System Detected: 16 CPUs
FreeBSD/SMP: 4 package(s) x 4 core(s)
 cpu0 (BSP): APIC ID:  8
 cpu1 (AP): APIC ID:  9
 cpu2 (AP): APIC ID: 10
 cpu3 (AP): APIC ID: 11
 cpu4 (AP): APIC ID: 16
 cpu5 (AP): APIC ID: 17
 cpu6 (AP): APIC ID: 18
 cpu7 (AP): APIC ID: 19
 cpu8 (AP): APIC ID: 32
 cpu9 (AP): APIC ID: 33
 cpu10 (AP): APIC ID: 34
 cpu11 (AP): APIC ID: 35
 cpu12 (AP): APIC ID: 56
 cpu13 (AP): APIC ID: 57
 cpu14 (AP): APIC ID: 58
 cpu15 (AP): APIC ID: 59
x86bios:   IVT 0x000000-0x0004ff at 0xc0000000
x86bios:  SSEG 0x010000-0x01ffff at 0xc6fb4000
x86bios:  EBDA 0x09b000-0x09ffff at 0xc009b000
x86bios:   ROM 0x0a0000-0x0effff at 0xc00a0000
APIC: CPU 0 has ACPI ID 0
APIC: CPU 1 has ACPI ID 4
APIC: CPU 2 has ACPI ID 8
APIC: CPU 3 has ACPI ID 12
APIC: CPU 4 has ACPI ID 2
APIC: CPU 5 has ACPI ID 6
APIC: CPU 6 has ACPI ID 10
APIC: CPU 7 has ACPI ID 14
APIC: CPU 8 has ACPI ID 1
APIC: CPU 9 has ACPI ID 5
APIC: CPU 10 has ACPI ID 9
APIC: CPU 11 has ACPI ID 13
APIC: CPU 12 has ACPI ID 3
APIC: CPU 13 has ACPI ID 7
APIC: CPU 14 has ACPI ID 11
APIC: CPU 15 has ACPI ID 15
bios32: Found BIOS32 Service Directory header at 0xc00fd3e0
bios32: Entry = 0xfd3f1 (c00fd3f1)  Rev = 0  Len = 1
pcibios: PCI BIOS entry at 0xf0000+0xd42d
pnpbios: Found PnP BIOS data at 0xc00fdcd0
pnpbios: Entry = f0000:1ae0  Rev = 1.0
Other BIOS signatures found:
ULE: setup cpu 0
ULE: setup cpu 1
ULE: setup cpu 2
ULE: setup cpu 3
ULE: setup cpu 4
ULE: setup cpu 5
ULE: setup cpu 6
ULE: setup cpu 7
ULE: setup cpu 8
ULE: setup cpu 9
ULE: setup cpu 10
ULE: setup cpu 11
ULE: setup cpu 12
ULE: setup cpu 13
ULE: setup cpu 14
ULE: setup cpu 15
ACPI: RSDP 0x9b9e0 00014 (v0 M   IB)
ACPI: RSDT 0xcff57ac0 00044 (v1 IBM    EXA01ZEU 00001000 IBM  45444F43)
ACPI: FACP 0xcff57900 000F4 (v3 IBM    EXA01ZEU 00001000 IBM  45444F43)
ACPI: DSDT 0xcff4ad80 021B5 (v1 IBM    EXA01ZEU 00001000 INTL 20060707)
ACPI: FACS 0xcff53680 00040
ACPI: APIC 0xcff57780 00164 (v1 IBM    EXA01ZEU 00001000 IBM  45444F43)
ACPI: SRAT 0xcff57600 00180 (v1 IBM    EXA01ZEU 00001000 IBM  45444F43)
ACPI: HPET 0xcff575c0 00038 (v1 IBM    EXA01ZEU 00001000 IBM  45444F43)
ACPI: TCPA 0xcff57540 00064 (v2 IBM    EXA01ZEU 00001000 IBM  45444F43)
ACPI: MCFG 0xcff57500 0003C (v1 IBM    EXA01ZEU 00001000 IBM  45444F43)
ACPI: ERST 0xcff536c0 00230 (v1 IBM    EXA01ZEU 00001000 IBM  45444F43)
ACPI: SSDT 0xcff4cf40 05D32 (v1 IBM    VIGSSDT0 00001000 INTL 20060707)
MADT: Found IO APIC ID 15, Interrupt 0 at 0xfec00000
ioapic0: Routing external 8259A's -> intpin 0
MADT: Found IO APIC ID 16, Interrupt 24 at 0xfecff000
ioapic1: Changing APIC ID to 16
MADT: Found IO APIC ID 14, Interrupt 27 at 0xfec01000
MADT: Found IO APIC ID 13, Interrupt 63 at 0xfec02000
MADT: Interrupt override: source 0, irq 2
ioapic0: Routing IRQ 0 -> intpin 2
MADT: Interrupt override: source 8, irq 8
MADT: Interrupt override: source 14, irq 14
MADT: Interrupt override: source 9, irq 9
ioapic0: intpin 9 trigger: level
lapic8: Routing NMI -> LINT1
lapic8: LINT1 trigger: edge
lapic8: LINT1 polarity: high
lapic32: Routing NMI -> LINT1
lapic32: LINT1 trigger: edge
lapic32: LINT1 polarity: high
lapic16: Routing NMI -> LINT1
lapic16: LINT1 trigger: edge
lapic16: LINT1 polarity: high
lapic56: Routing NMI -> LINT1
lapic56: LINT1 trigger: edge
lapic56: LINT1 polarity: high
lapic9: Routing NMI -> LINT1
lapic9: LINT1 trigger: edge
lapic9: LINT1 polarity: high
lapic33: Routing NMI -> LINT1
lapic33: LINT1 trigger: edge
lapic33: LINT1 polarity: high
lapic17: Routing NMI -> LINT1
lapic17: LINT1 trigger: edge
lapic17: LINT1 polarity: high
lapic57: Routing NMI -> LINT1
lapic57: LINT1 trigger: edge
lapic57: LINT1 polarity: high
lapic10: Routing NMI -> LINT1
lapic10: LINT1 trigger: edge
lapic10: LINT1 polarity: high
lapic34: Routing NMI -> LINT1
lapic34: LINT1 trigger: edge
lapic34: LINT1 polarity: high
lapic18: Routing NMI -> LINT1
lapic18: LINT1 trigger: edge
lapic18: LINT1 polarity: high
lapic58: Routing NMI -> LINT1
lapic58: LINT1 trigger: edge
lapic58: LINT1 polarity: high
lapic11: Routing NMI -> LINT1
lapic11: LINT1 trigger: edge
lapic11: LINT1 polarity: high
lapic35: Routing NMI -> LINT1
lapic35: LINT1 trigger: edge
lapic35: LINT1 polarity: high
lapic19: Routing NMI -> LINT1
lapic19: LINT1 trigger: edge
lapic19: LINT1 polarity: high
lapic59: Routing NMI -> LINT1
lapic59: LINT1 trigger: edge
lapic59: LINT1 polarity: high
ioapic3 <Version 1.1> irqs 63-98 on motherboard
ioapic2 <Version 1.1> irqs 27-62 on motherboard
ioapic0 <Version 2.0> irqs 0-23 on motherboard
ioapic1 <Version 1.1> irqs 24-26 on motherboard
cpu0 BSP:
     ID: 0x08000000   VER: 0x00050014 LDR: 0x01000000 DFR: 0xffffffff
  lint0: 0x00010700 lint1: 0x00000400 TPR: 0x00000000 SVR: 0x000001ff
  timer: 0x000100ef therm: 0x00010000 err: 0x000000f0 pmc: 0x00010400
wlan: <802.11 Link Layer>
null: <null device, zero device>
random: <entropy source, Software, Yarrow>
nfslock: pseudo-device
io: <I/O>
kbd: new array size 4
kbd1 at kbdmux0
mem: <memory>
Pentium Pro MTRR support enabled
hptrr: RocketRAID 17xx/2xxx SATA controller driver v1.2
npx0: INT 16 interface
acpi0: <IBM EXA01ZEU> on motherboard
PCIe: Memory Mapped configuration base @ 0xd0000000
pcibios: BIOS version 3.00
ioapic0: routing intpin 9 (ISA IRQ 9) to lapic 8 vector 48
acpi0: [MPSAFE]
acpi0: [ITHREAD]
AcpiOsDerivePciId: \\_SB_.VP06.P2PB.PCFG -> bus 11 dev 0 func 0
AcpiOsDerivePciId: \\_SB_.VP07.P2PB.PCFG -> bus 17 dev 0 func 0
acpi0: Power Button (fixed)
acpi0: wakeup code va 0xc6c4d000 pa 0x1000
unknown: I/O range not supported
acpi0: reservation of 400, 100 (3) failed
ACPI timer: 1/1 1/1 1/1 1/1 1/2 1/1 1/2 1/1 1/1 1/1 -> 10
Timecounter "ACPI-fast" frequency 3579545 Hz quality 1000
acpi_timer0: <24-bit timer at 3.579545MHz> port 0x588-0x58b on acpi0
cpu0: <ACPI CPU> on acpi0
cpu0: switching to generic Cx mode
cpu1: <ACPI CPU> on acpi0
cpu2: <ACPI CPU> on acpi0
cpu3: <ACPI CPU> on acpi0
cpu4: <ACPI CPU> on acpi0
cpu5: <ACPI CPU> on acpi0
cpu6: <ACPI CPU> on acpi0
cpu7: <ACPI CPU> on acpi0
cpu8: <ACPI CPU> on acpi0
cpu9: <ACPI CPU> on acpi0
cpu10: <ACPI CPU> on acpi0
cpu11: <ACPI CPU> on acpi0
cpu12: <ACPI CPU> on acpi0
cpu13: <ACPI CPU> on acpi0
cpu14: <ACPI CPU> on acpi0
cpu15: <ACPI CPU> on acpi0
acpi_hpet0: <High Precision Event Timer> iomem 0xfde84000-0xfde843ff on acpi0
acpi_hpet0: vend: 0x1014 rev: 0x1 num: 3 hz: 266538728 opts: 64-bit
Timecounter "HPET" frequency 266538728 Hz quality 900
pcib0: <ACPI Host-PCI bridge> on acpi0
pci0: <ACPI PCI bus> on pcib0
pci0: domain=0, physical bus=0
found->	vendor=0x8086, dev=0x27d0, revid=0x01
	domain=0, bus=0, slot=28, func=0
	class=06-04-00, hdrtype=0x01, mfdev=1
	cmdreg=0x0047, statreg=0x0010, cachelnsz=16 (dwords)
	lattimer=0x00 (0 ns), mingnt=0x03 (750 ns), maxlat=0x00 (0 ns)
	powerspec 2  supports D0 D3  current D0
	MSI supports 1 message
found->	vendor=0x8086, dev=0x27c8, revid=0x01
	domain=0, bus=0, slot=29, func=0
	class=0c-03-00, hdrtype=0x00, mfdev=1
	cmdreg=0x0005, statreg=0x0280, cachelnsz=0 (dwords)
	lattimer=0x00 (0 ns), mingnt=0x00 (0 ns), maxlat=0x00 (0 ns)
	intpin=a, irq=11
	map[20]: type I/O Port, range 32, base 0x3000, size  5, enabled
pcib0: matched entry for 0.29.INTA
pcib0: slot 29 INTA hardwired to IRQ 23
unknown: Reserved 0x20 bytes for rid 0x20 type 4 at 0x3000
found->	vendor=0x8086, dev=0x27c9, revid=0x01
	domain=0, bus=0, slot=29, func=1
	class=0c-03-00, hdrtype=0x00, mfdev=0
	cmdreg=0x0005, statreg=0x0280, cachelnsz=0 (dwords)
	lattimer=0x00 (0 ns), mingnt=0x00 (0 ns), maxlat=0x00 (0 ns)
	intpin=b, irq=3
	map[20]: type I/O Port, range 32, base 0x3100, size  5, enabled
pcib0: matched entry for 0.29.INTB
pcib0: slot 29 INTB hardwired to IRQ 17
unknown: Reserved 0x20 bytes for rid 0x20 type 4 at 0x3100
found->	vendor=0x8086, dev=0x27ca, revid=0x01
	domain=0, bus=0, slot=29, func=2
	class=0c-03-00, hdrtype=0x00, mfdev=0
	cmdreg=0x0005, statreg=0x0280, cachelnsz=0 (dwords)
	lattimer=0x00 (0 ns), mingnt=0x00 (0 ns), maxlat=0x00 (0 ns)
	intpin=c, irq=11
	map[20]: type I/O Port, range 32, base 0x3200, size  5, enabled
pcib0: matched entry for 0.29.INTC
pcib0: slot 29 INTC hardwired to IRQ 18
unknown: Reserved 0x20 bytes for rid 0x20 type 4 at 0x3200
found->	vendor=0x8086, dev=0x27cb, revid=0x01
	domain=0, bus=0, slot=29, func=3
	class=0c-03-00, hdrtype=0x00, mfdev=0
	cmdreg=0x0005, statreg=0x0280, cachelnsz=0 (dwords)
	lattimer=0x00 (0 ns), mingnt=0x00 (0 ns), maxlat=0x00 (0 ns)
	intpin=d, irq=3
	map[20]: type I/O Port, range 32, base 0x3300, size  5, enabled
pcib0: matched entry for 0.29.INTD
pcib0: slot 29 INTD hardwired to IRQ 19
unknown: Reserved 0x20 bytes for rid 0x20 type 4 at 0x3300
found->	vendor=0x8086, dev=0x27cc, revid=0x01
	domain=0, bus=0, slot=29, func=7
	class=0c-03-20, hdrtype=0x00, mfdev=0
	cmdreg=0x0146, statreg=0x0290, cachelnsz=0 (dwords)
	lattimer=0x00 (0 ns), mingnt=0x00 (0 ns), maxlat=0x00 (0 ns)
	intpin=a, irq=11
	powerspec 2  supports D0 D3  current D0
	map[10]: type Memory, range 32, base 0xf6100000, size 10, enabled
pcib0: matched entry for 0.29.INTA
pcib0: slot 29 INTA hardwired to IRQ 23
unknown: Reserved 0x400 bytes for rid 0x10 type 3 at 0xf6100000
found->	vendor=0x8086, dev=0x244e, revid=0xe1
	domain=0, bus=0, slot=30, func=0
	class=06-04-01, hdrtype=0x01, mfdev=0
	cmdreg=0x0147, statreg=0x0010, cachelnsz=0 (dwords)
	lattimer=0x00 (0 ns), mingnt=0x0b (2750 ns), maxlat=0x00 (0 ns)
found->	vendor=0x8086, dev=0x27b8, revid=0x01
	domain=0, bus=0, slot=31, func=0
	class=06-01-00, hdrtype=0x00, mfdev=1
	cmdreg=0x0147, statreg=0x0210, cachelnsz=0 (dwords)
	lattimer=0x00 (0 ns), mingnt=0x00 (0 ns), maxlat=0x00 (0 ns)
found->	vendor=0x8086, dev=0x27c0, revid=0x01
	domain=0, bus=0, slot=31, func=2
	class=01-01-8a, hdrtype=0x00, mfdev=0
	cmdreg=0x0047, statreg=0x02b0, cachelnsz=0 (dwords)
	lattimer=0x00 (0 ns), mingnt=0x00 (0 ns), maxlat=0x00 (0 ns)
	intpin=a, irq=255
	powerspec 2  supports D0 D3  current D0
	map[20]: type I/O Port, range 32, base 0x700, size  4, enabled
	map[24]: type Memory, range 32, base 0, size 10, enabled
pcib1: <PCI-PCI bridge> at device 28.0 on pci0
pcib1:   domain            0
pcib1:   secondary bus     2
pcib1:   subordinate bus   2
pcib1:   I/O decode        0xf000-0xefff
pcib1:   memory decode     0xf2000000-0xf5ffffff
pcib1:   no prefetched decode
pci2: <PCI bus> on pcib1
pci2: domain=0, physical bus=2
found->	vendor=0x14e4, dev=0x1639, revid=0x20
	domain=0, bus=2, slot=0, func=0
	class=02-00-00, hdrtype=0x00, mfdev=1
	cmdreg=0x0006, statreg=0x0010, cachelnsz=16 (dwords)
	lattimer=0x00 (0 ns), mingnt=0x00 (0 ns), maxlat=0x00 (0 ns)
	intpin=a, irq=3
	powerspec 3  supports D0 D3  current D0
	MSI supports 16 messages, 64 bit
	MSI-X supports 9 messages in map 0x10
	map[10]: type Memory, range 64, base 0xf2000000, size 25, enabled
pcib1: requested memory range 0xf2000000-0xf3ffffff: good
pcib0: matched entry for 0.28.INTA
pcib0: slot 28 INTA hardwired to IRQ 16
pcib1: slot 0 INTA is routed to irq 16
found->	vendor=0x14e4, dev=0x1639, revid=0x20
	domain=0, bus=2, slot=0, func=1
	class=02-00-00, hdrtype=0x00, mfdev=1
	cmdreg=0x0006, statreg=0x0010, cachelnsz=16 (dwords)
	lattimer=0x00 (0 ns), mingnt=0x00 (0 ns), maxlat=0x00 (0 ns)
	intpin=b, irq=3
	powerspec 3  supports D0 D3  current D0
	MSI supports 16 messages, 64 bit
	MSI-X supports 9 messages in map 0x10
	map[10]: type Memory, range 64, base 0xf4000000, size 25, enabled
pcib1: requested memory range 0xf4000000-0xf5ffffff: good
pcib0: matched entry for 0.28.INTB
pcib0: slot 28 INTB hardwired to IRQ 17
pcib1: slot 0 INTB is routed to irq 17
bce0: <Broadcom NetXtreme II BCM5709 1000Base-T (C0)> mem 0xf2000000-0xf3ffffff irq 16 at device 0.0 on pci2
bce0: Reserved 0x2000000 bytes for rid 0x10 type 3 at 0xf2000000
bce0: attempting to allocate 1 MSI vectors (16 supported)
msi: routing MSI IRQ 256 to local APIC 8 vector 64
bce0: using IRQ 256 for MSI
miibus0: <MII bus> on bce0
brgphy0: <BCM5709C 10/100/1000baseTX PHY> PHY 1 on miibus0
brgphy0: OUI 0x0050ef, model 0x003c, rev. 8
brgphy0:  10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-FDX, auto
bce0: bpf attached
bce0: Ethernet address: e4:1f:13:1f:87:e4
bce0: [MPSAFE]
bce0: [ITHREAD]
bce0: ASIC (0x57092003); Rev (C0); Bus (PCIe x4, 2.5Gbps); B/C (5.0.6); Flags (MSI|MFW); MFW (IPMI 1.0.0)
bce1: <Broadcom NetXtreme II BCM5709 1000Base-T (C0)> mem 0xf4000000-0xf5ffffff irq 17 at device 0.1 on pci2
bce1: Reserved 0x2000000 bytes for rid 0x10 type 3 at 0xf4000000
bce1: attempting to allocate 1 MSI vectors (16 supported)
msi: routing MSI IRQ 257 to local APIC 8 vector 80
bce1: using IRQ 257 for MSI
miibus1: <MII bus> on bce1
brgphy1: <BCM5709C 10/100/1000baseTX PHY> PHY 1 on miibus1
brgphy1: OUI 0x0050ef, model 0x003c, rev. 8
brgphy1:  10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-FDX, auto
bce1: bpf attached
bce1: Ethernet address: e4:1f:13:1f:87:e6
bce1: [MPSAFE]
bce1: [ITHREAD]
bce1: ASIC (0x57092003); Rev (C0); Bus (PCIe x4, 2.5Gbps); B/C (5.0.6); Flags (MSI|MFW); MFW (IPMI 1.0.0)
uhci0: <Intel 82801G (ICH7) USB controller USB-A> port 0x3000-0x301f irq 23 at device 29.0 on pci0
ioapic0: routing intpin 23 (PCI IRQ 23) to lapic 8 vector 49
uhci0: [MPSAFE]
uhci0: [ITHREAD]
usbus0: <Intel 82801G (ICH7) USB controller USB-A> on uhci0
uhci1: <Intel 82801G (ICH7) USB controller USB-B> port 0x3100-0x311f irq 17 at device 29.1 on pci0
ioapic0: routing intpin 17 (PCI IRQ 17) to lapic 8 vector 50
uhci1: [MPSAFE]
uhci1: [ITHREAD]
usbus1: <Intel 82801G (ICH7) USB controller USB-B> on uhci1
uhci2: <Intel 82801G (ICH7) USB controller USB-C> port 0x3200-0x321f irq 18 at device 29.2 on pci0
ioapic0: routing intpin 18 (PCI IRQ 18) to lapic 8 vector 51
uhci2: [MPSAFE]
uhci2: [ITHREAD]
usbus2: <Intel 82801G (ICH7) USB controller USB-C> on uhci2
uhci3: <Intel 82801G (ICH7) USB controller USB-D> port 0x3300-0x331f irq 19 at device 29.3 on pci0
ioapic0: routing intpin 19 (PCI IRQ 19) to lapic 8 vector 52
uhci3: [MPSAFE]
uhci3: [ITHREAD]
usbus3: <Intel 82801G (ICH7) USB controller USB-D> on uhci3
ehci0: <Intel 82801GB/R (ICH7) USB 2.0 controller> mem 0xf6100000-0xf61003ff irq 23 at device 29.7 on pci0
ehci0: [MPSAFE]
ehci0: [ITHREAD]
usbus4: EHCI version 1.0
usbus4: <Intel 82801GB/R (ICH7) USB 2.0 controller> on ehci0
pcib2: <PCI-PCI bridge> at device 30.0 on pci0
pcib2:   domain            0
pcib2:   secondary bus     1
pcib2:   subordinate bus   1
pcib2:   I/O decode        0x2000-0x2fff
pcib2:   memory decode     0xf6000000-0xf60fffff
pcib2:   prefetched decode 0xe8000000-0xefffffff
pcib2:   Subtractively decoded bridge.
pci1: <PCI bus> on pcib2
pci1: domain=0, physical bus=1
found->	vendor=0x1002, dev=0x515e, revid=0x02
	domain=0, bus=1, slot=0, func=0
	class=03-00-00, hdrtype=0x00, mfdev=0
	cmdreg=0x0187, statreg=0x0290, cachelnsz=16 (dwords)
	lattimer=0xf0 (7200 ns), mingnt=0x08 (2000 ns), maxlat=0x00 (0 ns)
	intpin=a, irq=3
	powerspec 2  supports D0 D1 D2 D3  current D0
	map[10]: type Prefetchable Memory, range 32, base 0xe8000000, size 27, enabled
pcib2: requested memory range 0xe8000000-0xefffffff: good
	map[14]: type I/O Port, range 32, base 0x2000, size  8, enabled
pcib2: requested I/O range 0x2000-0x20ff: in range
	map[18]: type Memory, range 32, base 0xf6020000, size 16, enabled
pcib2: requested memory range 0xf6020000-0xf602ffff: good
pcib0: matched entry for 0.30.INTA
pcib0: slot 30 INTA hardwired to IRQ 16
pcib2: slot 0 INTA is routed to irq 16
vgapci0: <VGA-compatible display> port 0x2000-0x20ff mem 0xe8000000-0xefffffff,0xf6020000-0xf602ffff irq 16 at device 0.0 on pci1
isab0: <PCI-ISA bridge> at device 31.0 on pci0
isa0: <ISA bus> on isab0
atapci0: <Intel ICH7 SATA300 controller> port 0x1f0-0x1f7,0x3f6,0x170-0x177,0x376,0x700-0x70f at device 31.2 on pci0
atapci0: Reserved 0x10 bytes for rid 0x20 type 4 at 0x700
pci0: child atapci0 requested type 4 for rid 0x24, but the BAR says it is an memio
ata0: <ATA channel 0> on atapci0
atapci0: Reserved 0x8 bytes for rid 0x10 type 4 at 0x1f0
atapci0: Reserved 0x1 bytes for rid 0x14 type 4 at 0x3f6
ata0: reset tp1 mask=03 ostat0=00 ostat1=00
ata0: stat0=0x00 err=0x01 lsb=0x14 msb=0xeb
ata0: stat1=0x00 err=0x01 lsb=0x14 msb=0xeb
ata0: reset tp2 stat0=00 stat1=00 devices=0x30000
ioapic0: routing intpin 14 (ISA IRQ 14) to lapic 8 vector 53
ata0: [MPSAFE]
ata0: [ITHREAD]
ata1: <ATA channel 1> on atapci0
atapci0: Reserved 0x8 bytes for rid 0x18 type 4 at 0x170
atapci0: Reserved 0x1 bytes for rid 0x1c type 4 at 0x376
ata1: reset tp1 mask=00 ostat0=ff ostat1=ff
ioapic0: routing intpin 15 (ISA IRQ 15) to lapic 8 vector 54
ata1: [MPSAFE]
ata1: [ITHREAD]
pcib3: <ACPI Host-PCI bridge> on acpi0
pci3: <ACPI PCI bus> on pcib3
pci3: domain=0, physical bus=3
found->	vendor=0x1014, dev=0x0308, revid=0x01
	domain=0, bus=3, slot=0, func=0
	class=06-04-01, hdrtype=0x01, mfdev=0
	cmdreg=0x0007, statreg=0x0010, cachelnsz=16 (dwords)
	lattimer=0x00 (0 ns), mingnt=0x03 (750 ns), maxlat=0x00 (0 ns)
	powerspec 3  supports D0 D1 D2 D3  current D0
pcib4: <ACPI PCI-PCI bridge> at device 0.0 on pci3
pcib4:   domain            0
pcib4:   secondary bus     4
pcib4:   subordinate bus   4
pcib4:   I/O decode        0xf000-0xefff
pcib4:   no prefetched decode
pcib4:   Subtractively decoded bridge.
pci4: <ACPI PCI bus> on pcib4
pci4: domain=0, physical bus=4
found->	vendor=0x1000, dev=0x0062, revid=0x04
	domain=0, bus=4, slot=0, func=0
	class=01-00-00, hdrtype=0x00, mfdev=0
	cmdreg=0x0047, statreg=0x0010, cachelnsz=16 (dwords)
	lattimer=0x00 (0 ns), mingnt=0x00 (0 ns), maxlat=0x00 (0 ns)
	intpin=a, irq=10
	powerspec 2  supports D0 D1 D3  current D0
	MSI supports 4 messages, 64 bit
	MSI-X supports 4 messages in map 0x10
	map[10]: type Memory, range 64, base 0xf62c0000, size 14, enabled
pcib4: requested memory range 0xf62c0000-0xf62c3fff: good
	map[18]: type I/O Port, range 32, base 0x3400, size  8, enabled
	map[1c]: type Memory, range 64, base 0xf6280000, size 18, enabled
pcib4: requested memory range 0xf6280000-0xf62bffff: good
pcib4: matched entry for 4.0.INTA
pcib4: slot 0 INTA hardwired to IRQ 46
mpt0: <LSILogic SAS/SATA Adapter> port 0x3400-0x34ff mem 0xf62c0000-0xf62c3fff,0xf6280000-0xf62bffff irq 46 at device 0.0 on pci4
pci4: child mpt0 requested type 4 for rid 0x10, but the BAR says it is an memio
mpt0: unable to map registers in PIO mode
pcib5: <ACPI Host-PCI bridge> on acpi0
pci23: <ACPI PCI bus> on pcib5
pci23: domain=0, physical bus=23
found->	vendor=0x1014, dev=0x0308, revid=0x01
	domain=0, bus=23, slot=0, func=0
	class=06-04-01, hdrtype=0x01, mfdev=0
	cmdreg=0x0007, statreg=0x0010, cachelnsz=16 (dwords)
	lattimer=0x00 (0 ns), mingnt=0x03 (750 ns), maxlat=0x00 (0 ns)
	powerspec 3  supports D0 D1 D2 D3  current D0
pcib6: <ACPI PCI-PCI bridge> at device 0.0 on pci23
pcib6:   domain            0
pcib6:   secondary bus     24
pcib6:   subordinate bus   28
pcib6:   I/O decode        0xf000-0xefff
pcib6:   no prefetched decode
pcib6:   Subtractively decoded bridge.
pci24: <ACPI PCI bus> on pcib6
pci24: domain=0, physical bus=24
pcib7: <ACPI Host-PCI bridge> on acpi0
pci29: <ACPI PCI bus> on pcib7
pci29: domain=0, physical bus=29
found->	vendor=0x1014, dev=0x0308, revid=0x01
	domain=0, bus=29, slot=0, func=0
	class=06-04-01, hdrtype=0x01, mfdev=0
	cmdreg=0x0007, statreg=0x0010, cachelnsz=16 (dwords)
	lattimer=0x00 (0 ns), mingnt=0x03 (750 ns), maxlat=0x00 (0 ns)
	powerspec 3  supports D0 D1 D2 D3  current D0
pcib8: <ACPI PCI-PCI bridge> at device 0.0 on pci29
pcib8:   domain            0
pcib8:   secondary bus     30
pcib8:   subordinate bus   34
pcib8:   I/O decode        0xf000-0xefff
pcib8:   no prefetched decode
pcib8:   Subtractively decoded bridge.
pci30: <ACPI PCI bus> on pcib8
pci30: domain=0, physical bus=30
pcib9: <ACPI Host-PCI bridge> on acpi0
pci35: <ACPI PCI bus> on pcib9
pci35: domain=0, physical bus=35
found->	vendor=0x1014, dev=0x0308, revid=0x01
	domain=0, bus=35, slot=0, func=0
	class=06-04-01, hdrtype=0x01, mfdev=0
	cmdreg=0x0007, statreg=0x0010, cachelnsz=16 (dwords)
	lattimer=0x00 (0 ns), mingnt=0x03 (750 ns), maxlat=0x00 (0 ns)
	powerspec 3  supports D0 D1 D2 D3  current D0
pcib10: <ACPI PCI-PCI bridge> at device 0.0 on pci35
pcib10:   domain            0
pcib10:   secondary bus     36
pcib10:   subordinate bus   40
pcib10:   I/O decode        0xf000-0xefff
pcib10:   no prefetched decode
pcib10:   Subtractively decoded bridge.
pci36: <ACPI PCI bus> on pcib10
pci36: domain=0, physical bus=36
pcib11: <ACPI Host-PCI bridge> on acpi0
pci41: <ACPI PCI bus> on pcib11
pci41: domain=0, physical bus=41
found->	vendor=0x1014, dev=0x0308, revid=0x01
	domain=0, bus=41, slot=0, func=0
	class=06-04-01, hdrtype=0x01, mfdev=0
	cmdreg=0x0007, statreg=0x0010, cachelnsz=16 (dwords)
	lattimer=0x00 (0 ns), mingnt=0x03 (750 ns), maxlat=0x00 (0 ns)
	powerspec 3  supports D0 D1 D2 D3  current D0
pcib12: <ACPI PCI-PCI bridge> at device 0.0 on pci41
pcib12:   domain            0
pcib12:   secondary bus     42
pcib12:   subordinate bus   46
pcib12:   I/O decode        0xf000-0xefff
pcib12:   no prefetched decode
pcib12:   Subtractively decoded bridge.
pci42: <ACPI PCI bus> on pcib12
pci42: domain=0, physical bus=42
pcib13: <ACPI Host-PCI bridge> on acpi0
pci5: <ACPI PCI bus> on pcib13
pci5: domain=0, physical bus=5
found->	vendor=0x1014, dev=0x0308, revid=0x01
	domain=0, bus=5, slot=0, func=0
	class=06-04-01, hdrtype=0x01, mfdev=0
	cmdreg=0x0007, statreg=0x0010, cachelnsz=16 (dwords)
	lattimer=0x00 (0 ns), mingnt=0x03 (750 ns), maxlat=0x00 (0 ns)
	powerspec 3  supports D0 D1 D2 D3  current D0
pcib14: <ACPI PCI-PCI bridge> at device 0.0 on pci5
pcib14:   domain            0
pcib14:   secondary bus     6
pcib14:   subordinate bus   10
pcib14:   I/O decode        0xf000-0xefff
pcib14:   no prefetched decode
pcib14:   Subtractively decoded bridge.
pci6: <ACPI PCI bus> on pcib14
pci6: domain=0, physical bus=6
pcib15: <ACPI Host-PCI bridge> on acpi0
pci11: <ACPI PCI bus> on pcib15
pci11: domain=0, physical bus=11
found->	vendor=0x1014, dev=0x0308, revid=0x01
	domain=0, bus=11, slot=0, func=0
	class=06-04-01, hdrtype=0x01, mfdev=0
	cmdreg=0x0007, statreg=0x0010, cachelnsz=16 (dwords)
	lattimer=0x00 (0 ns), mingnt=0x03 (750 ns), maxlat=0x00 (0 ns)
	powerspec 3  supports D0 D1 D2 D3  current D0
pcib16: <ACPI PCI-PCI bridge> at device 0.0 on pci11
pcib16:   domain            0
pcib16:   secondary bus     12
pcib16:   subordinate bus   16
pcib16:   I/O decode        0xf000-0xefff
pcib16:   no prefetched decode
pcib16:   Subtractively decoded bridge.
pci12: <ACPI PCI bus> on pcib16
pci12: domain=0, physical bus=12
pcib17: <ACPI Host-PCI bridge> on acpi0
pci17: <ACPI PCI bus> on pcib17
pci17: domain=0, physical bus=17
found->	vendor=0x1014, dev=0x0308, revid=0x01
	domain=0, bus=17, slot=0, func=0
	class=06-04-01, hdrtype=0x01, mfdev=0
	cmdreg=0x0007, statreg=0x0010, cachelnsz=16 (dwords)
	lattimer=0x00 (0 ns), mingnt=0x03 (750 ns), maxlat=0x00 (0 ns)
	powerspec 3  supports D0 D1 D2 D3  current D0
pcib18: <ACPI PCI-PCI bridge> at device 0.0 on pci17
pcib18:   domain            0
pcib18:   secondary bus     18
pcib18:   subordinate bus   22
pcib18:   I/O decode        0xf000-0xefff
pcib18:   no prefetched decode
pcib18:   Subtractively decoded bridge.
pci18: <ACPI PCI bus> on pcib18
pci18: domain=0, physical bus=18
uart0: <Non-standard ns8250 class UART with FIFOs> port 0x3f8-0x3ff irq 4 flags 0x10 on acpi0
ioapic0: routing intpin 4 (ISA IRQ 4) to lapic 8 vector 55
uart0: [FILTER]
uart0: fast interrupt
atrtc0: <AT realtime clock> port 0x70-0x73 irq 8 on acpi0
atrtc0: registered as a time-of-day clock (resolution 1000000us)
unknown: status reg test failed ff
unknown: status reg test failed ff
unknown: status reg test failed ff
unknown: status reg test failed ff
unknown: status reg test failed ff
unknown: status reg test failed ff
ahc_isa_probe 0: ioport 0xc00 alloc failed
ex_isa_identify()
pnp_identify: Trying Read_Port at 203
pnp_identify: Trying Read_Port at 243
pnp_identify: Trying Read_Port at 283
pnp_identify: Trying Read_Port at 2c3
pnp_identify: Trying Read_Port at 303
pnp_identify: Trying Read_Port at 343
pnp_identify: Trying Read_Port at 383
pnp_identify: Trying Read_Port at 3c3
PNP Identify complete
isa_probe_children: disabling PnP devices
pmtimer0 on isa0
ata: ata0 already exists; skipping it
ata: ata1 already exists; skipping it
atrtc: atrtc0 already exists; skipping it
sc: sc0 already exists; skipping it
uart: uart0 already exists; skipping it
isa_probe_children: probing non-PnP devices
orm0: <ISA Option ROM> at iomem 0xc0000-0xcafff pnpid ORM0000 on isa0
atkbd: the current kbd controller command byte 004d
atkbd: keyboard ID 0xffffffff (1)
atkbd: failed to reset the keyboard.
sc0: <System console> at flags 0x100 on isa0
sc0: VGA <16 virtual consoles, flags=0x300>
sc0: fb0, kbd1, terminal emulator: scteken (teken terminal)
vga0: <Generic ISA VGA> at port 0x3c0-0x3df iomem 0xa0000-0xbffff on isa0
atkbdc0: <Keyboard controller (i8042)> at port 0x60,0x64 on isa0
atkbd0: <AT Keyboard> irq 1 on atkbdc0
kbd0 at atkbd0
kbd0: atkbd0, AT 84 (1), config:0x0, flags:0x3d0000
ioapic0: routing intpin 1 (ISA IRQ 1) to lapic 8 vector 56
atkbd0: [GIANT-LOCKED]
atkbd0: [ITHREAD]
psm0: current command byte:004d
psm0: the aux port is not functioning (-1).
fdc0 failed to probe at port 0x3f0-0x3f5,0x3f7 irq 6 drq 2 on isa0
ppc0: parallel port not found.
ppc0: <Parallel port> failed to probe at irq 7 on isa0
uart1: <ns8250> failed to probe at port 0x2f8-0x2ff irq 3 on isa0
isa_probe_children: probing PnP devices
p4tcc0: <CPU Frequency Thermal Control> on cpu0
p4tcc1: <CPU Frequency Thermal Control> on cpu1
p4tcc2: <CPU Frequency Thermal Control> on cpu2
p4tcc3: <CPU Frequency Thermal Control> on cpu3
p4tcc4: <CPU Frequency Thermal Control> on cpu4
p4tcc5: <CPU Frequency Thermal Control> on cpu5
p4tcc6: <CPU Frequency Thermal Control> on cpu6
p4tcc7: <CPU Frequency Thermal Control> on cpu7
p4tcc8: <CPU Frequency Thermal Control> on cpu8
p4tcc9: <CPU Frequency Thermal Control> on cpu9
p4tcc10: <CPU Frequency Thermal Control> on cpu10
p4tcc11: <CPU Frequency Thermal Control> on cpu11
p4tcc12: <CPU Frequency Thermal Control> on cpu12
p4tcc13: <CPU Frequency Thermal Control> on cpu13
p4tcc14: <CPU Frequency Thermal Control> on cpu14
p4tcc15: <CPU Frequency Thermal Control> on cpu15
Device configuration finished.
Reducing kern.maxvnodes 214283 -> 100000
procfs registered
lapic: Divisor 2, Frequency 133266725 Hz
Timecounter "TSC" frequency 2132267528 Hz quality -100
Timecounters tick every 1.000 msec
vlan: initialized, using hash tables with chaining
lo0: bpf attached
hptrr: no controller detected.
ata0: Identifying devices: 00030000
ata0: New devices: 00030000
md0: Preloaded image </boot/mfsroot> 4423680 bytes at 0xc0fb5484
usbus0: 12Mbps Full Speed USB v1.0
usbus1: 12Mbps Full Speed USB v1.0
usbus2: 12Mbps Full Speed USB v1.0
usbus3: 12Mbps Full Speed USB v1.0
usbus4: 480Mbps High Speed USB v2.0
ugen0.1: <Intel> at usbus0
uhub0: <Intel UHCI root HUB, class 9/0, rev 1.00/1.00, addr 1> on usbus0
ugen1.1: <Intel> at usbus1
uhub1: <Intel UHCI root HUB, class 9/0, rev 1.00/1.00, addr 1> on usbus1
ugen2.1: <Intel> at usbus2
uhub2: <Intel UHCI root HUB, class 9/0, rev 1.00/1.00, addr 1> on usbus2
ugen3.1: <Intel> at usbus3
uhub3: <Intel UHCI root HUB, class 9/0, rev 1.00/1.00, addr 1> on usbus3
ugen4.1: <Intel> at usbus4
uhub4: <Intel EHCI root HUB, class 9/0, rev 2.00/1.00, addr 1> on usbus4
uhub0: 2 ports with 2 removable, self powered
uhub1: 2 ports with 2 removable, self powered
uhub2: 2 ports with 2 removable, self powered
uhub3: 2 ports with 2 removable, self powered
bce0: bce_pulse(): Bootcode lost the driver pulse! (bc_state = 0x0003200E)
bce1: bce_pulse(): Bootcode lost the driver pulse! (bc_state = 0x0003200E)
ata0: reiniting channel ..
ata0: reset tp1 mask=03 ostat0=00 ostat1=00
ata0: stat0=0x00 err=0x01 lsb=0x14 msb=0xeb
ata0: stat1=0x00 err=0x01 lsb=0x14 msb=0xeb
ata0: reset tp2 stat0=00 stat1=00 devices=0x30000
ata0: reinit done ..
unknown: FAILURE - ATAPI_IDENTIFY timed out LBA=0
ata0: reiniting channel ..
ata0: reset tp1 mask=03 ostat0=00 ostat1=00
ata0: stat0=0x00 err=0x01 lsb=0x14 msb=0xeb
ata0: stat1=0x00 err=0x01 lsb=0x14 msb=0xeb
ata0: reset tp2 stat0=00 stat1=00 devices=0x30000
ata0: reinit done ..
unknown: FAILURE - ATAPI_IDENTIFY timed out LBA=0
ata0-master: pio=PIO4 wdma=WDMA2 udma=UDMA100 cable=40 wire
acd0: setting UDMA100
acd0: <TSSTcorp CDDVDW TS-L633B/IB03> DVDR drive at ata0 as master
acd0: read 4134KB/s (4134KB/s) write 172KB/s (4134KB/s), 2048KB buffer, UDMA100 SATA
acd0: Reads: CDR, CDRW, CDDA stream, DVDROM, DVDR, DVDRAM, packet
acd0: Writes: CDR, CDRW, DVDR, DVDRAM, test write, burnproof
acd0: Audio: play, 256 volume levels
acd0: Mechanism: ejectable tray, unlocked
acd0: Medium: no/blank disc
ata1: Identifying devices: 00000000
ata1: New devices: 00000000
ATA PseudoRAID loaded
SMP: AP CPU #1 Launched!
cpu1 AP:
     ID: 0x09000000   VER: 0x00050014 LDR: 0x00000000 DFR: 0xffffffff
  lint0: 0x00010700 lint1: 0x00000400 TPR: 0x00000000 SVR: 0x000001ff
  timer: 0x000200ef therm: 0x00010000 err: 0x000000f0 pmc: 0x00010400
SMP: AP CPU #8 Launched!
cpu8 AP:
     ID: 0x20000000   VER: 0x00050014 LDR: 0x00000000 DFR: 0xffffffff
  lint0: 0x00010700 lint1: 0x00000400 TPR: 0x00000000 SVR: 0x000001ff
  timer: 0x000200ef therm: 0x00010000 err: 0x000000f0 pmc: 0x00010400
SMP: AP CPU #12 Launched!
cpu12 AP:
     ID: 0x38000000   VER: 0x00050014 LDR: 0x00000000 DFR: 0xffffffff
  lint0: 0x00010700 lint1: 0x00000400 TPR: 0x00000000 SVR: 0x000001ff
  timer: 0x000200ef therm: 0x00010000 err: 0x000000f0 pmc: 0x00010400
SMP: AP CPU #4 Launched!
cpu4 AP:
     ID: 0x10000000   VER: 0x00050014 LDR: 0x00000000 DFR: 0xffffffff
  lint0: 0x00010700 lint1: 0x00000400 TPR: 0x00000000 SVR: 0x000001ff
  timer: 0x000200ef therm: 0x00010000 err: 0x000000f0 pmc: 0x00010400
SMP: AP CPU #3 Launched!
cpu3 AP:
     ID: 0x0b000000   VER: 0x00050014 LDR: 0x00000000 DFR: 0xffffffff
  lint0: 0x00010700 lint1: 0x00000400 TPR: 0x00000000 SVR: 0x000001ff
  timer: 0x000200ef therm: 0x00010000 err: 0x000000f0 pmc: 0x00010400
SMP: AP CPU #11 Launched!
cpu11 AP:
     ID: 0x23000000   VER: 0x00050014 LDR: 0x00000000 DFR: 0xffffffff
  lint0: 0x00010700 lint1: 0x00000400 TPR: 0x00000000 SVR: 0x000001ff
  timer: 0x000200ef therm: 0x00010000 err: 0x000000f0 pmc: 0x00010400
SMP: AP CPU #5 Launched!
cpu5 AP:
     ID: 0x11000000   VER: 0x00050014 LDR: 0x00000000 DFR: 0xffffffff
  lint0: 0x00010700 lint1: 0x00000400 TPR: 0x00000000 SVR: 0x000001ff
  timer: 0x000200ef therm: 0x00010000 err: 0x000000f0 pmc: 0x00010400
SMP: AP CPU #14 Launched!
cpu14 AP:
     ID: 0x3a000000   VER: 0x00050014 LDR: 0x00000000 DFR: 0xffffffff
  lint0: 0x00010700 lint1: 0x00000400 TPR: 0x00000000 SVR: 0x000001ff
  timer: 0x000200ef therm: 0x00010000 err: 0x000000f0 pmc: 0x00010400
SMP: AP CPU #15 Launched!
cpu15 AP:
     ID: 0x3b000000   VER: 0x00050014 LDR: 0x00000000 DFR: 0xffffffff
  lint0: 0x00010700 lint1: 0x00000400 TPR: 0x00000000 SVR: 0x000001ff
  timer: 0x000200ef therm: 0x00010000 err: 0x000000f0 pmc: 0x00010400
SMP: AP CPU #10 Launched!
cpu10 AP:
     ID: 0x22000000   VER: 0x00050014 LDR: 0x00000000 DFR: 0xffffffff
  lint0: 0x00010700 lint1: 0x00000400 TPR: 0x00000000 SVR: 0x000001ff
  timer: 0x000200ef therm: 0x00010000 err: 0x000000f0 pmc: 0x00010400
SMP: AP CPU #2 Launched!
cpu2 AP:
     ID: 0x0a000000   VER: 0x00050014 LDR: 0x00000000 DFR: 0xffffffff
  lint0: 0x00010700 lint1: 0x00000400 TPR: 0x00000000 SVR: 0x000001ff
  timer: 0x000200ef therm: 0x00010000 err: 0x000000f0 pmc: 0x00010400
SMP: AP CPU #7 Launched!
cpu7 AP:
     ID: 0x13000000   VER: 0x00050014 LDR: 0x00000000 DFR: 0xffffffff
  lint0: 0x00010700 lint1: 0x00000400 TPR: 0x00000000 SVR: 0x000001ff
  timer: 0x000200ef therm: 0x00010000 err: 0x000000f0 pmc: 0x00010400
SMP: AP CPU #13 Launched!
cpu13 AP:
     ID: 0x39000000   VER: 0x00050014 LDR: 0x00000000 DFR: 0xffffffff
  lint0: 0x00010700 lint1: 0x00000400 TPR: 0x00000000 SVR: 0x000001ff
  timer: 0x000200ef therm: 0x00010000 err: 0x000000f0 pmc: 0x00010400
SMP: AP CPU #9 Launched!
cpu9 AP:
     ID: 0x21000000   VER: 0x00050014 LDR: 0x00000000 DFR: 0xffffffff
  lint0: 0x00010700 lint1: 0x00000400 TPR: 0x00000000 SVR: 0x000001ff
  timer: 0x000200ef therm: 0x00010000 err: 0x000000f0 pmc: 0x00010400
SMP: AP CPU #6 Launched!
cpu6 AP:
     ID: 0x12000000   VER: 0x00050014 LDR: 0x00000000 DFR: 0xffffffff
  lint0: 0x00010700 lint1: 0x00000400 TPR: 0x00000000 SVR: 0x000001ff
  timer: 0x000200ef therm: 0x00010000 err: 0x000000f0 pmc: 0x00010400
ioapic0: routing intpin 4 (ISA IRQ 4) to lapic 9 vector 48
ioapic0: routing intpin 9 (ISA IRQ 9) to lapic 10 vector 48
ioapic0: routing intpin 14 (ISA IRQ 14) to lapic 11 vector 48
ioapic0: routing intpin 15 (ISA IRQ 15) to lapic 16 vector 48
ioapic0: routing intpin 17 (PCI IRQ 17) to lapic 17 vector 48
ioapic0: routing intpin 18 (PCI IRQ 18) to lapic 18 vector 48
ioapic0: routing intpin 19 (PCI IRQ 19) to lapic 19 vector 48
ioapic0: routing intpin 23 (PCI IRQ 23) to lapic 32 vector 48
msi: Assigning MSI IRQ 256 to local APIC 33 vector 48
msi: Assigning MSI IRQ 257 to local APIC 34 vector 48
Root mount waiting for: usbus4
Root mount waiting for: usbus4
uhub4: 8 ports with 8 removable, self powered
Root mount waiting for: usbus4
ugen0.2: <vendor 0x0566> at usbus0
ukbd0: <vendor 0x0566 product 0x3002, class 0/0, rev 1.10/1.01, addr 2> on usbus0
kbd2 at ukbd0
kbd2: ukbd0, generic (0), config:0x0, flags:0x3d0000
ugen4.2: <JetFlash> at usbus4
umass0: <JetFlash Mass Storage Device, class 0/0, rev 2.00/11.00, addr 2> on usbus4
umass0:  SCSI over Bulk-Only; quirks = 0x0000
uhid0: <vendor 0x0566 product 0x3002, class 0/0, rev 1.10/1.01, addr 2> on usbus0
ugen2.2: <IBM> at usbus2
ukbd1: <HID KB> on usbus2
kbd3 at ukbd1
kbd3: ukbd1, generic (0), config:0x0, flags:0x3d0000
umass0:0:0:-1: Attached to scbus0
Trying to mount root from ufs:/dev/md0
ct_to_ts([2010-08-03 05:32:52]) = 1280813572.000000000
start_init: trying /sbin/init
start_init: trying /sbin/oinit
start_init: trying /sbin/init.bak
start_init: trying /rescue/init
start_init: trying /stand/sysinstall
ums0: <HID MS> on usbus2
ums0: 3 buttons and [Z] coordinates ID=0
uhid1: <HID SYS> on usbus2
(probe0:umass-sim0:0:0:0): Down reving Protocol Version from 2 to 0?
(probe0:umass-sim0:0:0:0): SCSI status error
(probe0:umass-sim0:0:0:0): TEST UNIT READY. CDB: 0 0 0 0 0 0 
(probe0:umass-sim0:0:0:0): CAM status: SCSI Status Error
(probe0:umass-sim0:0:0:0): SCSI status: Check Condition
(probe0:umass-sim0:0:0:0): SCSI sense: UNIT ATTENTION asc:28,0 (Not ready to ready change, medium may have changed)
(probe0:umass-sim0:0:0:0): Retrying command (per sense data)
GEOM: new disk da0
pass0 at umass-sim0 bus 0 scbus0 target 0 lun 0
pass0: <JetFlash Transcend 4GB 1100> Removable Direct Access SCSI-0 device 
pass0: Serial Number 857ZXGD7HJBP4QST
pass0: 40.000MB/s transfers
da0 at umass-sim0 bus 0 scbus0 target 0 lun 0
da0: <JetFlash Transcend 4GB 1100> Removable Direct Access SCSI-0 device 
da0: Serial Number 857ZXGD7HJBP4QST
da0: 40.000MB/s transfers
da0: 3864MB (7913472 512 byte sectors: 255H 63S/T 492C)
GEOM: da0: media size does not match label.
bce0: Gigabit link up!
bce0: Gigabit link up!

>How-To-Repeat:

>Fix:


>Release-Note:
>Audit-Trail:

From: Matthew Jacob <mj@feral.com>
To: bug-followup@FreeBSD.org, telesisc@gmail.com
Cc:  
Subject: Re: i386/149220: [ata] FreeBSD don't see raid disk LSI1078 (IBM x3850
 m2 72332LG)
Date: Thu, 05 Aug 2010 07:20:59 -0700

 There is only one LSI mass storage controller in the output messages:
 
 found-> vendor=0x1000, dev=0x0062, revid=0x04
 domain=0, bus=4, slot=0, func=0
 class=01-00-00, hdrtype=0x00, mfdev=0
 
 decice id 0062 is not known to the mpt driver.
 
 

From: Telesis <telesisc@gmail.com>
To: bug-followup@FreeBSD.org, telesisc@gmail.com
Cc:  
Subject: Re: i386/149220: [ata] FreeBSD don't see raid disk LSI1078 (IBM x3850 
	m2 72332LG)
Date: Thu, 5 Aug 2010 20:06:05 +0400

 --000e0cd3585a46783e048d15ba08
 Content-Type: text/plain; charset=ISO-8859-1
 
 May be i'm not right, but see in code this.
 ==* mpt_pci.c<http://www.freebsd.org/cgi/cvsweb.cgi/src/sys/dev/mpt/mpt_pci.c#rev1.54.2.4>
 *
 
 #ifndef PCI_PRODUCT_LSI_SAS1078
 #define PCI_PRODUCT_LSI_SAS1078		0x0062
 #endif
 
 ==dmesg
 *mpt0: <LSILogic SAS/SATA Adapter> port 0x3400-0x34ff mem
 0xf62c0000-0xf62c3fff,0xf6280000-0xf62bffff irq 46 at device 0.0 on pci4*
 pci4: child mpt0 requested type 4 for rid 0x10, but the BAR says it is an
 memio
 mpt0: unable to map registers in PIO mode
 ====
 
 --000e0cd3585a46783e048d15ba08
 Content-Type: text/html; charset=ISO-8859-1
 
 May be i&#39;m not right, but see in code this.<br>==<b> <a href="http://www.freebsd.org/cgi/cvsweb.cgi/src/sys/dev/mpt/mpt_pci.c#rev1.54.2.4">mpt_pci.c</a></b><pre>#ifndef PCI_PRODUCT_LSI_SAS1078<br>#define PCI_PRODUCT_LSI_SAS1078		0x0062<br>
 #endif<br></pre>==dmesg<br><u style="background-color: rgb(255, 102, 102);">mpt0: &lt;LSILogic 
 SAS/SATA Adapter&gt; port 0x3400-0x34ff mem 
 0xf62c0000-0xf62c3fff,0xf6280000-0xf62bffff irq 46 at device 0.0 on
  pci4</u><br>
 pci4: child mpt0 requested type 4 for rid 0x10, but the BAR says it is 
 an memio<br>
 mpt0: unable to map registers in PIO mode<br>====
 
 --000e0cd3585a46783e048d15ba08--
Responsible-Changed-From-To: freebsd-i386->mjacob 
Responsible-Changed-By: mjacob 
Responsible-Changed-When: Thu Aug 5 16:40:30 UTC 2010 
Responsible-Changed-Why:  
I'll own it. 

http://www.freebsd.org/cgi/query-pr.cgi?pr=149220 

From: dfilter@FreeBSD.ORG (dfilter service)
To: bug-followup@FreeBSD.org
Cc:  
Subject: Re: kern/149220: commit references a PR
Date: Fri,  6 Aug 2010 17:27:09 +0000 (UTC)

 Author: mjacob
 Date: Fri Aug  6 17:27:00 2010
 New Revision: 210943
 URL: http://svn.freebsd.org/changeset/base/210943
 
 Log:
   Figure which is the IO and MEM bars- do not assume that they are in
   a fixed order.
   
   PR:		149220
   Obtained from:	John Baldwin
   MFC after:	1 month
 
 Modified:
   head/sys/dev/mpt/mpt_pci.c
 
 Modified: head/sys/dev/mpt/mpt_pci.c
 ==============================================================================
 --- head/sys/dev/mpt/mpt_pci.c	Fri Aug  6 17:21:32 2010	(r210942)
 +++ head/sys/dev/mpt/mpt_pci.c	Fri Aug  6 17:27:00 2010	(r210943)
 @@ -194,8 +194,6 @@ __FBSDID("$FreeBSD$");
  #endif
  
  
 -#define	MPT_IO_BAR	0
 -#define	MPT_MEM_BAR	1
  
  static int mpt_pci_probe(device_t);
  static int mpt_pci_attach(device_t);
 @@ -420,6 +418,7 @@ mpt_pci_attach(device_t dev)
  	struct mpt_softc *mpt;
  	int		  iqd;
  	uint32_t	  data, cmd;
 +	int		  mpt_io_bar, mpt_mem_bar;
  
  	/* Allocate the softc structure */
  	mpt  = (struct mpt_softc*)device_get_softc(dev);
 @@ -505,11 +504,25 @@ mpt_pci_attach(device_t dev)
  	}
  
  	/*
 +	 * Figure out which are the I/O and MEM Bars
 +	 */
 +	data = pci_read_config(dev, PCIR_BAR(0), 4);
 +	if (PCI_BAR_IO(data)) {
 +		/* BAR0 is IO, BAR1 is memory */
 +		mpt_io_bar = 0;
 +		mpt_mem_bar = 1;
 +	} else {
 +		/* BAR0 is memory, BAR1 is IO */
 +		mpt_mem_bar = 0;
 +		mpt_io_bar = 1;
 +	}
 +
 +	/*
  	 * Set up register access.  PIO mode is required for
  	 * certain reset operations (but must be disabled for
  	 * some cards otherwise).
  	 */
 -	mpt->pci_pio_rid = PCIR_BAR(MPT_IO_BAR);
 +	mpt->pci_pio_rid = PCIR_BAR(mpt_io_bar);
  	mpt->pci_pio_reg = bus_alloc_resource(dev, SYS_RES_IOPORT,
  			    &mpt->pci_pio_rid, 0, ~0, 0, RF_ACTIVE);
  	if (mpt->pci_pio_reg == NULL) {
 @@ -520,7 +533,7 @@ mpt_pci_attach(device_t dev)
  	mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
  
  	/* Allocate kernel virtual memory for the 9x9's Mem0 region */
 -	mpt->pci_mem_rid = PCIR_BAR(MPT_MEM_BAR);
 +	mpt->pci_mem_rid = PCIR_BAR(mpt_mem_bar);
  	mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY,
  			&mpt->pci_mem_rid, 0, ~0, 0, RF_ACTIVE);
  	if (mpt->pci_reg == NULL) {
 _______________________________________________
 svn-src-all@freebsd.org mailing list
 http://lists.freebsd.org/mailman/listinfo/svn-src-all
 To unsubscribe, send any mail to "svn-src-all-unsubscribe@freebsd.org"
 

From: Matthew Jacob <mj@feral.com>
To: bug-followup@FreeBSD.org, telesisc@gmail.com
Cc:  
Subject: Re: kern/149220: [ata] FreeBSD don't see raid disk LSI1078 (IBM x3850
 m2 72332LG)
Date: Fri, 06 Aug 2010 10:27:56 -0700

 Change #210943 fixes the IO and MEM bar issues. There are additional 
 issues as well.

From: Telesis <telesisc@gmail.com>
To: bug-followup@FreeBSD.org
Cc:  
Subject: Re: kern/149220: [ata] FreeBSD don't see raid disk LSI1078 (IBM x3850 
	m2 72332LG)
Date: Mon, 9 Aug 2010 09:43:09 +0400

 --0050450143ddd6916b048d5d7d97
 Content-Type: text/plain; charset=ISO-8859-1
 
  #210943 fixes not working on integral LSI SAS 1078.
 
 =====================================================
 LSI Corporation MPT SAS BIOS
 MPTBIOS*6.26.00.00 (2008.10.14)
 Copyright 2000*2008 LSI Corporation.
 
 Searching for devices at HBA 0...
 
 SLOT ID  LUN VENDOR   PRODUCT          REVISION   INT13 SIZE \ NV
 **** *** *** ******** **************** ********** ***** *********
   0    3  0  LSILOGIC Logical Volume   3000        Boot    135 GB
   0          LSILogic SAS1078*IR       1.27.86.00  NV 2D:20
 
 LSI Corporation MPT boot ROM successfully installed!
 =====================================================
 
 =====================================================
 ...
 pcib4: <ACPI PCI-PCI bridge> at device 0.0 on pci3
 pcib4:   domain            0
 pcib4:   secondary bus     4
 pcib4:   subordinate bus   4
 pcib4:   I/O decode        0xf000-0xefff
 pcib4:   no prefetched decode
 pcib4:   Subtractively decoded bridge.
 pci4: <ACPI PCI bus> on pcib4
 pci4: domain=0, physical bus=4
 found-> vendor=0x1000, dev=0x0062, revid=0x04
         domain=0, bus=4, slot=0, func=0
         class=01-00-00, hdrtype=0x00, mfdev=0
         cmdreg=0x0047, statreg=0x0010, cachelnsz=16 (dwords)
         lattimer=0x00 (0 ns), mingnt=0x00 (0 ns), maxlat=0x00 (0 ns)
         intpin=a, irq=10
         powerspec 2  supports D0 D1 D3  current D0
         MSI supports 4 messages, 64 bit
         MSI-X supports 4 messages in map 0x10
         map[10]: type Memory, range 64, base 0xf02c0000, size 14, enabled
 pcib4: requested memory range 0xf02c0000-0xf02c3fff: good
         map[18]: type I/O Port, range 32, base 0x3400, size  8, enabled
         map[1c]: type Memory, range 64, base 0xf0280000, size 18, enabled
 pcib4: requested memory range 0xf0280000-0xf02bffff: good
 pcib4: matched entry for 4.0.INTA
 pcib4: slot 0 INTA hardwired to IRQ 46
 mpt0: <LSILogic SAS/SATA Adapter> port 0x3400-0x34ff mem
 0xf02c0000-0xf02c3fff,0xf0280000-0xf02bffff irq 46 at device 0.0 on pci4
 mpt0: Lazy allocation of 0x4 bytes rid 0x14 type 4 at 0x1000
 mpt0: Reserved 0x4 bytes for rid 0x14 type 4 at 0x1000
 mpt0: Reserved 0x4000 bytes for rid 0x10 type 3 at 0xf02c0000
 ioapic2: routing intpin 19 (PCI IRQ 46) to lapic 8 vector 55
 mpt0: [MPSAFE]
 mpt0: [ITHREAD]
 mpt0: soft reset failed: device not running
 mpt0: mpt_reset: failed hard reset (0:0)
 mpt0: mpt_reset: failed hard reset (0:1)
 mpt0: mpt_reset: failed hard reset (0:2)
 mpt0: mpt_reset: failed hard reset (0:3)
 mpt0: mpt_reset: failed hard reset (0:4)
 mpt0: soft reset failed: device not running
 mpt0: mpt_reset: failed hard reset (1:0)
 mpt0: mpt_reset: failed hard reset (1:1)
 mpt0: mpt_reset: failed hard reset (1:2)
 mpt0: mpt_reset: failed hard reset (1:3)
 mpt0: mpt_reset: failed hard reset (1:4)
 mpt0: soft reset failed: device not running
 mpt0: mpt_reset: failed hard reset (2:0)
 ...
 =====================================================
 
 --0050450143ddd6916b048d5d7d97--

From: Scott Long <scottl@samsco.org>
To: telesisc@gmail.com
Cc: bug-followup@FreeBSD.org
Subject: Re: kern/149220: [ata] FreeBSD don't see raid disk LSI1078 (IBM x3850  m2 72332LG)
Date: Tue, 10 Aug 2010 00:23:11 -0600

 It looks like the 1078 uses a different chip reset protocol.  I'll see =
 if I can hack something together.
 
 Scott
 
State-Changed-From-To: open->patched 
State-Changed-By: eadler 
State-Changed-When: Tue Mar 1 10:15:26 EST 2011 
State-Changed-Why:  
committed in head 

http://www.freebsd.org/cgi/query-pr.cgi?pr=149220 

From: dfilter@FreeBSD.ORG (dfilter service)
To: bug-followup@FreeBSD.org
Cc:  
Subject: Re: kern/149220: commit references a PR
Date: Mon, 25 Jul 2011 16:20:14 +0000 (UTC)

 Author: marius
 Date: Mon Jul 25 16:20:00 2011
 New Revision: 224329
 URL: http://svn.freebsd.org/changeset/base/224329
 
 Log:
   MFC: r210943
   
   Figure which is the IO and MEM bars- do not assume that they are in
   a fixed order.
   
   PR:		149220
   Obtained from:	John Baldwin
 
 Modified:
   stable/8/sys/dev/mpt/mpt_pci.c
 Directory Properties:
   stable/8/sys/   (props changed)
   stable/8/sys/amd64/include/xen/   (props changed)
   stable/8/sys/cddl/contrib/opensolaris/   (props changed)
   stable/8/sys/contrib/dev/acpica/   (props changed)
   stable/8/sys/contrib/pf/   (props changed)
   stable/8/sys/geom/label/   (props changed)
 
 Modified: stable/8/sys/dev/mpt/mpt_pci.c
 ==============================================================================
 --- stable/8/sys/dev/mpt/mpt_pci.c	Mon Jul 25 16:14:36 2011	(r224328)
 +++ stable/8/sys/dev/mpt/mpt_pci.c	Mon Jul 25 16:20:00 2011	(r224329)
 @@ -194,8 +194,6 @@ __FBSDID("$FreeBSD$");
  #endif
  
  
 -#define	MPT_IO_BAR	0
 -#define	MPT_MEM_BAR	1
  
  static int mpt_pci_probe(device_t);
  static int mpt_pci_attach(device_t);
 @@ -420,6 +418,7 @@ mpt_pci_attach(device_t dev)
  	struct mpt_softc *mpt;
  	int		  iqd;
  	uint32_t	  data, cmd;
 +	int		  mpt_io_bar, mpt_mem_bar;
  
  	/* Allocate the softc structure */
  	mpt  = (struct mpt_softc*)device_get_softc(dev);
 @@ -505,11 +504,25 @@ mpt_pci_attach(device_t dev)
  	}
  
  	/*
 +	 * Figure out which are the I/O and MEM Bars
 +	 */
 +	data = pci_read_config(dev, PCIR_BAR(0), 4);
 +	if (PCI_BAR_IO(data)) {
 +		/* BAR0 is IO, BAR1 is memory */
 +		mpt_io_bar = 0;
 +		mpt_mem_bar = 1;
 +	} else {
 +		/* BAR0 is memory, BAR1 is IO */
 +		mpt_mem_bar = 0;
 +		mpt_io_bar = 1;
 +	}
 +
 +	/*
  	 * Set up register access.  PIO mode is required for
  	 * certain reset operations (but must be disabled for
  	 * some cards otherwise).
  	 */
 -	mpt->pci_pio_rid = PCIR_BAR(MPT_IO_BAR);
 +	mpt->pci_pio_rid = PCIR_BAR(mpt_io_bar);
  	mpt->pci_pio_reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
  			    &mpt->pci_pio_rid, RF_ACTIVE);
  	if (mpt->pci_pio_reg == NULL) {
 @@ -520,7 +533,7 @@ mpt_pci_attach(device_t dev)
  	mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
  
  	/* Allocate kernel virtual memory for the 9x9's Mem0 region */
 -	mpt->pci_mem_rid = PCIR_BAR(MPT_MEM_BAR);
 +	mpt->pci_mem_rid = PCIR_BAR(mpt_mem_bar);
  	mpt->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
  			&mpt->pci_mem_rid, RF_ACTIVE);
  	if (mpt->pci_reg == NULL) {
 _______________________________________________
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 http://lists.freebsd.org/mailman/listinfo/svn-src-all
 To unsubscribe, send any mail to "svn-src-all-unsubscribe@freebsd.org"
 

From: dfilter@FreeBSD.ORG (dfilter service)
To: bug-followup@FreeBSD.org
Cc:  
Subject: Re: kern/149220: commit references a PR
Date: Mon, 25 Jul 2011 16:20:35 +0000 (UTC)

 Author: marius
 Date: Mon Jul 25 16:20:02 2011
 New Revision: 224330
 URL: http://svn.freebsd.org/changeset/base/224330
 
 Log:
   MFC: r210943
   
   Figure which is the IO and MEM bars- do not assume that they are in
   a fixed order.
   
   PR:		149220
   Obtained from:	John Baldwin
 
 Modified:
   stable/7/sys/dev/mpt/mpt_pci.c
 Directory Properties:
   stable/7/sys/   (props changed)
   stable/7/sys/cddl/contrib/opensolaris/   (props changed)
   stable/7/sys/contrib/dev/acpica/   (props changed)
   stable/7/sys/contrib/pf/   (props changed)
 
 Modified: stable/7/sys/dev/mpt/mpt_pci.c
 ==============================================================================
 --- stable/7/sys/dev/mpt/mpt_pci.c	Mon Jul 25 16:20:00 2011	(r224329)
 +++ stable/7/sys/dev/mpt/mpt_pci.c	Mon Jul 25 16:20:02 2011	(r224330)
 @@ -194,8 +194,6 @@ __FBSDID("$FreeBSD$");
  #endif
  
  
 -#define	MPT_IO_BAR	0
 -#define	MPT_MEM_BAR	1
  
  static int mpt_pci_probe(device_t);
  static int mpt_pci_attach(device_t);
 @@ -420,6 +418,7 @@ mpt_pci_attach(device_t dev)
  	struct mpt_softc *mpt;
  	int		  iqd;
  	uint32_t	  data, cmd;
 +	int		  mpt_io_bar, mpt_mem_bar;
  
  	/* Allocate the softc structure */
  	mpt  = (struct mpt_softc*)device_get_softc(dev);
 @@ -505,11 +504,25 @@ mpt_pci_attach(device_t dev)
  	}
  
  	/*
 +	 * Figure out which are the I/O and MEM Bars
 +	 */
 +	data = pci_read_config(dev, PCIR_BAR(0), 4);
 +	if (PCI_BAR_IO(data)) {
 +		/* BAR0 is IO, BAR1 is memory */
 +		mpt_io_bar = 0;
 +		mpt_mem_bar = 1;
 +	} else {
 +		/* BAR0 is memory, BAR1 is IO */
 +		mpt_mem_bar = 0;
 +		mpt_io_bar = 1;
 +	}
 +
 +	/*
  	 * Set up register access.  PIO mode is required for
  	 * certain reset operations (but must be disabled for
  	 * some cards otherwise).
  	 */
 -	mpt->pci_pio_rid = PCIR_BAR(MPT_IO_BAR);
 +	mpt->pci_pio_rid = PCIR_BAR(mpt_io_bar);
  	mpt->pci_pio_reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
  			    &mpt->pci_pio_rid, RF_ACTIVE);
  	if (mpt->pci_pio_reg == NULL) {
 @@ -520,7 +533,7 @@ mpt_pci_attach(device_t dev)
  	mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
  
  	/* Allocate kernel virtual memory for the 9x9's Mem0 region */
 -	mpt->pci_mem_rid = PCIR_BAR(MPT_MEM_BAR);
 +	mpt->pci_mem_rid = PCIR_BAR(mpt_mem_bar);
  	mpt->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
  			&mpt->pci_mem_rid, RF_ACTIVE);
  	if (mpt->pci_reg == NULL) {
 _______________________________________________
 svn-src-all@freebsd.org mailing list
 http://lists.freebsd.org/mailman/listinfo/svn-src-all
 To unsubscribe, send any mail to "svn-src-all-unsubscribe@freebsd.org"
 
State-Changed-From-To: patched->closed 
State-Changed-By: mjacob 
State-Changed-When: Mon Aug 8 14:20:45 UTC 2011 
State-Changed-Why:  
was checked in as of r210943. It's been MFC'd to releng_8 

http://www.freebsd.org/cgi/query-pr.cgi?pr=149220 

From: dfilter@FreeBSD.ORG (dfilter service)
To: bug-followup@FreeBSD.org
Cc:  
Subject: Re: kern/149220: commit references a PR
Date: Sat, 11 Feb 2012 12:03:55 +0000 (UTC)

 Author: marius
 Date: Sat Feb 11 12:03:44 2012
 New Revision: 231518
 URL: http://svn.freebsd.org/changeset/base/231518
 
 Log:
   Flesh out support for SAS1078 and SAS1078DE (which are said to actually
   be the same chip):
   - The I/O port resource may not be available with these. However, given
     that we actually only need this resource for some controllers that
     require their firmware to be up- and downloaded (which excludes the
     SAS1078{,DE}) just handle failure to allocate this resource gracefully
     when possible. While at it, generally put non-fatal resource allocation
     failures under bootverbose.
   - SAS1078{,DE} use a different hard reset protocol.
   - Add workarounds for the 36GB physical address limitation of scatter/
     gather elements of these controllers.
   
   Tested by:	Slawa Olhovchenkov
   
   PR:	149220 (remaining part)
 
 Modified:
   head/sys/dev/mpt/mpt.c
   head/sys/dev/mpt/mpt.h
   head/sys/dev/mpt/mpt_cam.c
   head/sys/dev/mpt/mpt_pci.c
   head/sys/dev/mpt/mpt_reg.h
 
 Modified: head/sys/dev/mpt/mpt.c
 ==============================================================================
 --- head/sys/dev/mpt/mpt.c	Sat Feb 11 11:34:53 2012	(r231517)
 +++ head/sys/dev/mpt/mpt.c	Sat Feb 11 12:03:44 2012	(r231518)
 @@ -1053,6 +1053,12 @@ mpt_hard_reset(struct mpt_softc *mpt)
  
  	mpt_lprt(mpt, MPT_PRT_DEBUG, "hard reset\n");
  
 +	if (mpt->is_1078) {
 +		mpt_write(mpt, MPT_OFFSET_RESET_1078, 0x07);
 +		DELAY(1000);
 +		return;
 +	}
 +
  	error = mpt_enable_diag_mode(mpt);
  	if (error) {
  		mpt_prt(mpt, "WARNING - Could not enter diagnostic mode !\n");
 @@ -2450,6 +2456,11 @@ mpt_download_fw(struct mpt_softc *mpt)
  	uint32_t ext_offset;
  	uint32_t data;
  
 +	if (mpt->pci_pio_reg == NULL) {
 +		mpt_prt(mpt, "No PIO resource!\n");
 +		return (ENXIO);
 +	}
 +
  	mpt_prt(mpt, "Downloading Firmware - Image Size %d\n",
  		mpt->fw_image_size);
  
 
 Modified: head/sys/dev/mpt/mpt.h
 ==============================================================================
 --- head/sys/dev/mpt/mpt.h	Sat Feb 11 11:34:53 2012	(r231517)
 +++ head/sys/dev/mpt/mpt.h	Sat Feb 11 12:03:44 2012	(r231518)
 @@ -608,7 +608,7 @@ struct mpt_softc {
  #endif
  	uint32_t		mpt_pers_mask;
  	uint32_t
 -				: 8,
 +				: 7,
  		unit		: 8,
  		ready		: 1,
  		fw_uploaded	: 1,
 @@ -625,7 +625,8 @@ struct mpt_softc {
  		disabled	: 1,
  		is_spi		: 1,
  		is_sas		: 1,
 -		is_fc		: 1;
 +		is_fc		: 1,
 +		is_1078		: 1;
  
  	u_int			cfg_role;
  	u_int			role;	/* role: none, ini, target, both */
 @@ -982,12 +983,14 @@ mpt_read(struct mpt_softc *mpt, int offs
  static __inline void
  mpt_pio_write(struct mpt_softc *mpt, size_t offset, uint32_t val)
  {
 +	KASSERT(mpt->pci_pio_reg != NULL, ("no PIO resource"));
  	bus_space_write_4(mpt->pci_pio_st, mpt->pci_pio_sh, offset, val);
  }
  
  static __inline uint32_t
  mpt_pio_read(struct mpt_softc *mpt, int offset)
  {
 +	KASSERT(mpt->pci_pio_reg != NULL, ("no PIO resource"));
  	return (bus_space_read_4(mpt->pci_pio_st, mpt->pci_pio_sh, offset));
  }
  /*********************** Reply Frame/Request Management ***********************/
 
 Modified: head/sys/dev/mpt/mpt_cam.c
 ==============================================================================
 --- head/sys/dev/mpt/mpt_cam.c	Sat Feb 11 11:34:53 2012	(r231517)
 +++ head/sys/dev/mpt/mpt_cam.c	Sat Feb 11 12:03:44 2012	(r231518)
 @@ -1279,8 +1279,9 @@ mpt_execute_req_a64(void *arg, bus_dma_s
  	char *mpt_off;
  	union ccb *ccb;
  	struct mpt_softc *mpt;
 -	int seg, first_lim;
 -	uint32_t flags, nxt_off;
 +	bus_addr_t chain_list_addr;
 +	int first_lim, seg, this_seg_lim;
 +	uint32_t addr, cur_off, flags, nxt_off, tf;
  	void *sglp = NULL;
  	MSG_REQUEST_HEADER *hdrp;
  	SGE_SIMPLE64 *se;
 @@ -1434,16 +1435,20 @@ bad:
  
  	se = (SGE_SIMPLE64 *) sglp;
  	for (seg = 0; seg < first_lim; seg++, se++, dm_segs++) {
 -		uint32_t tf;
 -
 +		tf = flags;
  		memset(se, 0, sizeof (*se));
 +		MPI_pSGE_SET_LENGTH(se, dm_segs->ds_len);
  		se->Address.Low = htole32(dm_segs->ds_addr & 0xffffffff);
  		if (sizeof(bus_addr_t) > 4) {
 -			se->Address.High =
 -			    htole32(((uint64_t)dm_segs->ds_addr) >> 32);
 +			addr = ((uint64_t)dm_segs->ds_addr) >> 32;
 +			/* SAS1078 36GB limitation WAR */
 +			if (mpt->is_1078 && (((uint64_t)dm_segs->ds_addr +
 +			    MPI_SGE_LENGTH(se->FlagsLength)) >> 32) == 9) {
 +				addr |= (1 << 31);
 +				tf |= MPI_SGE_FLAGS_LOCAL_ADDRESS;
 +			}
 +			se->Address.High = htole32(addr);
  		}
 -		MPI_pSGE_SET_LENGTH(se, dm_segs->ds_len);
 -		tf = flags;
  		if (seg == first_lim - 1) {
  			tf |= MPI_SGE_FLAGS_LAST_ELEMENT;
  		}
 @@ -1468,15 +1473,11 @@ bad:
  
  	/*
  	 * Make up the rest of the data segments out of a chain element
 -	 * (contiained in the current request frame) which points to
 +	 * (contained in the current request frame) which points to
  	 * SIMPLE64 elements in the next request frame, possibly ending
  	 * with *another* chain element (if there's more).
  	 */
  	while (seg < nseg) {
 -		int this_seg_lim;
 -		uint32_t tf, cur_off;
 -		bus_addr_t chain_list_addr;
 -
  		/*
  		 * Point to the chain descriptor. Note that the chain
  		 * descriptor is at the end of the *previous* list (whether
 @@ -1504,7 +1505,7 @@ bad:
  		nxt_off += MPT_RQSL(mpt);
  
  		/*
 -		 * Now initialized the chain descriptor.
 +		 * Now initialize the chain descriptor.
  		 */
  		memset(ce, 0, sizeof (*ce));
  
 @@ -1554,16 +1555,24 @@ bad:
  		 * set the end of list and end of buffer flags.
  		 */
  		while (seg < this_seg_lim) {
 +			tf = flags;
  			memset(se, 0, sizeof (*se));
 +			MPI_pSGE_SET_LENGTH(se, dm_segs->ds_len);
  			se->Address.Low = htole32(dm_segs->ds_addr &
  			    0xffffffff);
  			if (sizeof (bus_addr_t) > 4) {
 -				se->Address.High =
 -				    htole32(((uint64_t)dm_segs->ds_addr) >> 32);
 +				addr = ((uint64_t)dm_segs->ds_addr) >> 32;
 +				/* SAS1078 36GB limitation WAR */
 +				if (mpt->is_1078 &&
 +				    (((uint64_t)dm_segs->ds_addr +
 +				    MPI_SGE_LENGTH(se->FlagsLength)) >>
 +				    32) == 9) {
 +					addr |= (1 << 31);
 +					tf |= MPI_SGE_FLAGS_LOCAL_ADDRESS;
 +				}
 +				se->Address.High = htole32(addr);
  			}
 -			MPI_pSGE_SET_LENGTH(se, dm_segs->ds_len);
 -			tf = flags;
 -			if (seg ==  this_seg_lim - 1) {
 +			if (seg == this_seg_lim - 1) {
  				tf |=	MPI_SGE_FLAGS_LAST_ELEMENT;
  			}
  			if (seg == nseg - 1) {
 @@ -1868,7 +1877,7 @@ bad:
  
  	/*
  	 * Make up the rest of the data segments out of a chain element
 -	 * (contiained in the current request frame) which points to
 +	 * (contained in the current request frame) which points to
  	 * SIMPLE32 elements in the next request frame, possibly ending
  	 * with *another* chain element (if there's more).
  	 */
 @@ -1904,7 +1913,7 @@ bad:
  		nxt_off += MPT_RQSL(mpt);
  
  		/*
 -		 * Now initialized the chain descriptor.
 +		 * Now initialize the chain descriptor.
  		 */
  		memset(ce, 0, sizeof (*ce));
  
 @@ -1958,7 +1967,7 @@ bad:
  
  			MPI_pSGE_SET_LENGTH(se, dm_segs->ds_len);
  			tf = flags;
 -			if (seg ==  this_seg_lim - 1) {
 +			if (seg == this_seg_lim - 1) {
  				tf |=	MPI_SGE_FLAGS_LAST_ELEMENT;
  			}
  			if (seg == nseg - 1) {
 
 Modified: head/sys/dev/mpt/mpt_pci.c
 ==============================================================================
 --- head/sys/dev/mpt/mpt_pci.c	Sat Feb 11 11:34:53 2012	(r231517)
 +++ head/sys/dev/mpt/mpt_pci.c	Sat Feb 11 12:03:44 2012	(r231518)
 @@ -438,6 +438,10 @@ mpt_pci_attach(device_t dev)
  	case PCI_PRODUCT_LSI_FC7X04X:
  		mpt->is_fc = 1;
  		break;
 +	case PCI_PRODUCT_LSI_SAS1078:
 +	case PCI_PRODUCT_LSI_SAS1078DE:
 +		mpt->is_1078 = 1;
 +		/* FALLTHROUGH */
  	case PCI_PRODUCT_LSI_SAS1064:
  	case PCI_PRODUCT_LSI_SAS1064A:
  	case PCI_PRODUCT_LSI_SAS1064E:
 @@ -445,8 +449,6 @@ mpt_pci_attach(device_t dev)
  	case PCI_PRODUCT_LSI_SAS1066E:
  	case PCI_PRODUCT_LSI_SAS1068:
  	case PCI_PRODUCT_LSI_SAS1068E:
 -	case PCI_PRODUCT_LSI_SAS1078:
 -	case PCI_PRODUCT_LSI_SAS1078DE:
  		mpt->is_sas = 1;
  		break;
  	default:
 @@ -527,23 +529,31 @@ mpt_pci_attach(device_t dev)
  	mpt->pci_pio_reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
  	    &mpt_io_bar, RF_ACTIVE);
  	if (mpt->pci_pio_reg == NULL) {
 -		device_printf(dev, "unable to map registers in PIO mode\n");
 -		goto bad;
 +		if (bootverbose) {
 +			device_printf(dev,
 +			    "unable to map registers in PIO mode\n");
 +		}
 +	} else {
 +		mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg);
 +		mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
  	}
 -	mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg);
 -	mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
  
  	/* Allocate kernel virtual memory for the 9x9's Mem0 region */
  	mpt_mem_bar = PCIR_BAR(mpt_mem_bar);
  	mpt->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
  	    &mpt_mem_bar, RF_ACTIVE);
  	if (mpt->pci_reg == NULL) {
 -		device_printf(dev, "Unable to memory map registers.\n");
 -		if (mpt->is_sas) {
 +		if (bootverbose || mpt->is_sas || mpt->pci_pio_reg == NULL) {
 +			device_printf(dev,
 +			    "Unable to memory map registers.\n");
 +		}
 +		if (mpt->is_sas || mpt->pci_pio_reg == NULL) {
  			device_printf(dev, "Giving Up.\n");
  			goto bad;
  		}
 -		device_printf(dev, "Falling back to PIO mode.\n");
 +		if (bootverbose) {
 +			device_printf(dev, "Falling back to PIO mode.\n");
 +		}
  		mpt->pci_st = mpt->pci_pio_st;
  		mpt->pci_sh = mpt->pci_pio_sh;
  	} else {
 
 Modified: head/sys/dev/mpt/mpt_reg.h
 ==============================================================================
 --- head/sys/dev/mpt/mpt_reg.h	Sat Feb 11 11:34:53 2012	(r231517)
 +++ head/sys/dev/mpt/mpt_reg.h	Sat Feb 11 12:03:44 2012	(r231518)
 @@ -77,6 +77,7 @@
  #define	MPT_OFFSET_REPLY_Q	0x44
  #define	MPT_OFFSET_HOST_INDEX	0x50
  #define	MPT_OFFSET_FUBAR	0x90
 +#define	MPT_OFFSET_RESET_1078	0x10fc
  
  /* Bit Maps for DOORBELL register */
  enum DB_STATE_BITS {
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From: dfilter@FreeBSD.ORG (dfilter service)
To: bug-followup@FreeBSD.org
Cc:  
Subject: Re: kern/149220: commit references a PR
Date: Tue, 14 Feb 2012 01:05:52 +0000 (UTC)

 Author: marius
 Date: Tue Feb 14 01:05:37 2012
 New Revision: 231626
 URL: http://svn.freebsd.org/changeset/base/231626
 
 Log:
   Forced commit to denote that the commit message of r231623 actually
   should have read:
   MFC: r231518
   
   Flesh out support for SAS1078 and SAS1078DE (which are said to actually
   be the same chip):
   - The I/O port resource may not be available with these. However, given
     that we actually only need this resource for some controllers that
     require their firmware to be up- and downloaded (which excludes the
     SAS1078{,DE}) just handle failure to allocate this resource gracefully
     when possible. While at it, generally put non-fatal resource allocation
     failures under bootverbose.
   - SAS1078{,DE} use a different hard reset protocol.
   - Add workarounds for the 36GB physical address limitation of scatter/
     gather elements of these controllers.
   
   Tested by:	Slawa Olhovchenkov
   
   PR:	149220 (remaining part)
 
 Modified:
   stable/9/sys/dev/mpt/mpt.c
   stable/9/sys/dev/mpt/mpt.h
   stable/9/sys/dev/mpt/mpt_cam.c
   stable/9/sys/dev/mpt/mpt_pci.c
   stable/9/sys/dev/mpt/mpt_reg.h
 
 Modified: stable/9/sys/dev/mpt/mpt.c
 ==============================================================================
 
 Modified: stable/9/sys/dev/mpt/mpt.h
 ==============================================================================
 
 Modified: stable/9/sys/dev/mpt/mpt_cam.c
 ==============================================================================
 
 Modified: stable/9/sys/dev/mpt/mpt_pci.c
 ==============================================================================
 
 Modified: stable/9/sys/dev/mpt/mpt_reg.h
 ==============================================================================
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From: dfilter@FreeBSD.ORG (dfilter service)
To: bug-followup@FreeBSD.org
Cc:  
Subject: Re: kern/149220: commit references a PR
Date: Tue, 14 Feb 2012 01:08:29 +0000 (UTC)

 Author: marius
 Date: Tue Feb 14 01:08:16 2012
 New Revision: 231627
 URL: http://svn.freebsd.org/changeset/base/231627
 
 Log:
   Forced commit to denote that the commit message of r231624 actually
   should have read:
   MFC: r231518
   
   Flesh out support for SAS1078 and SAS1078DE (which are said to actually
   be the same chip):
   - The I/O port resource may not be available with these. However, given
     that we actually only need this resource for some controllers that
     require their firmware to be up- and downloaded (which excludes the
     SAS1078{,DE}) just handle failure to allocate this resource gracefully
     when possible. While at it, generally put non-fatal resource allocation
     failures under bootverbose.
   - SAS1078{,DE} use a different hard reset protocol.
   - Add workarounds for the 36GB physical address limitation of scatter/
     gather elements of these controllers.
   
   Tested by:	Slawa Olhovchenkov
   
   PR:	149220 (remaining part)
 
 Modified:
   stable/8/sys/dev/mpt/mpt.c
   stable/8/sys/dev/mpt/mpt.h
   stable/8/sys/dev/mpt/mpt_cam.c
   stable/8/sys/dev/mpt/mpt_pci.c
   stable/8/sys/dev/mpt/mpt_reg.h
 
 Modified: stable/8/sys/dev/mpt/mpt.c
 ==============================================================================
 
 Modified: stable/8/sys/dev/mpt/mpt.h
 ==============================================================================
 
 Modified: stable/8/sys/dev/mpt/mpt_cam.c
 ==============================================================================
 
 Modified: stable/8/sys/dev/mpt/mpt_pci.c
 ==============================================================================
 
 Modified: stable/8/sys/dev/mpt/mpt_reg.h
 ==============================================================================
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From: dfilter@FreeBSD.ORG (dfilter service)
To: bug-followup@FreeBSD.org
Cc:  
Subject: Re: kern/149220: commit references a PR
Date: Tue, 14 Feb 2012 01:09:19 +0000 (UTC)

 Author: marius
 Date: Tue Feb 14 01:09:10 2012
 New Revision: 231628
 URL: http://svn.freebsd.org/changeset/base/231628
 
 Log:
   Forced commit to denote that the commit message of r231625 actually
   should have read:
   MFC: r231518
   
   Flesh out support for SAS1078 and SAS1078DE (which are said to actually
   be the same chip):
   - The I/O port resource may not be available with these. However, given
     that we actually only need this resource for some controllers that
     require their firmware to be up- and downloaded (which excludes the
     SAS1078{,DE}) just handle failure to allocate this resource gracefully
     when possible. While at it, generally put non-fatal resource allocation
     failures under bootverbose.
   - SAS1078{,DE} use a different hard reset protocol.
   - Add workarounds for the 36GB physical address limitation of scatter/
     gather elements of these controllers.
   
   Tested by:	Slawa Olhovchenkov
   
   PR:	149220 (remaining part)
 
 Modified:
   stable/7/sys/dev/mpt/mpt.c
   stable/7/sys/dev/mpt/mpt.h
   stable/7/sys/dev/mpt/mpt_cam.c
   stable/7/sys/dev/mpt/mpt_pci.c
   stable/7/sys/dev/mpt/mpt_reg.h
 
 Modified: stable/7/sys/dev/mpt/mpt.c
 ==============================================================================
 
 Modified: stable/7/sys/dev/mpt/mpt.h
 ==============================================================================
 
 Modified: stable/7/sys/dev/mpt/mpt_cam.c
 ==============================================================================
 
 Modified: stable/7/sys/dev/mpt/mpt_pci.c
 ==============================================================================
 
 Modified: stable/7/sys/dev/mpt/mpt_reg.h
 ==============================================================================
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>Unformatted:
