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Date: Mon, 1 Feb 2010 12:32:18 GMT
From: Mamoru Sumida <msumida@mvc.biglobe.ne.jp>
To: freebsd-gnats-submit@FreeBSD.org
Subject: Patch for D510 pinetail AGP problem
X-Send-Pr-Version: www-3.1
X-GNATS-Notify:

>Number:         143427
>Category:       kern
>Synopsis:       [agp] [patch] Patch for D510 pinetail AGP problem
>Confidential:   no
>Severity:       serious
>Priority:       medium
>Responsible:    rnoland
>State:          closed
>Quarter:        
>Keywords:       
>Date-Required:  
>Class:          update
>Submitter-Id:   current-users
>Arrival-Date:   Mon Feb 01 12:40:01 UTC 2010
>Closed-Date:    Sat Mar 13 11:53:02 UTC 2010
>Last-Modified:  Sat Mar 13 12:00:10 UTC 2010
>Originator:     Mamoru Sumida
>Release:        RELENG_8
>Organization:
>Environment:
FreeBSD saturn.xxx.or.jp 8.0-STABLE FreeBSD 8.0-STABLE #0: Sat Jan 30 16:29:18 UTC 2010     mamoru@saturn.xxx.or.jp:/usr/src/sys/amd64/compile/GENERIC  amd64

>Description:
Release-8 kernel could not find AGP in Intel D510MO mother board.

>How-To-Repeat:
Just Boot . then we could not agp0 in boot log.

>Fix:
I had made the patch. These patch is based on 
http://people.freebsd.org/~rnoland/agp_i810.c-IGD.patch
http://lists.freedesktop.org/archives/intel-gfx/2009-February/001482.html
http://lists.freedesktop.org/archives/intel-gfx/2009-February/001483.html


After rebuild the kernel,I got the agp0
vgapci0: <VGA-compatible display> port 0x20c0-0x20c7 mem 0xe0200000-0xe027ffff,0xd0000000-0xdfffffff,0xe0100000-0xe01fffff irq 16 at device 2.0 
on pci0
agp0: <Intel IGD SVGA controller> on vgapci0
agp0: detected 8188k stolen memory
agp0: aperture size is 256M

I had confirmed the X windows system with Intel Driver.

These patch also requires BIOS revision 0154 or later.

Thanks

>Release-Note:
>Audit-Trail:
State-Changed-From-To: open->feedback 
State-Changed-By: linimon 
State-Changed-When: Mon Feb 1 12:44:05 UTC 2010 
State-Changed-Why:  
I'm sorry ... where is the patch? 

http://www.freebsd.org/cgi/query-pr.cgi?pr=143427 

From: Mark Linimon <linimon@lonesome.com>
To: bug-followup@FreeBSD.org
Cc:  
Subject: Re: kern/143427: [agp] Patch for D510 pinetail AGP problem
Date: Mon, 1 Feb 2010 18:09:19 -0600

 ----- Forwarded message from Mamoru Sumida <msumida@mvc.biglobe.ne.jp> -----
 
 From: Mamoru Sumida <msumida@mvc.biglobe.ne.jp>
 To: linimon@FreeBSD.org
 Cc: msumida@mvc.biglobe.ne.jp, freebsd-bugs@FreeBSD.org
 Subject: Re: kern/143427: [agp] Patch for D510 pinetail AGP problem
 
 Oops!! Have I forgot to attach the patch? 
 
 Here is 
 For 
 src/dev/apg/apg_i810.c
 src/dev/drm/drm_pciids.h
 src/dev/drm/i930_drv.h
 src/dev/drm/i930_reg.h
 
 Thanks
 
 --- i915_drv.h.orig	2010-02-01 11:42:16.000000000 +0000
 +++ i915_drv.h	2010-01-30 15:55:43.000000000 +0000
 @@ -28,7 +28,7 @@
   */
  
  #include <sys/cdefs.h>
 -__FBSDID("$FreeBSD: src/sys/dev/drm/i915_drv.h,v 1.4.2.9 2009/10/30 16:38:53 rnoland Exp $");
 +__FBSDID("$FreeBSD: src/sys/dev/drm/i915_drv.h,v 1.13.2.2 2009/10/30 16:37:58 rnoland Exp $");
  
  #ifndef _I915_DRV_H_
  #define _I915_DRV_H_
 @@ -657,16 +657,23 @@
  		     (dev)->pci_device == 0x2E32 || \
  		     IS_GM45(dev))
  
 +#define IS_IGDG(dev) ((dev)->pci_device == 0xa001)
 +#define IS_IGDGM(dev) ((dev)->pci_device == 0xa011)
 +#define IS_IGD(dev) (IS_IGDG(dev) || IS_IGDGM(dev))
 +
  #define IS_G33(dev)    ((dev)->pci_device == 0x29C2 ||	\
  			(dev)->pci_device == 0x29B2 ||	\
 -			(dev)->pci_device == 0x29D2)
 +			(dev)->pci_device == 0x29D2 ||  \
 +			(IS_IGD(dev)))
  
 + 
  #define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \
  		      IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev))
  
  #define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \
 -			IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev))
 -
 +			IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev) || \
 +			IS_IGD(dev))
 + 
  #define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_GM45(dev) || IS_G4X(dev))
  
  #define PRIMARY_RINGBUFFER_SIZE         (128*1024)
 --- i915_reg.h.orig	2010-02-01 11:41:26.000000000 +0000
 +++ i915_reg.h	2010-01-30 15:59:15.000000000 +0000
 @@ -23,7 +23,7 @@
   */
  
  #include <sys/cdefs.h>
 -__FBSDID("$FreeBSD: src/sys/dev/drm/i915_reg.h,v 1.3.2.1.2.1 2009/10/25 01:10:29 kensmith Exp $");
 +__FBSDID("$FreeBSD: src/sys/dev/drm/i915_reg.h,v 1.3.2.1 2009/08/03 08:13:06 kensmith Exp $");
  
  #ifndef _I915_REG_H_
  #define _I915_REG_H_
 @@ -362,6 +362,7 @@
  #define   DPLLB_LVDS_P2_CLOCK_DIV_7	(1 << 24) /* i915 */
  #define   DPLL_P2_CLOCK_DIV_MASK	0x03000000 /* i915 */
  #define   DPLL_FPA01_P1_POST_DIV_MASK	0x00ff0000 /* i915 */
 +#define   DPLL_FPA01_P1_POST_DIV_MASK_IGD	0x00ff8000 /* IGD */
  
  #define I915_FIFO_UNDERRUN_STATUS		(1UL<<31)
  #define I915_CRC_ERROR_ENABLE			(1UL<<29)
 @@ -438,6 +439,7 @@
   */
  #define   DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS	0x003f0000
  #define   DPLL_FPA01_P1_POST_DIV_SHIFT	16
 +#define   DPLL_FPA01_P1_POST_DIV_SHIFT_IGD 15
  /* i830, required in DVO non-gang */
  #define   PLL_P2_DIVIDE_BY_4		(1 << 23)
  #define   PLL_P1_DIVIDE_BY_TWO		(1 << 21) /* i830 */
 @@ -504,10 +506,12 @@
  #define FPB0	0x06048
  #define FPB1	0x0604c
  #define   FP_N_DIV_MASK		0x003f0000
 +#define   FP_N_IGD_DIV_MASK	0x00ff0000
  #define   FP_N_DIV_SHIFT		16
  #define   FP_M1_DIV_MASK	0x00003f00
  #define   FP_M1_DIV_SHIFT		 8
  #define   FP_M2_DIV_MASK	0x0000003f
 +#define   FP_M2_IGD_DIV_MASK	0x000000ff
  #define   FP_M2_DIV_SHIFT		 0
  #define DPLL_TEST	0x606c
  #define   DPLLB_TEST_SDVO_DIV_1		(0 << 22)
 --- drm_pciids.h.orig	2010-02-01 11:37:35.000000000 +0000
 +++ drm_pciids.h	2010-01-30 16:00:40.000000000 +0000
 @@ -553,6 +553,8 @@
  	{0x8086, 0x2E12, CHIP_I9XX|CHIP_I965, "Intel Q45/Q43"}, \
  	{0x8086, 0x2E22, CHIP_I9XX|CHIP_I965, "Intel G45/G43"}, \
  	{0x8086, 0x2E32, CHIP_I9XX|CHIP_I965, "Intel G41"}, \
 +        {0x8086, 0xA001, CHIP_I9XX|CHIP_I965, "Intel IGD"}, \
 +        {0x8086, 0xA011, CHIP_I9XX|CHIP_I965, "Intel IGD"}, \
  	{0, 0, 0, NULL}
  
  #define imagine_PCI_IDS \
 --- agp_i810.c.orig	2010-02-01 11:36:11.000000000 +0000
 +++ agp_i810.c	2010-01-30 16:28:27.000000000 +0000
 @@ -70,6 +70,7 @@
  	CHIP_I915,	/* 915G/915GM */
  	CHIP_I965,	/* G965 */
  	CHIP_G33,	/* G33/Q33/Q35 */
 +	CHIP_IGD,	/* G33 like IGD */
  	CHIP_G4X,	/* G45/Q45 */
  };
  
 @@ -165,6 +166,10 @@
  	    "Intel Q33 SVGA controller"},
  	{0x2A028086, CHIP_I965, 0x00020000,
  	    "Intel GM965 SVGA controller"},
 +	{0xA0018086, CHIP_IGD, 0x00010000,
 +	    "Intel IGD SVGA controller"},
 +	{0xA0118086, CHIP_IGD, 0x00010000,
 +	    "Intel IGD SVGA controller"},
  	{0x2A128086, CHIP_I965, 0x00020000,
  	    "Intel GME965 SVGA controller"},
  	{0x2A428086, CHIP_G4X, 0x00020000,
 @@ -286,6 +291,7 @@
  	case CHIP_I915:
  	case CHIP_I965:
  	case CHIP_G33:
 +	case CHIP_IGD:
  	case CHIP_G4X:
  		deven = pci_read_config(bdev, AGP_I915_DEVEN, 4);
  		if ((deven & AGP_I915_DEVEN_D2F0) ==
 @@ -351,6 +357,7 @@
  	case CHIP_I915:
  	case CHIP_I965:
  	case CHIP_G33:
 +	case CHIP_IGD:
  	case CHIP_G4X:
  		device_printf(dev, "AGP_I855_GCC1: 0x%02x\n",
  		    pci_read_config(sc->bdev, AGP_I855_GCC1, 1));
 @@ -386,6 +393,7 @@
  		break;
  	case CHIP_I915:
  	case CHIP_G33:
 +	case CHIP_IGD:
  		sc->sc_res_spec = agp_i915_res_spec;
  		agp_set_aperture_resource(dev, AGP_I915_GMADR);
  		break;
 @@ -401,7 +409,8 @@
  		return error;
  
  	if (sc->chiptype != CHIP_I965 && sc->chiptype != CHIP_G33 &&
 -	    sc->chiptype != CHIP_G4X && ptoa((vm_paddr_t)Maxmem) > 0xfffffffful)
 +	    sc->chiptype != CHIP_IGD  && sc->chiptype != CHIP_G4X && 
 +	    ptoa((vm_paddr_t)Maxmem) > 0xfffffffful)
  	{
  		device_printf(dev, "agp_i810.c does not support physical "
  		    "memory above 4GB.\n");
 @@ -491,7 +500,7 @@
  		gatt->ag_physical = pgtblctl & ~1;
  	} else if (sc->chiptype == CHIP_I855 || sc->chiptype == CHIP_I915 ||
  	    sc->chiptype == CHIP_I965 || sc->chiptype == CHIP_G33 ||
 -	    sc->chiptype == CHIP_G4X) {
 +	    sc->chiptype == CHIP_IGD  || sc->chiptype == CHIP_G4X) {
  		unsigned int gcc1, pgtblctl, stolen, gtt_size;
  
  		/* Stolen memory is set up at the beginning of the aperture by
 @@ -553,6 +562,7 @@
  				return EINVAL;
  			}
  			break;
 +		case CHIP_IGD:
  		case CHIP_G4X:
  			gtt_size = 0;
  			break;
 @@ -587,6 +597,7 @@
  			if (sc->chiptype == CHIP_I915 ||
  			    sc->chiptype == CHIP_I965 ||
  			    sc->chiptype == CHIP_G33 ||
 +			    sc->chiptype == CHIP_IGD ||
  			    sc->chiptype == CHIP_G4X) {
  				stolen = 48 * 1024;
  			} else {
 @@ -597,6 +608,7 @@
  			if (sc->chiptype == CHIP_I915 ||
  			    sc->chiptype == CHIP_I965 ||
  			    sc->chiptype == CHIP_G33 ||
 +			    sc->chiptype == CHIP_IGD ||
  			    sc->chiptype == CHIP_G4X) {
  				stolen = 64 * 1024;
  			} else {
 @@ -606,6 +618,7 @@
  		case AGP_G33_GCC1_GMS_STOLEN_128M:
  			if (sc->chiptype == CHIP_I965 ||
  			    sc->chiptype == CHIP_G33 ||
 +			    sc->chiptype == CHIP_IGD ||
  			    sc->chiptype == CHIP_G4X) {
  				stolen = 128 * 1024;
  			} else {
 @@ -615,6 +628,7 @@
  		case AGP_G33_GCC1_GMS_STOLEN_256M:
  			if (sc->chiptype == CHIP_I965 ||
  			    sc->chiptype == CHIP_G33 ||
 +			    sc->chiptype == CHIP_IGD ||
  			    sc->chiptype == CHIP_G4X) {
  				stolen = 256 * 1024;
  			} else {
 @@ -783,6 +797,7 @@
  	case CHIP_I915:
  	case CHIP_I965:
  	case CHIP_G33:
 +	case CHIP_IGD:
  	case CHIP_G4X:
  		return agp_generic_set_aperture(dev, aperture);
  	}
 @@ -803,7 +818,7 @@
  
  	pte = (u_int32_t)physical | 1;
  	if (sc->chiptype == CHIP_I965 || sc->chiptype == CHIP_G33 ||
 -	    sc->chiptype == CHIP_G4X) {
 +	    sc->chiptype == CHIP_IGD  || sc->chiptype == CHIP_G4X) {
  		pte |= (physical & 0x0000000f00000000ull) >> 28;
  	} else {
  		/* If we do actually have memory above 4GB on an older system,
 @@ -822,6 +837,7 @@
  		    AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4, pte);
  		break;
  	case CHIP_I915:
 +        case CHIP_IGD:
  	case CHIP_G33:
  		bus_write_4(sc->sc_res[1],
  		    (offset >> AGP_PAGE_SHIFT) * 4, pte);
 
 
 ----- End forwarded message -----
State-Changed-From-To: feedback->open 
State-Changed-By: linimon 
State-Changed-When: Tue Feb 2 00:12:49 UTC 2010 
State-Changed-Why:  
patch received. 

http://www.freebsd.org/cgi/query-pr.cgi?pr=143427 
Responsible-Changed-From-To: freebsd-bugs->rnoland 
Responsible-Changed-By: rnoland 
Responsible-Changed-When: Fri Mar 12 16:08:31 UTC 2010 
Responsible-Changed-Why:  
I'll take it. 

http://www.freebsd.org/cgi/query-pr.cgi?pr=143427 
State-Changed-From-To: open->closed 
State-Changed-By: rnoland 
State-Changed-When: Sat Mar 13 11:53:01 UTC 2010 
State-Changed-Why:  
Committed, with minor changes. Thanks! 

http://www.freebsd.org/cgi/query-pr.cgi?pr=143427 

From: dfilter@FreeBSD.ORG (dfilter service)
To: bug-followup@FreeBSD.org
Cc:  
Subject: Re: kern/143427: commit references a PR
Date: Sat, 13 Mar 2010 11:51:27 +0000 (UTC)

 Author: rnoland
 Date: Sat Mar 13 11:51:18 2010
 New Revision: 205120
 URL: http://svn.freebsd.org/changeset/base/205120
 
 Log:
   Add support for Intel Pineview chips, aka IGD
   
   Slightly modified version of the submitted patch.
   
   PR:		143427
   Submitted by:	Mamoru Sumida <msumida@mvc.biglobe.ne.jp>
   MFC after:	3 days
 
 Modified:
   head/sys/dev/drm/drm_pciids.h
   head/sys/dev/drm/i915_drv.h
   head/sys/dev/drm/i915_reg.h
 
 Modified: head/sys/dev/drm/drm_pciids.h
 ==============================================================================
 --- head/sys/dev/drm/drm_pciids.h	Sat Mar 13 11:17:39 2010	(r205119)
 +++ head/sys/dev/drm/drm_pciids.h	Sat Mar 13 11:51:18 2010	(r205120)
 @@ -549,7 +549,9 @@
  	{0x8086, 0x29B2, CHIP_I9XX|CHIP_I915, "Intel Q35"}, \
  	{0x8086, 0x29D2, CHIP_I9XX|CHIP_I915, "Intel Q33"}, \
  	{0x8086, 0x2A42, CHIP_I9XX|CHIP_I965, "Mobile Intel® GM45 Express Chipset"}, \
 -	{0x8086, 0x2E02, CHIP_I9XX|CHIP_I965, "Intel Integrated Graphics Device"}, \
 +	{0x8086, 0x2E02, CHIP_I9XX|CHIP_I965, "Intel Eaglelake"}, \
 +	{0x8086, 0xA001, CHIP_I9XX|CHIP_I965, "Intel Pineview"}, \
 +	{0x8086, 0xA011, CHIP_I9XX|CHIP_I965, "Intel Pineview (M)"}, \
  	{0x8086, 0x2E12, CHIP_I9XX|CHIP_I965, "Intel Q45/Q43"}, \
  	{0x8086, 0x2E22, CHIP_I9XX|CHIP_I965, "Intel G45/G43"}, \
  	{0x8086, 0x2E32, CHIP_I9XX|CHIP_I965, "Intel G41"}, \
 
 Modified: head/sys/dev/drm/i915_drv.h
 ==============================================================================
 --- head/sys/dev/drm/i915_drv.h	Sat Mar 13 11:17:39 2010	(r205119)
 +++ head/sys/dev/drm/i915_drv.h	Sat Mar 13 11:51:18 2010	(r205120)
 @@ -657,15 +657,21 @@ extern int i915_wait_ring(struct drm_dev
  		     (dev)->pci_device == 0x2E32 || \
  		     IS_GM45(dev))
  
 +#define IS_IGDG(dev) ((dev)->pci_device == 0xa001)
 +#define IS_IGDGM(dev) ((dev)->pci_device == 0xa011)
 +#define IS_IGD(dev) (IS_IGDG(dev) || IS_IGDGM(dev))
 +
  #define IS_G33(dev)    ((dev)->pci_device == 0x29C2 ||	\
  			(dev)->pci_device == 0x29B2 ||	\
 -			(dev)->pci_device == 0x29D2)
 +			(dev)->pci_device == 0x29D2 ||  \
 +			IS_IGD(DEV))
  
  #define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \
  		      IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev))
  
  #define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \
 -			IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev))
 +			IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev) || \
 +			IS_IGD(dev))
  
  #define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_GM45(dev) || IS_G4X(dev))
  
 
 Modified: head/sys/dev/drm/i915_reg.h
 ==============================================================================
 --- head/sys/dev/drm/i915_reg.h	Sat Mar 13 11:17:39 2010	(r205119)
 +++ head/sys/dev/drm/i915_reg.h	Sat Mar 13 11:51:18 2010	(r205120)
 @@ -362,6 +362,7 @@ __FBSDID("$FreeBSD$");
  #define   DPLLB_LVDS_P2_CLOCK_DIV_7	(1 << 24) /* i915 */
  #define   DPLL_P2_CLOCK_DIV_MASK	0x03000000 /* i915 */
  #define   DPLL_FPA01_P1_POST_DIV_MASK	0x00ff0000 /* i915 */
 +#define   DPLL_FPA01_P1_POST_DIV_MASK_IGD 0x00ff8000 /* IGD */
  
  #define I915_FIFO_UNDERRUN_STATUS		(1UL<<31)
  #define I915_CRC_ERROR_ENABLE			(1UL<<29)
 @@ -438,6 +439,7 @@ __FBSDID("$FreeBSD$");
   */
  #define   DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS	0x003f0000
  #define   DPLL_FPA01_P1_POST_DIV_SHIFT	16
 +#define   DPLL_FPA01_P1_POST_DIV_SHIFT_IGD	15
  /* i830, required in DVO non-gang */
  #define   PLL_P2_DIVIDE_BY_4		(1 << 23)
  #define   PLL_P1_DIVIDE_BY_TWO		(1 << 21) /* i830 */
 @@ -504,10 +506,12 @@ __FBSDID("$FreeBSD$");
  #define FPB0	0x06048
  #define FPB1	0x0604c
  #define   FP_N_DIV_MASK		0x003f0000
 +#define   FP_N_IGD_DIV_MASK	0x00ff0000
  #define   FP_N_DIV_SHIFT		16
  #define   FP_M1_DIV_MASK	0x00003f00
  #define   FP_M1_DIV_SHIFT		 8
  #define   FP_M2_DIV_MASK	0x0000003f
 +#define   FP_M2_IGD_DIV_MASK	0x000000ff
  #define   FP_M2_DIV_SHIFT		 0
  #define DPLL_TEST	0x606c
  #define   DPLLB_TEST_SDVO_DIV_1		(0 << 22)
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