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Message-Id: <200911031543.nA3FhD7Y000973@fit.md.ayatan.org>
Date: Wed, 4 Nov 2009 00:43:13 +0900 (JST)
From: Tomokazu HARADA <tharada@oucrc.org>
Reply-To: Tomokazu HARADA <tharada@oucrc.org>
To: FreeBSD-gnats-submit@freebsd.org
Cc:
Subject: [atapci] Intel SCH UDMA5 support
X-Send-Pr-Version: 3.113
X-GNATS-Notify:

>Number:         140251
>Category:       kern
>Synopsis:       [ata] [patch] add UDMA5 support to Intel SCH
>Confidential:   no
>Severity:       non-critical
>Priority:       medium
>Responsible:    freebsd-bugs
>State:          closed
>Quarter:        
>Keywords:       
>Date-Required:  
>Class:          sw-bug
>Submitter-Id:   current-users
>Arrival-Date:   Tue Nov 03 16:20:02 UTC 2009
>Closed-Date:    Tue Jan 19 13:44:08 UTC 2010
>Last-Modified:  Tue Jan 19 13:44:08 UTC 2010
>Originator:     Tomokazu HARADA
>Release:        FreeBSD 8.0-RC2 i386
>Organization:
>Environment:
System: FreeBSD fit.md.ayatan.org 8.0-RC2 FreeBSD 8.0-RC2 #6: Wed Nov 4 00:06:43 JST 2009 root@fit.md.ayatan.org:/usr/obj/usr/src/sys/GENERIC i386

This is a fit-PC2 C1100, Atom Z510 with Intel US15W chipsets

>Description:
I made a patch for ata-intel.
After this patch applied, Intel SCH can UDMA5.

 - timing registers are differnt from PIIX or ICHs
 - secondary channel not exists
 - no cable-report registers

--- ata-pci.h.orig	2009-11-04 00:06:06.622342000 +0900
+++ ata-pci.h	2009-11-04 00:38:09.000000000 +0900
@@ -196,6 +196,7 @@
 #define ATA_I82801JD_R1         0x3a058086
 #define ATA_I82801JD_S2         0x3a068086
 #define ATA_I31244              0x32008086
+#define ATA_ISCH                0x811a8086
 
 #define ATA_ITE_ID              0x1283
 #define ATA_IT8211F             0x82111283
--- chipsets/ata-intel.c.orig	2009-11-04 00:06:01.785689000 +0900
+++ chipsets/ata-intel.c	2009-11-04 00:38:25.000000000 +0900
@@ -57,6 +57,7 @@
 static void ata_intel_reset(device_t dev);
 static void ata_intel_old_setmode(device_t dev, int mode);
 static void ata_intel_new_setmode(device_t dev, int mode);
+static void ata_intel_sch_setmode(device_t dev, int mode);
 static void ata_intel_sata_setmode(device_t dev, int mode);
 static int ata_intel_31244_ch_attach(device_t dev);
 static int ata_intel_31244_ch_detach(device_t dev);
@@ -136,6 +137,7 @@
      { ATA_I82801JD_R1,  0, INTEL_AHCI, 0, ATA_SA300, "ICH10" },
      { ATA_I82801JD_S2,  0, INTEL_AHCI, 0, ATA_SA300, "ICH10" },
      { ATA_I31244,       0,          0, 2, ATA_SA150, "31244" },
+     { ATA_ISCH,         0,          0, 1, ATA_UDMA5, "SCH" },
      { 0, 0, 0, 0, 0, 0}};
 
     if (pci_get_vendor(dev) != ATA_INTEL_ID)
@@ -179,6 +181,14 @@
 	ctlr->setmode = ata_sata_setmode;
     }
 
+    /* SCH */
+    else if (ctlr->chip->chipid == ATA_ISCH) {
+	ctlr->channels = 1;
+	ctlr->ch_attach = ata_intel_ch_attach;
+	ctlr->ch_detach = ata_pci_ch_detach;
+	ctlr->setmode = ata_intel_sch_setmode;
+    }
+
     /* non SATA intel chips goes here */
     else if (ctlr->chip->max_dma < ATA_SA150) {
 	ctlr->channels = ctlr->chip->cfg2;
@@ -364,6 +374,43 @@
 }
 
 static void
+ata_intel_sch_setmode(device_t dev, int mode)
+{
+    device_t gparent = GRANDPARENT(dev);
+    struct ata_pci_controller *ctlr = device_get_softc(gparent);
+    struct ata_device *atadev = device_get_softc(dev);
+    u_int8_t dtim = 0x80 + (atadev->unit << 2);
+    u_int32_t tim = pci_read_config(gparent, dtim, 4);
+    int error;
+
+    mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma);
+
+    error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode);
+
+    if (bootverbose)
+	device_printf(dev, "%ssetting %s on %s chip\n",
+		      (error) ? "FAILURE " : "",
+		      ata_mode2str(mode), ctlr->chip->text);
+    if (!error) {
+	if (mode >= ATA_UDMA0) {
+	    tim |= (0x1 << 31);
+	    tim |= ((mode & ATA_MODE_MASK) << 16);
+	}
+	else if (mode >= ATA_WDMA0) {
+	    tim &= ~(0x1 << 31);
+	    tim |= ((mode & ATA_MODE_MASK) << 8);
+	}
+	else if (mode >= ATA_PIO0) {
+	    tim |= (mode - ATA_PIO0);
+	}
+
+	pci_write_config(gparent, dtim, tim, 4);
+
+	atadev->mode = mode;
+    }
+}
+
+static void
 ata_intel_sata_setmode(device_t dev, int mode)
 {
     struct ata_device *atadev = device_get_softc(dev);

>How-To-Repeat:
N/A

>Fix:

before patch:
> atapci0: <Intel ATA controller> port 0x1f0-0x1f7,0x3f6,0x170-0x177,0x376,0x1810-0x181f at device 31.1 on pci0
> ata0: <ATA channel 0> on atapci0
> ata0: [ITHREAD]
> ata1: <ATA channel 1> on atapci0
> ata1: [ITHREAD]
> ad0: 76319MB <INTEL SSDSA2M080G2GC 2CV102G9> at ata0-master UDMA33

after patch:
> atapci0: <Intel SCH UDMA100 controller> port 0x1f0-0x1f7,0x3f6,0x170-0x177,0x376,0x1810-0x181f at device 31.1 on pci0
> ata0: <ATA channel 0> on atapci0
> ata0: [ITHREAD]
> ad0: 76319MB <INTEL SSDSA2M080G2GC 2CV102G9> at ata0-master UDMA100

# pciconf -r pci0:0:31:1 0x00:0x83
811a8086 00000005 01018007 00000000
00000000 00000000 00000000 00000000
00001811 00000000 00000000 81198086
00000000 00000000 00000000 000000ff
00000000 00000000 00000000 00000000
00000000 00000000 00000000 00000000
00000000 00000000 00000000 00000000
00000000 00000000 00000000 00000000
80050204

>Release-Note:
>Audit-Trail:

From: Tomokazu HARADA <tharada@oucrc.org>
To: bug-followup@FreeBSD.org
Cc: tharada@oucrc.org
Subject: Re: kern/140251: [ata] [patch] add UDMA5 support to Intel SCH
Date: Wed, 04 Nov 2009 20:39:29 +0900 (JST)

 Previous patch is broken. Needs additional patch
 
 --- ata-intel.c-	2009-11-04 00:38:25.000000000 +0900
 +++ ata-intel.c	2009-11-04 20:36:01.000000000 +0900
 @@ -394,14 +394,17 @@
      if (!error) {
  	if (mode >= ATA_UDMA0) {
  	    tim |= (0x1 << 31);
 +	    tim &= ~(0x7 << 16);
  	    tim |= ((mode & ATA_MODE_MASK) << 16);
  	}
  	else if (mode >= ATA_WDMA0) {
  	    tim &= ~(0x1 << 31);
 +	    tim &= ~(0x3 << 8);
  	    tim |= ((mode & ATA_MODE_MASK) << 8);
  	}
  	else if (mode >= ATA_PIO0) {
 -	    tim |= (mode - ATA_PIO0);
 +	    tim &= ~(0x7);
 +	    tim |= (mode & 0x7);
  	}
  
  	pci_write_config(gparent, dtim, tim, 4);
 
 -----
 Tomokazu HARADA

From: Alexander Motin <mav@FreeBSD.org>
To: bug-followup@FreeBSD.org, tharada@oucrc.org
Cc:  
Subject: Re: kern/140251: [ata] [patch] add UDMA5 support to Intel SCH
Date: Sun, 20 Dec 2009 19:00:22 +0200

 This is a multi-part message in MIME format.
 --------------040801080100080604020102
 Content-Type: text/plain; charset=KOI8-R
 Content-Transfer-Encoding: 7bit
 
 ATA code changed a lot last time. Could you test updated patch from
 attachment on HEAD/8-STABLE? If it works, I'll commit it.
 
 -- 
 Alexander Motin
 
 --------------040801080100080604020102
 Content-Type: text/plain;
  name="sch.patch"
 Content-Transfer-Encoding: 7bit
 Content-Disposition: inline;
  filename="sch.patch"
 
 diff -ruNp ata.prev/ata-pci.h ata/ata-pci.h
 --- ata.prev/ata-pci.h	2009-12-18 22:42:19.000000000 +0200
 +++ ata/ata-pci.h	2009-12-20 18:35:37.000000000 +0200
 @@ -204,6 +204,7 @@ struct ata_pci_controller {
  #define ATA_I82801JI_R1         0x3a258086
  #define ATA_I82801JI_S2         0x3a268086
  #define ATA_I31244              0x32008086
 +#define ATA_ISCH                0x811a8086
  
  #define ATA_ITE_ID              0x1283
  #define ATA_IT8211F             0x82111283
 diff -ruNp ata.prev/chipsets/ata-intel.c ata/chipsets/ata-intel.c
 --- ata.prev/chipsets/ata-intel.c	2009-12-06 13:25:36.000000000 +0200
 +++ ata/chipsets/ata-intel.c	2009-12-20 18:48:38.000000000 +0200
 @@ -57,6 +57,7 @@ static int ata_intel_ch_attach(device_t 
  static void ata_intel_reset(device_t dev);
  static int ata_intel_old_setmode(device_t dev, int target, int mode);
  static int ata_intel_new_setmode(device_t dev, int target, int mode);
 +static int ata_intel_sch_setmode(device_t dev, int target, int mode);
  static int ata_intel_sata_getrev(device_t dev, int target);
  static int ata_intel_31244_ch_attach(device_t dev);
  static int ata_intel_31244_ch_detach(device_t dev);
 @@ -140,6 +141,7 @@ ata_intel_probe(device_t dev)
       { ATA_I82801JI_R1,  0, INTEL_AHCI, 0, ATA_SA300, "ICH10" },
       { ATA_I82801JI_S2,  0, INTEL_AHCI, 0, ATA_SA300, "ICH10" },
       { ATA_I31244,       0,          0, 2, ATA_SA150, "31244" },
 +     { ATA_ISCH,         0,          0, 1, ATA_UDMA5, "SCH" },
       { 0, 0, 0, 0, 0, 0}};
  
      if (pci_get_vendor(dev) != ATA_INTEL_ID)
 @@ -183,7 +185,13 @@ ata_intel_chipinit(device_t dev)
  	ctlr->setmode = ata_sata_setmode;
  	ctlr->getrev = ata_sata_getrev;
      }
 -
 +    /* SCH */
 +    else if (ctlr->chip->chipid == ATA_ISCH) {
 +	ctlr->channels = 1;
 +	ctlr->ch_attach = ata_intel_ch_attach;
 +	ctlr->ch_detach = ata_pci_ch_detach;
 +	ctlr->setmode = ata_intel_sch_setmode;
 +    }
      /* non SATA intel chips goes here */
      else if (ctlr->chip->max_dma < ATA_SA150) {
  	ctlr->channels = ctlr->chip->cfg2;
 @@ -245,7 +253,7 @@ ata_intel_ch_attach(device_t dev)
  		(pci_read_config(device_get_parent(dev), 0x90, 1) & 0x04) == 0)
  		    ch->flags |= ATA_NO_SLAVE;
  	    ch->flags |= ATA_SATA;
 -    } else
 +    } else if (ctlr->chip->chipid != ATA_ISCH)
  	    ch->flags |= ATA_CHECKS_CABLE;
      return 0;
  }
 @@ -360,6 +368,35 @@ ata_intel_new_setmode(device_t dev, int 
  }
  
  static int
 +ata_intel_sch_setmode(device_t dev, int target, int mode)
 +{
 +	device_t parent = device_get_parent(dev);
 +	struct ata_pci_controller *ctlr = device_get_softc(parent);
 +	u_int8_t dtim = 0x80 + (target << 2);
 +	u_int32_t tim = pci_read_config(parent, dtim, 4);
 +	int piomode;
 +
 +	mode = min(mode, ctlr->chip->max_dma);
 +	if (mode >= ATA_UDMA0) {
 +		tim |= (0x1 << 31);
 +		tim &= ~(0x7 << 16);
 +		tim |= ((mode & ATA_MODE_MASK) << 16);
 +		piomode = ATA_PIO4;
 +	} else if (mode >= ATA_WDMA0) {
 +		tim &= ~(0x1 << 31);
 +		tim &= ~(0x3 << 8);
 +		tim |= ((mode & ATA_MODE_MASK) << 8);
 +		piomode = (mode == ATA_WDMA0) ? ATA_PIO0 :
 +		    (mode == ATA_WDMA1) ? ATA_PIO3 : ATA_PIO4;
 +	} else
 +		piomode = mode;
 +	tim &= ~(0x7);
 +	tim |= (piomode & 0x7);
 +	pci_write_config(parent, dtim, tim, 4);
 +	return (mode);
 +}
 +
 +static int
  ata_intel_sata_getrev(device_t dev, int target)
  {
  	struct ata_channel *ch = device_get_softc(dev);
 
 --------------040801080100080604020102--

From: Tomokazu HARADA <tharada@oucrc.org>
To: bug-followup@FreeBSD.org, mav@FreeBSD.org
Cc: tharada@oucrc.org
Subject: Re: kern/140251: [ata] [patch] add UDMA5 support to Intel SCH
Date: Tue, 22 Dec 2009 21:37:25 +0900 (JST)

 ----Next_Part(Tue_Dec_22_21_37_25_2009_135)--
 Content-Type: Text/Plain; charset=us-ascii
 Content-Transfer-Encoding: 7bit
 
 It runs, but DMA limited to UDMA33. This is another problem
 in ata-all.c. I modified ata-all.c, it goes UDMA100 well.
 
 -----
 Tomokazu HARADA
 
 ----Next_Part(Tue_Dec_22_21_37_25_2009_135)--
 Content-Type: Text/X-Patch; charset=us-ascii
 Content-Transfer-Encoding: 7bit
 Content-Disposition: inline; filename="ata-all.c.patch"
 
 --- ata-all.c.orig	2009-12-22 21:13:40.000000000 +0900
 +++ ata-all.c	2009-12-22 21:15:45.000000000 +0900
 @@ -552,7 +552,8 @@
  	do {
  		pmode = mode = ata_limit_mode(dev, mode, ATA_DMA_MAX);
  		mode = ATA_SETMODE(device_get_parent(dev), atadev->unit, mode);
 -		if ((ch->flags & (ATA_CHECKS_CABLE | ATA_SATA)) == 0)
 +		if ((ch->flags & ATA_CHECKS_CABLE) != 0 &&
 +		    (ch->flags & ATA_SATA) == 0)
  			mode = ata_check_80pin(dev, mode);
  	} while (pmode != mode); /* Interate till successfull negotiation. */
  	error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode);
 
 ----Next_Part(Tue_Dec_22_21_37_25_2009_135)----

From: Alexander Motin <mav@FreeBSD.org>
To: Tomokazu HARADA <tharada@oucrc.org>
Cc: bug-followup@FreeBSD.org
Subject: Re: kern/140251: [ata] [patch] add UDMA5 support to Intel SCH
Date: Tue, 22 Dec 2009 14:45:35 +0200

 Tomokazu HARADA wrote:
 > It runs,
 
 Thanks.
 
 > but DMA limited to UDMA33. This is another problem
 > in ata-all.c. I modified ata-all.c, it goes UDMA100 well.
 
 You are wrong here. As this controller doesn't implement cable
 detection, we have to ask drive about it. Probably your drive reports
 40-wire cable.
 
 -- 
 Alexander Motin

From: Tomokazu HARADA <tharada@oucrc.org>
To: mav@FreeBSD.org
Cc: bug-followup@FreeBSD.org
Subject: Re: kern/140251: [ata] [patch] add UDMA5 support to Intel SCH
Date: Tue, 22 Dec 2009 22:01:06 +0900 (JST)

 >> but DMA limited to UDMA33. This is another problem
 >> in ata-all.c. I modified ata-all.c, it goes UDMA100 well.
 > You are wrong here. As this controller doesn't implement cable
 > detection, we have to ask drive about it. Probably your drive reports
 > 40-wire cable.
 
 I see. atacap->hwres reports 40 wire on this board.
 
 -----
 Tomokazu HARADA

From: dfilter@FreeBSD.ORG (dfilter service)
To: bug-followup@FreeBSD.org
Cc:  
Subject: Re: kern/140251: commit references a PR
Date: Tue, 22 Dec 2009 19:48:21 +0000 (UTC)

 Author: mav
 Date: Tue Dec 22 19:48:06 2009
 New Revision: 200857
 URL: http://svn.freebsd.org/changeset/base/200857
 
 Log:
   Add support for Intel SCH PATA controller.
   
   PR:		kern/140251
 
 Modified:
   head/sys/dev/ata/ata-pci.h
   head/sys/dev/ata/chipsets/ata-intel.c
 
 Modified: head/sys/dev/ata/ata-pci.h
 ==============================================================================
 --- head/sys/dev/ata/ata-pci.h	Tue Dec 22 19:32:16 2009	(r200856)
 +++ head/sys/dev/ata/ata-pci.h	Tue Dec 22 19:48:06 2009	(r200857)
 @@ -204,6 +204,7 @@ struct ata_pci_controller {
  #define ATA_I82801JI_R1         0x3a258086
  #define ATA_I82801JI_S2         0x3a268086
  #define ATA_I31244              0x32008086
 +#define ATA_ISCH                0x811a8086
  
  #define ATA_ITE_ID              0x1283
  #define ATA_IT8211F             0x82111283
 
 Modified: head/sys/dev/ata/chipsets/ata-intel.c
 ==============================================================================
 --- head/sys/dev/ata/chipsets/ata-intel.c	Tue Dec 22 19:32:16 2009	(r200856)
 +++ head/sys/dev/ata/chipsets/ata-intel.c	Tue Dec 22 19:48:06 2009	(r200857)
 @@ -57,6 +57,7 @@ static int ata_intel_ch_attach(device_t 
  static void ata_intel_reset(device_t dev);
  static int ata_intel_old_setmode(device_t dev, int target, int mode);
  static int ata_intel_new_setmode(device_t dev, int target, int mode);
 +static int ata_intel_sch_setmode(device_t dev, int target, int mode);
  static int ata_intel_sata_getrev(device_t dev, int target);
  static int ata_intel_31244_ch_attach(device_t dev);
  static int ata_intel_31244_ch_detach(device_t dev);
 @@ -140,6 +141,7 @@ ata_intel_probe(device_t dev)
       { ATA_I82801JI_R1,  0, INTEL_AHCI, 0, ATA_SA300, "ICH10" },
       { ATA_I82801JI_S2,  0, INTEL_AHCI, 0, ATA_SA300, "ICH10" },
       { ATA_I31244,       0,          0, 2, ATA_SA150, "31244" },
 +     { ATA_ISCH,         0,          0, 1, ATA_UDMA5, "SCH" },
       { 0, 0, 0, 0, 0, 0}};
  
      if (pci_get_vendor(dev) != ATA_INTEL_ID)
 @@ -183,7 +185,13 @@ ata_intel_chipinit(device_t dev)
  	ctlr->setmode = ata_sata_setmode;
  	ctlr->getrev = ata_sata_getrev;
      }
 -
 +    /* SCH */
 +    else if (ctlr->chip->chipid == ATA_ISCH) {
 +	ctlr->channels = 1;
 +	ctlr->ch_attach = ata_intel_ch_attach;
 +	ctlr->ch_detach = ata_pci_ch_detach;
 +	ctlr->setmode = ata_intel_sch_setmode;
 +    }
      /* non SATA intel chips goes here */
      else if (ctlr->chip->max_dma < ATA_SA150) {
  	ctlr->channels = ctlr->chip->cfg2;
 @@ -245,7 +253,7 @@ ata_intel_ch_attach(device_t dev)
  		(pci_read_config(device_get_parent(dev), 0x90, 1) & 0x04) == 0)
  		    ch->flags |= ATA_NO_SLAVE;
  	    ch->flags |= ATA_SATA;
 -    } else
 +    } else if (ctlr->chip->chipid != ATA_ISCH)
  	    ch->flags |= ATA_CHECKS_CABLE;
      return 0;
  }
 @@ -360,6 +368,35 @@ ata_intel_new_setmode(device_t dev, int 
  }
  
  static int
 +ata_intel_sch_setmode(device_t dev, int target, int mode)
 +{
 +	device_t parent = device_get_parent(dev);
 +	struct ata_pci_controller *ctlr = device_get_softc(parent);
 +	u_int8_t dtim = 0x80 + (target << 2);
 +	u_int32_t tim = pci_read_config(parent, dtim, 4);
 +	int piomode;
 +
 +	mode = min(mode, ctlr->chip->max_dma);
 +	if (mode >= ATA_UDMA0) {
 +		tim |= (0x1 << 31);
 +		tim &= ~(0x7 << 16);
 +		tim |= ((mode & ATA_MODE_MASK) << 16);
 +		piomode = ATA_PIO4;
 +	} else if (mode >= ATA_WDMA0) {
 +		tim &= ~(0x1 << 31);
 +		tim &= ~(0x3 << 8);
 +		tim |= ((mode & ATA_MODE_MASK) << 8);
 +		piomode = (mode == ATA_WDMA0) ? ATA_PIO0 :
 +		    (mode == ATA_WDMA1) ? ATA_PIO3 : ATA_PIO4;
 +	} else
 +		piomode = mode;
 +	tim &= ~(0x7);
 +	tim |= (piomode & 0x7);
 +	pci_write_config(parent, dtim, tim, 4);
 +	return (mode);
 +}
 +
 +static int
  ata_intel_sata_getrev(device_t dev, int target)
  {
  	struct ata_channel *ch = device_get_softc(dev);
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From: dfilter@FreeBSD.ORG (dfilter service)
To: bug-followup@FreeBSD.org
Cc:  
Subject: Re: kern/140251: commit references a PR
Date: Tue, 19 Jan 2010 13:26:54 +0000 (UTC)

 Author: mav
 Date: Tue Jan 19 13:26:45 2010
 New Revision: 202621
 URL: http://svn.freebsd.org/changeset/base/202621
 
 Log:
   MFC r200857:
   Add support for Intel SCH PATA controller.
   
   PR:             kern/140251
 
 Modified:
   stable/8/sys/dev/ata/ata-pci.h
   stable/8/sys/dev/ata/chipsets/ata-intel.c
 Directory Properties:
   stable/8/sys/   (props changed)
   stable/8/sys/amd64/include/xen/   (props changed)
   stable/8/sys/cddl/contrib/opensolaris/   (props changed)
   stable/8/sys/contrib/dev/acpica/   (props changed)
   stable/8/sys/contrib/pf/   (props changed)
   stable/8/sys/dev/xen/xenpci/   (props changed)
 
 Modified: stable/8/sys/dev/ata/ata-pci.h
 ==============================================================================
 --- stable/8/sys/dev/ata/ata-pci.h	Tue Jan 19 13:25:31 2010	(r202620)
 +++ stable/8/sys/dev/ata/ata-pci.h	Tue Jan 19 13:26:45 2010	(r202621)
 @@ -204,6 +204,7 @@ struct ata_pci_controller {
  #define ATA_I82801JI_R1         0x3a258086
  #define ATA_I82801JI_S2         0x3a268086
  #define ATA_I31244              0x32008086
 +#define ATA_ISCH                0x811a8086
  
  #define ATA_ITE_ID              0x1283
  #define ATA_IT8211F             0x82111283
 
 Modified: stable/8/sys/dev/ata/chipsets/ata-intel.c
 ==============================================================================
 --- stable/8/sys/dev/ata/chipsets/ata-intel.c	Tue Jan 19 13:25:31 2010	(r202620)
 +++ stable/8/sys/dev/ata/chipsets/ata-intel.c	Tue Jan 19 13:26:45 2010	(r202621)
 @@ -57,6 +57,7 @@ static int ata_intel_ch_attach(device_t 
  static void ata_intel_reset(device_t dev);
  static int ata_intel_old_setmode(device_t dev, int target, int mode);
  static int ata_intel_new_setmode(device_t dev, int target, int mode);
 +static int ata_intel_sch_setmode(device_t dev, int target, int mode);
  static int ata_intel_sata_getrev(device_t dev, int target);
  static int ata_intel_31244_ch_attach(device_t dev);
  static int ata_intel_31244_ch_detach(device_t dev);
 @@ -140,6 +141,7 @@ ata_intel_probe(device_t dev)
       { ATA_I82801JI_R1,  0, INTEL_AHCI, 0, ATA_SA300, "ICH10" },
       { ATA_I82801JI_S2,  0, INTEL_AHCI, 0, ATA_SA300, "ICH10" },
       { ATA_I31244,       0,          0, 2, ATA_SA150, "31244" },
 +     { ATA_ISCH,         0,          0, 1, ATA_UDMA5, "SCH" },
       { 0, 0, 0, 0, 0, 0}};
  
      if (pci_get_vendor(dev) != ATA_INTEL_ID)
 @@ -183,7 +185,13 @@ ata_intel_chipinit(device_t dev)
  	ctlr->setmode = ata_sata_setmode;
  	ctlr->getrev = ata_sata_getrev;
      }
 -
 +    /* SCH */
 +    else if (ctlr->chip->chipid == ATA_ISCH) {
 +	ctlr->channels = 1;
 +	ctlr->ch_attach = ata_intel_ch_attach;
 +	ctlr->ch_detach = ata_pci_ch_detach;
 +	ctlr->setmode = ata_intel_sch_setmode;
 +    }
      /* non SATA intel chips goes here */
      else if (ctlr->chip->max_dma < ATA_SA150) {
  	ctlr->channels = ctlr->chip->cfg2;
 @@ -245,7 +253,7 @@ ata_intel_ch_attach(device_t dev)
  		(pci_read_config(device_get_parent(dev), 0x90, 1) & 0x04) == 0)
  		    ch->flags |= ATA_NO_SLAVE;
  	    ch->flags |= ATA_SATA;
 -    } else
 +    } else if (ctlr->chip->chipid != ATA_ISCH)
  	    ch->flags |= ATA_CHECKS_CABLE;
      return 0;
  }
 @@ -360,6 +368,35 @@ ata_intel_new_setmode(device_t dev, int 
  }
  
  static int
 +ata_intel_sch_setmode(device_t dev, int target, int mode)
 +{
 +	device_t parent = device_get_parent(dev);
 +	struct ata_pci_controller *ctlr = device_get_softc(parent);
 +	u_int8_t dtim = 0x80 + (target << 2);
 +	u_int32_t tim = pci_read_config(parent, dtim, 4);
 +	int piomode;
 +
 +	mode = min(mode, ctlr->chip->max_dma);
 +	if (mode >= ATA_UDMA0) {
 +		tim |= (0x1 << 31);
 +		tim &= ~(0x7 << 16);
 +		tim |= ((mode & ATA_MODE_MASK) << 16);
 +		piomode = ATA_PIO4;
 +	} else if (mode >= ATA_WDMA0) {
 +		tim &= ~(0x1 << 31);
 +		tim &= ~(0x3 << 8);
 +		tim |= ((mode & ATA_MODE_MASK) << 8);
 +		piomode = (mode == ATA_WDMA0) ? ATA_PIO0 :
 +		    (mode == ATA_WDMA1) ? ATA_PIO3 : ATA_PIO4;
 +	} else
 +		piomode = mode;
 +	tim &= ~(0x7);
 +	tim |= (piomode & 0x7);
 +	pci_write_config(parent, dtim, tim, 4);
 +	return (mode);
 +}
 +
 +static int
  ata_intel_sata_getrev(device_t dev, int target)
  {
  	struct ata_channel *ch = device_get_softc(dev);
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State-Changed-From-To: open->closed 
State-Changed-By: mav 
State-Changed-When: Tue Jan 19 13:43:45 UTC 2010 
State-Changed-Why:  
Patch merged to 8-STABLE. 

http://www.freebsd.org/cgi/query-pr.cgi?pr=140251 
>Unformatted:
