From nobody@FreeBSD.org  Tue Jan 14 20:13:47 2014
Return-Path: <nobody@FreeBSD.org>
Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1])
	(using TLSv1 with cipher ADH-AES256-SHA (256/256 bits))
	(No client certificate requested)
	by hub.freebsd.org (Postfix) with ESMTPS id B3283C8D
	for <freebsd-gnats-submit@FreeBSD.org>; Tue, 14 Jan 2014 20:13:47 +0000 (UTC)
Received: from oldred.freebsd.org (oldred.freebsd.org [IPv6:2001:1900:2254:206a::50:4])
	(using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits))
	(No client certificate requested)
	by mx1.freebsd.org (Postfix) with ESMTPS id 9428E1F4C
	for <freebsd-gnats-submit@FreeBSD.org>; Tue, 14 Jan 2014 20:13:47 +0000 (UTC)
Received: from oldred.freebsd.org ([127.0.1.6])
	by oldred.freebsd.org (8.14.5/8.14.7) with ESMTP id s0EKDk24082652
	for <freebsd-gnats-submit@FreeBSD.org>; Tue, 14 Jan 2014 20:13:46 GMT
	(envelope-from nobody@oldred.freebsd.org)
Received: (from nobody@localhost)
	by oldred.freebsd.org (8.14.5/8.14.5/Submit) id s0EKDkOk082646;
	Tue, 14 Jan 2014 20:13:46 GMT
	(envelope-from nobody)
Message-Id: <201401142013.s0EKDkOk082646@oldred.freebsd.org>
Date: Tue, 14 Jan 2014 20:13:46 GMT
From: Matthew Rezny <matthew@reztek.cz>
To: freebsd-gnats-submit@FreeBSD.org
Subject: Using non-generic -march for optimization on non-Intel family 5/6 processors results in invalid instruction
X-Send-Pr-Version: www-3.1
X-GNATS-Notify:

>Number:         185777
>Category:       bin
>Synopsis:       [clang]: Using non-generic -march for optimization on non-Intel family 5/6 processors results in invalid instruction
>Confidential:   no
>Severity:       non-critical
>Priority:       low
>Responsible:    dim
>State:          closed
>Quarter:        
>Keywords:       
>Date-Required:  
>Class:          sw-bug
>Submitter-Id:   current-users
>Arrival-Date:   Tue Jan 14 20:20:00 UTC 2014
>Closed-Date:    Mon Feb 10 20:39:56 UTC 2014
>Last-Modified:  Mon Feb 10 20:39:56 UTC 2014
>Originator:     Matthew Rezny
>Release:        10.0-RC4
>Organization:
RezTek, s.r.o.
>Environment:
FreeBSD service2.reztek 10.0-PRERELEASE FreeBSD 10.0-PRERELEASE #1: Sun Jan 12 08:55:24 CET 2014 root@service2.reztek:/usr/obj/usr/src/sys/CUSTOM i386

>Description:
The version of clang we have in 9.2 and the upcoming 10.0 mistakenly uses nopl instructions on CPUs that do not understand it. nopl was introduced in PentiumPro and included in all following Intel processors, but was not documented. Most non-Intel processors did not add the instruction until several models later. 

Thus, Clang avoids using nopl with -march=i686 but will use it with more specific CPU types. However, the exclusion list in Clang 3.3 is incomplete. Notably missing are AMD K6 and Via C3 processors, both of which I have in use. This is corrected in Clang/LLVM 3.4, but it's a little late to go change compiler versions. Fortunately, the change is a simple patch that can be applied to Clang 3.3.
>How-To-Repeat:
Buildworld with CPUTYPE?=k6 or c3 and CFLAGS= -O2, install the result on a system with k6 or c3 family processor, and attempt to boot. Invalid opcode in init prevents going multiuser. Invalid opcode in /bin/sh prevents single user shell.

>Fix:
Apply r195679 (attached for convenience) from LLVM repo and rebuild Clang. I have manually applied the patch and gone through two buildwould/installworld cycles (once with -march=pentium-mmx to get a Clang with the patch applied, and once with -marcg=c3 to get a world with the patch in effect) on a C3-800. I have not yet tested on a K6 but the patch is simple enough to be almost absolutely sure it will work. The patch adds all k6, c3 and winchip models to the exclusion list, which already included geode, pentium(-mmx) and i586/i686.

Too bad I didn't catch this sooner to have allowed the patch to possibly get into the 10.0 release. Of course, I got around to trying 10 on the slowest boxes last so hit this problem on my K6 and C3 machines just before it's release time. Hopefully this patch can go to HEAD and 9/10-STABLE to take care of this prior to the eventual upgrade to LLVM 3.4.



Patch attached with submission follows:

--- llvm.orig/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp 2013-11-03 00:24:20.000000000 +0100
+++ llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp 2013-11-03 20:57:14.000000000 +0100
@@ -309,7 +309,10 @@ bool X86AsmBackend::writeNopData(uint64_
   // This CPU doesnt support long nops. If needed add more.
   // FIXME: Can we get this from the subtarget somehow?
   if (CPU == "generic" || CPU == "i386" || CPU == "i486" || CPU == "i586" ||
-      CPU == "pentium" || CPU == "pentium-mmx" || CPU == "geode") {
+      CPU == "pentium" || CPU == "pentium-mmx" || CPU == "i686" ||
+      CPU == "k6" || CPU == "k6-2" || CPU == "k6-3" || CPU == "geode" ||
+      CPU == "winchip-c6" || CPU == "winchip2" || CPU == "c3" ||
+      CPU == "c3-2") {
     for (uint64_t i = 0; i < Count; ++i)
       OW->Write8(0x90);
     return true;


>Release-Note:
>Audit-Trail:
Responsible-Changed-From-To: freebsd-i386->dim 
Responsible-Changed-By: remko 
Responsible-Changed-When: Fri Jan 24 08:19:42 UTC 2014 
Responsible-Changed-Why:  
Hi dim, can you have a look at the proposed diff for clang? 

http://www.freebsd.org/cgi/query-pr.cgi?pr=185777 

From: Dimitry Andric <dim@FreeBSD.org>
To: bug-followup@FreeBSD.org,
 matthew@reztek.cz
Cc:  
Subject: Re: bin/185777: [clang]: Using non-generic -march for optimization on non-Intel family 5/6 processors results in invalid instruction
Date: Sat, 25 Jan 2014 17:38:32 +0100

 --Apple-Mail=_E86A0D48-12E2-4AAB-A125-DB482790DC91
 Content-Transfer-Encoding: 7bit
 Content-Type: text/plain;
 	charset=us-ascii
 
 Applied in head in r261162.  (Note I will import clang 3.4 fairly soon
 now, which already has this fix, but this way I can MFC it to the stable
 branches much earlier.)
 
 -Dimitry
 
 
 --Apple-Mail=_E86A0D48-12E2-4AAB-A125-DB482790DC91
 Content-Transfer-Encoding: 7bit
 Content-Disposition: attachment;
 	filename=signature.asc
 Content-Type: application/pgp-signature;
 	name=signature.asc
 Content-Description: Message signed with OpenPGP using GPGMail
 
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG/MacGPG2 v2.0.22 (Darwin)
 
 iEYEARECAAYFAlLj6JAACgkQsF6jCi4glqOLDQCfYG/DDY2p0HBg8nUcwjUu3sld
 KwUAn2xDterT8vo71JF5My3gh/kK+T7c
 =zWud
 -----END PGP SIGNATURE-----
 
 --Apple-Mail=_E86A0D48-12E2-4AAB-A125-DB482790DC91--

From: dfilter@FreeBSD.ORG (dfilter service)
To: bug-followup@FreeBSD.org
Cc:  
Subject: Re: bin/185777: commit references a PR
Date: Sat, 25 Jan 2014 16:36:04 +0000 (UTC)

 Author: dim
 Date: Sat Jan 25 16:35:56 2014
 New Revision: 261162
 URL: http://svnweb.freebsd.org/changeset/base/261162
 
 Log:
   Pull in r195679 from upstream llvm trunk:
   
     Don't use nopl in cpus that don't support it.
   
     Patch by Mikulas Patocka. I added the test. I checked that for cpu names that
     gas knows about, it also doesn't generate nopl.
   
     The modified cpus:
     i686 - there are i686-class CPUs that don't have nopl: Via c3, Transmeta
            Crusoe, Microsoft VirtualBox - see
            https://bbs.archlinux.org/viewtopic.php?pid=775414
     k6, k6-2, k6-3, winchip-c6, winchip2 - these are 586-class CPUs
     via c3 c3-2 - see https://bugs.archlinux.org/task/19733 as a proof that
            Via c3 and c3-Nehemiah don't have nopl
   
   PR:		bin/185777
   MFC after:	3 days
 
 Modified:
   head/contrib/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
 
 Modified: head/contrib/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
 ==============================================================================
 --- head/contrib/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp	Sat Jan 25 16:03:08 2014	(r261161)
 +++ head/contrib/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp	Sat Jan 25 16:35:56 2014	(r261162)
 @@ -308,8 +308,12 @@ bool X86AsmBackend::writeNopData(uint64_
  
    // This CPU doesnt support long nops. If needed add more.
    // FIXME: Can we get this from the subtarget somehow?
 +  // FIXME: We could generated something better than plain 0x90.
    if (CPU == "generic" || CPU == "i386" || CPU == "i486" || CPU == "i586" ||
 -      CPU == "pentium" || CPU == "pentium-mmx" || CPU == "geode") {
 +      CPU == "pentium" || CPU == "pentium-mmx" || CPU == "i686" ||
 +      CPU == "k6" || CPU == "k6-2" || CPU == "k6-3" || CPU == "geode" ||
 +      CPU == "winchip-c6" || CPU == "winchip2" || CPU == "c3" ||
 +      CPU == "c3-2") {
      for (uint64_t i = 0; i < Count; ++i)
        OW->Write8(0x90);
      return true;
 _______________________________________________
 svn-src-all@freebsd.org mailing list
 http://lists.freebsd.org/mailman/listinfo/svn-src-all
 To unsubscribe, send any mail to "svn-src-all-unsubscribe@freebsd.org"
 

From: dfilter@FreeBSD.ORG (dfilter service)
To: bug-followup@FreeBSD.org
Cc:  
Subject: Re: bin/185777: commit references a PR
Date: Tue, 28 Jan 2014 08:07:34 +0000 (UTC)

 Author: dim
 Date: Tue Jan 28 08:07:19 2014
 New Revision: 261225
 URL: http://svnweb.freebsd.org/changeset/base/261225
 
 Log:
   MFC r261162:
   
   Pull in r195679 from upstream llvm trunk:
   
     Don't use nopl in cpus that don't support it.
   
     Patch by Mikulas Patocka. I added the test. I checked that for cpu names that
     gas knows about, it also doesn't generate nopl.
   
     The modified cpus:
     i686 - there are i686-class CPUs that don't have nopl: Via c3, Transmeta
   	 Crusoe, Microsoft VirtualBox - see
   	 https://bbs.archlinux.org/viewtopic.php?pid=775414
     k6, k6-2, k6-3, winchip-c6, winchip2 - these are 586-class CPUs
     via c3 c3-2 - see https://bugs.archlinux.org/task/19733 as a proof that
   	 Via c3 and c3-Nehemiah don't have nopl
   
   PR:		bin/185777
 
 Modified:
   stable/10/contrib/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
 Directory Properties:
   stable/10/   (props changed)
 
 Changes in other areas also in this revision:
 Modified:
   stable/9/contrib/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
 Directory Properties:
   stable/9/contrib/llvm/   (props changed)
 
 Modified: stable/10/contrib/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
 ==============================================================================
 --- stable/10/contrib/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp	Tue Jan 28 07:21:46 2014	(r261224)
 +++ stable/10/contrib/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp	Tue Jan 28 08:07:19 2014	(r261225)
 @@ -308,8 +308,12 @@ bool X86AsmBackend::writeNopData(uint64_
  
    // This CPU doesnt support long nops. If needed add more.
    // FIXME: Can we get this from the subtarget somehow?
 +  // FIXME: We could generated something better than plain 0x90.
    if (CPU == "generic" || CPU == "i386" || CPU == "i486" || CPU == "i586" ||
 -      CPU == "pentium" || CPU == "pentium-mmx" || CPU == "geode") {
 +      CPU == "pentium" || CPU == "pentium-mmx" || CPU == "i686" ||
 +      CPU == "k6" || CPU == "k6-2" || CPU == "k6-3" || CPU == "geode" ||
 +      CPU == "winchip-c6" || CPU == "winchip2" || CPU == "c3" ||
 +      CPU == "c3-2") {
      for (uint64_t i = 0; i < Count; ++i)
        OW->Write8(0x90);
      return true;
 _______________________________________________
 svn-src-all@freebsd.org mailing list
 http://lists.freebsd.org/mailman/listinfo/svn-src-all
 To unsubscribe, send any mail to "svn-src-all-unsubscribe@freebsd.org"
 

From: dfilter@FreeBSD.ORG (dfilter service)
To: bug-followup@FreeBSD.org
Cc:  
Subject: Re: bin/185777: commit references a PR
Date: Tue, 28 Jan 2014 08:07:27 +0000 (UTC)

 Author: dim
 Date: Tue Jan 28 08:07:19 2014
 New Revision: 261225
 URL: http://svnweb.freebsd.org/changeset/base/261225
 
 Log:
   MFC r261162:
   
   Pull in r195679 from upstream llvm trunk:
   
     Don't use nopl in cpus that don't support it.
   
     Patch by Mikulas Patocka. I added the test. I checked that for cpu names that
     gas knows about, it also doesn't generate nopl.
   
     The modified cpus:
     i686 - there are i686-class CPUs that don't have nopl: Via c3, Transmeta
   	 Crusoe, Microsoft VirtualBox - see
   	 https://bbs.archlinux.org/viewtopic.php?pid=775414
     k6, k6-2, k6-3, winchip-c6, winchip2 - these are 586-class CPUs
     via c3 c3-2 - see https://bugs.archlinux.org/task/19733 as a proof that
   	 Via c3 and c3-Nehemiah don't have nopl
   
   PR:		bin/185777
 
 Modified:
   stable/9/contrib/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
 Directory Properties:
   stable/9/contrib/llvm/   (props changed)
 
 Changes in other areas also in this revision:
 Modified:
   stable/10/contrib/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
 Directory Properties:
   stable/10/   (props changed)
 
 Modified: stable/9/contrib/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
 ==============================================================================
 --- stable/9/contrib/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp	Tue Jan 28 07:21:46 2014	(r261224)
 +++ stable/9/contrib/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp	Tue Jan 28 08:07:19 2014	(r261225)
 @@ -308,8 +308,12 @@ bool X86AsmBackend::writeNopData(uint64_
  
    // This CPU doesnt support long nops. If needed add more.
    // FIXME: Can we get this from the subtarget somehow?
 +  // FIXME: We could generated something better than plain 0x90.
    if (CPU == "generic" || CPU == "i386" || CPU == "i486" || CPU == "i586" ||
 -      CPU == "pentium" || CPU == "pentium-mmx" || CPU == "geode") {
 +      CPU == "pentium" || CPU == "pentium-mmx" || CPU == "i686" ||
 +      CPU == "k6" || CPU == "k6-2" || CPU == "k6-3" || CPU == "geode" ||
 +      CPU == "winchip-c6" || CPU == "winchip2" || CPU == "c3" ||
 +      CPU == "c3-2") {
      for (uint64_t i = 0; i < Count; ++i)
        OW->Write8(0x90);
      return true;
 _______________________________________________
 svn-src-all@freebsd.org mailing list
 http://lists.freebsd.org/mailman/listinfo/svn-src-all
 To unsubscribe, send any mail to "svn-src-all-unsubscribe@freebsd.org"
 
State-Changed-From-To: open->closed 
State-Changed-By: dim 
State-Changed-When: Mon Feb 10 20:36:51 UTC 2014 
State-Changed-Why:  
Fix merged to stable/9 and stable/10 in r261225. 

http://www.freebsd.org/cgi/query-pr.cgi?pr=185777 
>Unformatted:
