##########################################################
# Logic Minimizing Library V1.01                          #
# written by Dipl. Inf. Mario Hahnemann                  #
# Technical University Ilmenau Germany                   #
##########################################################

The source code is one part of my final examination on my
university. It`s not perfect, but I have reviewed it now. 
There are 3 parts:

   list.cc   : that includes the basic functions to handle
               logic lists in cube format
   logic.cc  : that's the functions for logic operations,
               minimizing and a simple prime tab
   logmin.cc : the demo program for all functions

You can compile the lib and the demo by simply execute

   make 
or 
   make lib
   
for the lib only.

The functions are decribed in the header files. 
If you want know more about logic minimizion and if you
can understand the german language, I can send you the 
documentation (127 pages in postscript):
   
   "Untersuchung und Implementierung von 
    Minimierungverfahren fuer ein Automaten-
    netz-Entwurfssystem"
   Mario Hahnemann
   TU Ilmenau
   Fakultaet fuer Informatik und Automatisierung
   Diplomarbeit Sig.-Nr.: 200-97D-010
   1998


   
The demo logmin
---------------

Syntax:
   
   logmin [-v | -h] on-set [dc-set] out minimizer primetab
   
-v : for version info
-h : for simple help
on-set : a file that describe the on-set
dc-set : a file that describe the dc-set (all cubes that are
         not in the on-set an not in the off-set)
out : the file who should contain the results
minimizer:
   0  : for ESPRESSO-Signature
   1  : for FULL-Quine (not so fast as 0)
   >1 : Iterate-Quine - you decide the number of iterations
        you get a fast not full minimized result
primetab:
   0  : primetab off
   >0 : number of primetab iterations
   a  : auto iterate (depends from the number of input cubes)

   
The input format
----------------

I use the cube format:
   
   0 the variable is negated
   1 the variable is not negated
   2 the variable is not in the context
   
One disjunction Dx is is defined as:

   VARn AND ... AND VAR1 AND VAR0
   
An logical equation is defined as:
   
   y = D0 OR D1 OR ... OR Dn
   
for 
   y = 0 it's the off-set
   y = 1 it's the on-set
   all other who are not in off or on-set defined as dc-set
   
Every line in a input file is one disjunction and the file
define one of the sets (off, on, dc).

e.g. (+ = OR; / = NOT; none = AND)

the input file for:

   y = x3/x2x1x0 + x3/x0 + x1
   
is:

1011
1220
2212

You can use the character # as comment on begin of line.

Licence
-------

You can't use the lib, the source code, the executable
or parts of them commercial. For non commercial and 
education use you can use all parts and you can change
the source code.
Changed code, libs or executables have the same licence
conditions.
All parts can be free copied.
For different licence conditions ask me.

Literature 
----------
Thanks to:

[1]  Michael Krapp; Digitale Automaten; Verlag Technik GmbH, Berlin; 1991 
[2]  Heinz Dietrich Wuttke, Karsten Henke; Arbeitsblaetter zur 
     Lehrveranstaltung Schaltsysteme; TU-Ilmenau; 1997
[3]  Bronstein Semendjajew; Taschenbuch der Mathematik; 
     BSB B.G. Teubner Verlagsgesellschaft, Stuttgart-Leipzig und Verlag Nauka, 
     Moskau; 1991
[4]  Heinz Dietrich Wuttke, Karsten Henke; Arbeitsblaetter zur 
     Lehrveranstaltung Rechnerorganisation; TU-Ilmenau; 1997
[5]  Nripendra N. Biwas; Logic Design Theory; Indian Institute of Science, 
     Prentice Hall
[6]  Dieter Bochmann, Bernd Steinbach; Logikentwurf mit XBOOLE: 
     Algorithmen und Programme; Verlag Technik, Berlin; 1991
[7]  Galina Kempe, Bern Steinbach; Vergleich der Darstellung einer 
     Boolschen Funktion als TVL und ROBDD; Institut fuer
     Informatik, TU Bergakademie Freiber; 1994
[8]  Galina Kempe, Bern Steinbach; Vergleich der Darstellung 
     einer Boolschen Funktion als TVL und ROBDD; Institut fuer
     nformatik, TU Bergakademie Freiber; 1994
[9]  Fred Grunert; Rechnergestuetzte Auswertung des Karnaugh-Planes; 
     TU-Ilmenau; 1982
[10] Engelwood, Cliffs; An engengineering approach to digital design; 
     Prentice Hall Inc.; 1980
[11] Bronstein, Semendjajew; Taschenbuch der Mathematik Ergaenzende 
     Kapitel; BSB B.G. Teubner Verlagsgesellschaft, Leipzig; 1979 
[12] R. Brayton, G. Hachtel, C. McMullen and A. Sangiovanni-Vincentelli; 
     ESPRESSO-II: A New Logic Minimizer for Programmable Logic Arrays; 
     Custom Integrated Circuits Conference; 1984
[13] R. Brayton, G. Hachtel, C. McMullen and A. Sangiovanni-Vincentelli; 
     Logic Minimization Algorithms for VLSI Synthesis; Kluwer Academic 
     Publishers; 1984
[14] Patrick C. McGeer, Jagesh V. Sanghavi, Robert K. Brayton, 
     Alberto L. Sangiovanni-vincentelli; ESRESSO-SIGNATURE: A
     New Exact Minimizer for Logic Functions; Fujitsu Research, 
     Department of Electrical Engeneering and Computer
     Sciences, University of California Berkeley; 30.04.1996
[15] Oliver Coudert; Doing Two-Level Logic Minimization 100 Times Faster; 
     Synopsys, Inc.; 1996

Contact
-------

hahn@RZ.TU-Ilmenau.DE
mario.hahnemann@smartring.de

Changed code
------------

Please send changed code, bugfixes and algorithm hints to me. If you
develop faster code please tell me changes.


Tested for:
-----------
Linux 2.0.36 gcc 2.7.2.1
Linux 2.2.12 egcs 2.8.xx
Linux 2.2.12 gcc 2.9.xx
Solaris 5 and 7 gcc 2.7.1.1
Solaris 7 gcc 2.8.xx
Solaris      gcc 2.7.1.1