
root:all

SRC= vtga.cc
OBJ= vtga.o

include ../../makefile.inc

all: vtga

vtga.o: vtga.cc
	$(CXX) -c $(CXXOPT) $(CXXMOREOPT) -I$(TAGL_INC) $(CCGPORTS) $< 

vtga:   $(OBJ) 
	$(LDXX) $(OBJ) $(LDXXOPT) $(LDGPORT) $(LDPOLYENG) -o vtga
	$(MV) vtga $(TAGL_BIN2)

include $(DEP)
