

                  README FILE FOR THE HADLOP ARCHITECTURE
                               cond_sum.arc
                               January, 1997

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This architecture simulates an adder based on the Conditional Sum procedure.
One processor element of the 'Logic' primitive has a dimension of 3x2.

The addends are stored in the INPUT primitive. Two horizontal lines of
the INPUT matrix contain a pair of addends.

See the HADLOP Manual (section "Parallel 3D Conditional-Sum-Adder based ..."
for more detail. The architecture of the Conditional Sum Adder described
in the HADLOP Manual (Version 1.0) differs from this architcture. The old
architecture of the Conditional Sum Addercontains contains several INPUT
primitives. These elements served as "help elements". This newer version of
the same adder has been improved. The additional INPUT's are not necessary
any more. We hope to have more time for an adjustment of the HADLOP Manual.
You should be able to understand this new architecture too (after reading the
appropriate chapter of the HADLOP Manual).


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    HADLOP homepage:

    http://www2.informatik.uni-jena.de/pope/HADLOP/hadlop.html

    If you have questions send an e-mail to:

    hadlop@informatik.uni-jena.de


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