`sig
module type Defs =
sig type left type right type eq type diff type state end
type change_kind = Deletion | Insertion | Modification | Preservation
val prefix : (int * Diffing.change_kind) Format_doc.printer
val style : Diffing.change_kind -> Misc.Style.style list
type ('left, 'right, 'eq, 'diff) change =
Delete of 'left
| Insert of 'right
| Keep of 'left * 'right * 'eq
| Change of 'left * 'right * 'diff
val classify : ('a, 'b, 'c, 'd) Diffing.change -> Diffing.change_kind
module Define :
(D : Defs) ->
sig
type nonrec change = (D.left, D.right, D.eq, D.diff) Diffing.change
type patch = Diffing.Define.change list
module type Parameters =
sig
type update_result
val weight : Diffing.Define.change -> int
val test :
D.state -> D.left -> D.right -> (D.eq, D.diff) Stdlib.result
val update :
Diffing.Define.change ->
D.state -> Diffing.Define.Parameters.update_result
end
module type S =
sig
val diff :
D.state ->
D.left array -> D.right array -> Diffing.Define.patch
end
module Simple :
sig
val weight : change -> int
val test : D.state -> D.left -> D.right -> (D.eq, D.diff) result
val update : change -> D.state -> D.state
end -> S
module Left_variadic :
sig
val weight : change -> int
val test : D.state -> D.left -> D.right -> (D.eq, D.diff) result
val update : change -> D.state -> D.state * D.left array
end -> S
module Right_variadic :
sig
val weight : change -> int
val test : D.state -> D.left -> D.right -> (D.eq, D.diff) result
val update : change -> D.state -> D.state * D.right array
end -> S
end
end`