\noindent {\bf Hitachi S-810 and S-820 } \noindent {\bf Vector Register Architecture } \vspace{.1in} \noindent {\bf Architecture:} The S-810 comes in three models: the S-810/5, the S-810/10, and S-810/20 (not available in the United States, only for the Japanese market). The S-820 comes in two models: the S-820/60 and the S-820/80. These may be available outside Japan. \vspace{.1in} \noindent Hitachi's approach has been to employ independent scalar and vector processors. The S-810/20 relies on their current top-of-the-line mainframe (the M280H) for their scalar processor, with a cycle time of 28 nsec, and runs the complete IBM 370 instruction set. The vector unit was designed with a cycle time of 14 nsec. The main memory capacity of the S-810/20 is 256 Mwords. \vspace{.1in} \noindent The model 20 has four floating-point add/logical units and eight combination multiply/divide-add units. In addition, there are two load pipes and two load/store pipes to/from memory, each capable of loads/stores at a rate of two words (64 bits) per cycle. \vspace{.1in} \noindent The vector register capacity is 32 registers, each with a fixed length of 256 elements (64 bits). A unique feature of the Hitachi design is that vectors greater than 256 elements are managed automatically by the hardware. \vspace{.1in} \noindent The more recent S-820 incorporates several enhancements to the S-810 range. Among these are a cycle time of 4 nsec, a change of density from 2K to 5K gates/chip with the delay time reduced from 250 to 200 picoseconds. The PCBs now have 22 instead of 14 layers, contain 100K rather than 50K gates, and have their cable delay reduced from 5nsec/m to 3.8 nsec/m. The number of pipes has been increased to 18 (4 add/logical, 4 multiply/add, 1 divide, 1 mask, 4 load, and 4 load/store) on the model 80. On the 60 all sets of 4 pipes are reduced to 2. There are 512 32 (64-bit) word vector registers. \vspace{.1in} \noindent {\bf Configuration:} A memory of 512 Mbytes is available, and an expanded memory of up to 12 Gbytes with a transfer rate of 2 Gbytes/sec can be supplied. There are 64 I/O channels, rated at 6 Mbytes/sec for an overall transfer rate of 288 Mbytes/sec. \vspace{.1in} \noindent All machines are air cooled. \vspace{.1in} \noindent {\bf Performance:} The scalar speed of the Hitachi S-810 may be slower than either the CRAY X-MP or Fujitsu VP-200. A peak performance of 3 Gflops is claimed for the model 80 and 1.5 Gflops for the model 60. \vspace{.1in} \noindent {\bf Software:} Advanced Editor System for Programming Environment (ASPEN) and interactive timing aids. \vspace{.1in} \noindent {\bf Application:} Application packages include the structural packages MATRIX/HAP and ISAS II/HAP, GRADAS for graphics, HICAD3D for CAD. A partial differential equation solver DEQSOL is integrated with the SGRAF 3-D graphics system. \vspace{.1in} \noindent {\bf Status:} The first installation of an S-810 was an S-810/20 at the University of Tokyo in November 1983. The S-820 range was announced in June 1987, with first shipments in November 1987. \vspace{.1in} \noindent {\bf Contact:} \begin {flushleft} Yoshihiro Koshimizu\\ Hitachi America Ltd.\\ Computer Division\\ 950 Elm Ave.\\ Suite 100\\ San Bruno, CA 94066-3094\\ 415-872-1902\\ \end {flushleft} .