\noindent {\bf Floating Point Systems MP32 SERIES } \noindent {\bf MIMD } \vspace {.1in} \noindent {\bf Architecture:} Both local and global-shared memory. Range of memory sizes available is 1 Mword to 16 Mwords (32-bit) \vspace{.1in} \noindent {\bf Configuration:} Basic chip used M68000 (Control Processor), AMD \& Weitek Chips (arithmetic processor). \noindent Front ends: DG MV Series, Perkin-Elmer, Microvax II, VAX \noindent Peripherals: I/O port, IOP-32. Bus connectivity. \vspace {.1in} \noindent {\bf Software:} Own. IEEE standard 32-bit. \vspace {.1in} \noindent {\bf Languages:} MAX 68 control language, XPAL assembler, MPFORTRAN, XPFORTRAN. \vspace {.1in} \noindent {\bf FORTRAN characteristics:} F77 (MPFORTRAN and XPFORTRAN, which are F77 less I/O and character data type support). Extensions: Calls to coprocessor programs and MAXL. Debugger: MPFORTRAN debugger. Vectorizing/parallelizing capabilities: Horizontal microcode synthesis that allows up to 10 operations to execute simultaneously. \vspace {.1in} \noindent {\bf Performance:} Peak: 18 to 72 Mflops. Benchmarks: 2D CFFT 1024 x 1024 pts - 1.89 sec. (3 coprocessors). \vspace{.1in} \noindent {\bf Applications:} Runs on prototype or on front-end simulator. Software available includes several math libraries: Basic math, Signal, Image, Seismic, and Parallel Processing Constructs. \vspace {.1in} \noindent {\bf Status:} Available since 8/85 \noindent Cost range: \$57,500 to \$125,000 \noindent Proposed market: Signal processing, Image processing, and Computational physics. \vspace {.1in} \noindent {\bf Contact:} \begin{flushleft} Jim Christiansen\\ FPS Computing Inc.\\ 3601 SW Murray Blvd.\\ Beaverton, OR 97005\\ 503-641-3151\\ \pagebreak Duncan Hamilton\\ FPS Computing U.K. Limited\\ Apex House\\ London Road\\ Bracknell\\ Berks RG12 2TE\\ England\\ 0344-56921 Telex (851) 849218 FPS UK G\\ \end{flushleft} .