Posts by matthewvenn@chaos.social
(DIR) Post #ARLaqkU9hsUqi256h6 by matthewvenn@chaos.social
2023-01-05T16:10:42Z
0 likes, 2 repeats
#OpenSourceASIChighlightSOFA (Skywater Opensource FPGAs) are open-source FPGA IPs using the open-source Skywater 130nm PDK and OpenFPGA, an open-source FPGA IP generator for highly-customizable FPGA architectures.#ASIC #UofUhttps://github.com/lnis-uofu/SOFA
(DIR) Post #AVa2erR1s3XMKW7j04 by matthewvenn@chaos.social
2023-05-12T13:30:40Z
0 likes, 0 repeats
@aallan you have it on silent all the time? I would miss calls if it didn't make a sound.
(DIR) Post #AXLbiisvK4E4RKMIpk by matthewvenn@chaos.social
2023-07-04T08:44:15Z
0 likes, 1 repeats
Learn how you can use #TinyTapeout to get your digital designs manufactured on #opensource silicon!Join the webinar this Thursday 10:00 PT / 19:00 CEST / 22:30 ISThttps://streamyard.com/watch/kU7zPXsSACXr
(DIR) Post #AaYSPlpq7tmxxQ1Tlo by matthewvenn@chaos.social
2023-10-07T19:06:55Z
0 likes, 1 repeats
One of the reasons I created #TinyTapeout was to be able to guarantee #ASIC manufacture for all participants of my course!https://zerotoasiccourse.com/
(DIR) Post #AbEHZSEUlcNRm7AOoa by matthewvenn@chaos.social
2023-10-28T10:44:25Z
0 likes, 2 repeats
This looks like a pretty simple computer program right? Maybe a while loop, a delay and writing some data to an output port?
(DIR) Post #AbEHZUWIGPnortVdpo by matthewvenn@chaos.social
2023-10-28T10:44:58Z
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It’s actually a custom made - digital machine - built out of transistors, fabricated with the world’s first manufacturable open source chip design library! 🤯
(DIR) Post #AbEHZWPdE9f6joPLjE by matthewvenn@chaos.social
2023-10-28T10:45:21Z
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You’ve already seen the chip from the outside, but here’s what it looks like under that black plastic covering. There’s actually 250 tiny designs inside! We can choose to try each design with those little black and white switches on the bottom left of the board.
(DIR) Post #AbEHZYIGEWxEZWyUW8 by matthewvenn@chaos.social
2023-10-28T10:46:05Z
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Zooming in deeper, we can see how the design is built out of individual standard cells and wired up into a circuit. We provide an external clock and this design just says hello - forever!
(DIR) Post #AbEHZa5vXMHE9rDfZQ by matthewvenn@chaos.social
2023-10-28T10:46:30Z
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The design was submitted along with another 164 to #TinyTapeout 02, an educational project that aims to make chip design accessible to everyone. Submit your design to TinyTapeout 5, closing a week today!https://tinytapeout.com/
(DIR) Post #AbEHZbvMjb17pgIGO0 by matthewvenn@chaos.social
2023-10-28T10:47:20Z
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Thanks to Efabless and @aislerhq for sponsoring the development of this project. Make your own open source hardware - down to the transistors - with them! Hello design by Skyler Saleh https://tinytapeout.com/runs/tt02/131/
(DIR) Post #Ajkr98l8zfwgw4aI5Y by matthewvenn@chaos.social
2024-07-05T14:41:02Z
1 likes, 0 repeats
My first paper has just been published in the IEEE solid state circuits magazine!Tiny Tapeout: A Shared Silicon Tapeout Platform Accessible To Everyonehttps://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=4563670If you're not a member, you can read the pre-print here: https://raw.githubusercontent.com/mattvenn/tt-ieee-paper/main/paper_TT.pdf
(DIR) Post #AjxaxhpGiaLmdRlWuO by matthewvenn@chaos.social
2024-07-09T09:16:22Z
1 likes, 1 repeats
Look at this cool interdigitated transistor! This is a way of building chonkier transistors by putting them in parallel. This one has 3 gates, 2 sources and 2 drains and can work at 5v.
(DIR) Post #AjxaxkqnTMM613VICu by matthewvenn@chaos.social
2024-07-09T09:16:38Z
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I’m using it as part of a mixed signal ASIC project that will digitally synthesise a sine wave and then output the signal at 3.3v. You can explore the design in 3D here: https://gds-viewer.tinytapeout.com/?model=https://mattvenn.github.io/tt08-analog-r2r-dac-3v3/tinytapeout.gds.gltf
(DIR) Post #AjxaxmoOBHcM6AOOjQ by matthewvenn@chaos.social
2024-07-09T09:17:03Z
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The top block is made with a suite of tools called OpenLane. It includes tools from @yosyshq OpenROAD and many more. About 300 logic cells are needed to create the 8 bit sine wave. The transistors used in the cells are 10x smaller than my big level shifter transistor
(DIR) Post #AjxaxpDdEOzvZ2DaM4 by matthewvenn@chaos.social
2024-07-09T09:17:35Z
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After the 1.8v digital signals get boosted to 3.3v by the level shifter, they are combined by the R2R dac to produce this super smooth sine wave at 3.3v.I will set the frequency to 30Hz and use it to shake the foundations with bass!
(DIR) Post #AjxaxrzYvAWgAGetLF by matthewvenn@chaos.social
2024-07-09T09:18:27Z
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This design will be fabricated on #TinyTapeout 8 - which closes on September 6th.If you want to learn how to shake foundations with your own open source ASICs, sign up to my newsletter! https://www.zerotoasiccourse.com/newsletter/
(DIR) Post #AuZ3elqFzVNIdBuDqa by matthewvenn@chaos.social
2025-05-28T12:39:59Z
1 likes, 1 repeats
This is the moment Rej's open source Z80 woke up and said hello!After Zilog’s April 2024 announcement, ReJ quickly taped out a drop-in replacement to preserve retrocomputing and legacy systems.Taped out on TT07, it's a landmark in democratizing chip design.
(DIR) Post #AuZ3euBSyX5sVHtH16 by matthewvenn@chaos.social
2025-05-28T12:40:45Z
1 likes, 0 repeats
Design details: https://tinytapeout.com/runs/tt07/tt_um_rejunity_z80Watch the interview: https://youtube.com/watch?v=GI1e22A2J3UOrder your own copy of the chip here: https://store.tinytapeout.com/products/TT07-Development-Kit-p721814662
(DIR) Post #AuZ3euBSyX5sVHtH17 by matthewvenn@chaos.social
2025-05-28T13:53:40Z
0 likes, 0 repeats
#Z80 #opensource #silicon