Posts by dizzy@mastodon.social
(DIR) Post #709110 by dizzy@mastodon.social
2018-10-23T09:45:32Z
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@kondziu ah, so that’s a laptop, I see
(DIR) Post #813900 by dizzy@mastodon.social
2018-10-28T07:37:26Z
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@kondziu pekne
(DIR) Post #1307450 by dizzy@mastodon.social
2018-11-18T22:14:26Z
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@kurisu twice as fun with SGX
(DIR) Post #1307506 by dizzy@mastodon.social
2018-11-18T22:17:28Z
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@kurisu enjoy your flushing everything, lmao
(DIR) Post #1307535 by dizzy@mastodon.social
2018-11-18T22:17:59Z
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@kurisu tfw no enclaveID tags uwu
(DIR) Post #1307561 by dizzy@mastodon.social
2018-11-18T22:20:46Z
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@kurisu they mitigate by flushing the entire L1$ for each enclave transition
(DIR) Post #1307609 by dizzy@mastodon.social
2018-11-18T22:22:20Z
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@kurisu sgx amplifies L1TF by forwarding actual cache line data, without sgx you don’t see the data, instead you can infer something by side channel
(DIR) Post #1307629 by dizzy@mastodon.social
2018-11-18T22:23:57Z
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@kurisu presumably it’s because cache lines aren’t tagged with enclaveID
(DIR) Post #1307714 by dizzy@mastodon.social
2018-11-18T22:28:20Z
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@kurisu basically all spectre, meltdown and l1tf are about leaking micro architectural state of one context into another because micro architecture is sharing everything. ContextID tag on branch predictor and maybe on every piece of caches could fix it? Idk
(DIR) Post #1307730 by dizzy@mastodon.social
2018-11-18T22:30:17Z
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@kurisu >millarrrgh ^^;
(DIR) Post #1307772 by dizzy@mastodon.social
2018-11-18T22:31:14Z
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@kurisu whenever someone mentions Mill I enter the troll alert mode ^^
(DIR) Post #1307821 by dizzy@mastodon.social
2018-11-18T22:32:11Z
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@kurisu but honestly I know nothing about the Mill ;;
(DIR) Post #1307850 by dizzy@mastodon.social
2018-11-18T22:37:00Z
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@kurisu unlikely it’s going into any production soon, tho. uwuArch designers will likely employ a bunch of tags, add hardware compartment and cache partitioning and will get away with it, tbh
(DIR) Post #1307874 by dizzy@mastodon.social
2018-11-18T22:38:25Z
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@kurisu yeah, I saw a couple of second of Ivan’s talks, but to busy to properly research. Have to roll square wheels, no time to make them round ;;
(DIR) Post #1308037 by dizzy@mastodon.social
2018-11-18T22:45:18Z
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@kurisu I guess software gonna need a total redesign and rewrite for the Mill (but again I am not familiar with it) and adding anything more involved than memory tagging into existing code is quite a hard sell currently TT Software devs generally hate everything that is not just wait for OS(+firmware) devs to add more exception handlers into $arch/entry.S so OS magically does everything for you ;;
(DIR) Post #1308148 by dizzy@mastodon.social
2018-11-18T22:54:20Z
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@kurisu I definitely should read about the Mill, otherwise picture of VLIW/EPIC popping up in my head ;; I recon that it’s something completely different
(DIR) Post #1308562 by dizzy@mastodon.social
2018-11-18T23:16:59Z
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@kurisu obligatory pic related 🤣
(DIR) Post #1777607 by dizzy@mastodon.social
2018-12-06T18:41:18Z
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@kondziu 🎢
(DIR) Post #9frsUKcvjcHSsFBdrs by dizzy@mastodon.social
2019-02-15T18:58:50Z
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@Ocean22 poor C64 ;;
(DIR) Post #9frscuEXEas7cdrfhg by dizzy@mastodon.social
2019-02-15T19:00:23Z
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@Ocean22 I sure hope so ;;