Subj : Re: Memory visibility and MS Interlocked instructions
To   : comp.programming.threads
From : Alexander Terekhov
Date : Wed Aug 31 2005 11:10 pm


Joe Seigh wrote:
[...]
> > (1) before a load access is allowed to perform with respect to any
> > other processor, all previous load accesses must be performed, and
> >
> > (2) before a store access is allowed to perform with respect to any
> > other processor, all previous load and store accesses must be
> > performed.
> >
> 
> You're making this up I think.  It doesn't correspond to or is
> derivable from any of the definitions for processor consistency
> that I'm aware of.

(Memory deterioration, I suppose.)

http://groups.google.com/group/comp.programming.threads/msg/c2f6325083c80527
http://groups.google.com/group/comp.programming.threads/msg/29ebb437f46959ad
http://groups.google.com/group/comp.programming.threads/msg/2e1b7e8c4e1fa4c6

regards,
alexander.

.