Subj : Re: System
To   : All
From : Geo.
Date : Sat Mar 10 2001 05:12 am

From: "Geo." <georger@nls.net>

It's not a single 128byte cache line, memory is dual 128 bus.

Geo.

"Tony Ingenoso" <tonyi@attglobal.net> wrote in message 
news:3aa87032@w3.nls.net...
> I suspect this is a manifestation of the ram architecture chosen by Intel.
> I don't know if there is any real advantage.
>
> "Brian Hall" <bdhall1313@spamcop.net> wrote in message
> news:3aa84208$1@w3.nls.net...
> >
> > Is a single 128 byte cache line better than dual 64 byte lines like the
> > Athlon has?
> >
> > Some of us still try to write tight code where it matters.
> >
> > Brian
>
>

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