Subj : Re: Can C++ local static objects be made thread safe?
To   : comp.programming.threads
From : Joseph Seigh
Date : Fri Jan 21 2005 09:22 am

On Fri, 21 Jan 2005 05:41:26 -0800, Gianni Mariani <gi2nospam@mariani.ws> wrote:

> It seems as though
>
> ac_cpu_mb_consumer_depends()
> and
> ac_cpu_mb_producer();
>
> are only applicable for non cache-coherent systems.
>
> Which architectures need memory barriers ?
>
> Obviosly uniprocessors are not an issue.
>
> CCNUMA machines are in theory, cahce cohereant, so do they require
> memory barriers ?

Coherent cache just means you cannot detect that there's cache
except for performance effects.  Memory barriers are required
for processors with pipelined execution where the memory accesses
can be out of order.

>
> Do all of these architectures have barrier instuctions with the same
> semantics ?

In the sense that you can order memory accesses.  They may differ in
which types of memory accesses they order, e.g. Sun sparc has more
types of memory barriers than Intel.  It's not usually a problem
since you can use the stronger memory barrier if the more precise
one isn't available, e.g. an MFENCE on intel for an #LoadStore on
sparc, or #StoreStore on sparc for no membar on intel pentium.  This
doesn't solve the compiler ordering problem though.

-- 
Joe Seigh

.