Subj : Re: Makefile help OT ?
To   : comp.programming.threads
From : Gianni Mariani
Date : Sun Jan 02 2005 12:29 pm

sri wrote:
> Hi,
> I have small project which has several subdirectories. I have made
> makefiles for the individual subdirectories to make object files (each
> subdir makes more than one obj file and puts them into a new 'obj'
> dir). This part works fine for me.

I suspect that this is OT for this NG.

Anyhow, take a look at MakeXS - www.makexs.com.

You can either use MakeXS or you can see how it does these things.

> 
> Now, I am trying to write a top-level Makefile which should:
> - go through each subdir and seek the obj files.

I suspect that the obj files are the .cpp / .c files -> .obj ?

> - make one shared obj (.so) file for each subdir (module).
> - get a list of .so files (finally) by going to each subdir.
> - link them all to get $(execname)
> 
> I do not know how to do the first 2 parts (there is way too much stuff
> to learn in Make). 

MakeXS can do most of these things - the collecting all the .so files is 
somthing it can't do (yet).

This is what I have roughly come up with in the
> top-level makefile:
> 
> all:
> 
> <tab> @for i in $(SUBDIRS); do \
> (cd $$i; $(MAKE) $@); done
> 
> The above will only make the obj files in each subdirs. Ideally, I like
> to see something that does this:
> 
> gcc -o <execname> <all the .so> <linking>
> Any help on this will be very much appreciated!

.