Subj : Re: Lock Free -- where to start To : comp.programming.threads From : David Hopwood Date : Tue Oct 04 2005 03:26 am Oliver S. wrote: >Joe Seigh wrote: >>A hazard pointer implementation with 2 memory barriers, one >>for release semantics and the other for the "store/load" barrier, >>on a 866 Mhz P3 with XCHG to simulate the membars is 81 nsec w/ >>membars and 8 nsec w/o membars on a 1.2 Ghz powerpc it's > > Eh, you don't need membars on x86 except for some SSE-operations. Probably he needs the store-load barrier, but not the release barrier. -- David Hopwood .