Subj : Re: Lock Free -- where to start
To   : comp.programming.threads
From : Joe Seigh
Date : Mon Oct 03 2005 09:28 am

Oliver S. wrote:
>>If you really want to be "cache friendly",
>>try to avoid calling atomic operation ...
> 
> 
> Do you have any numbers on the performance of atomic operations
> on non-x86-machines?
> 
> 
>>... and/or StoreLoad style membar instructions.
> 
> 
> Do you know the costs of this membars on current "RISC"-architectures?
> 

A hazard pointer implementation with 2 memory barriers, one for release
semantics and the other for the "store/load" barrier, on a 866 Mhz P3
with XCHG to simulate the membars is
   81 nsec w/ membars and 8 nsec w/o membars
on a 1.2 Ghz powerpc it's
   108 nsec w/ membars and 5 nsec w/o membars

If you got rid of the release membar, you might reduce the time a little
but probably not that much since they're pretty close together.

Noticable if you traverse a linked list.  There are other factors like
dependent loads and cache hits but I think it came out anywhere from
a 15 to 20 percent differenct to as much as a 400% difference.   Just
from the membars.

-- 
Joe Seigh

When you get lemons, you make lemonade.
When you get hardware, you make software.

.