Subj : Re: [.NET] Volatile Fields [correction]
To   : comp.programming.threads
From : Joe Seigh
Date : Tue Sep 20 2005 08:13 am

Alexander Terekhov wrote:
> Sean Kelly wrote:
> [...]
> 
>>of the operation.  Hardware folks may argue that this is an
>>implementation detail however (as Andy Glew did), so future x86 CPUs
>>may not guarantee the same behavior.
> 
> 
> Some processor implementation details may change at mercy of things 
> like BIOS update or even an OS install or patching. Hence, according 
> to Glew's stance, you can't even count on it with respect to existing
> (not only future) processors.
> 

While you're at it, somebody needs to explain what Intel means by this
especially with regard to the fence instructions being described as
serializing instructions.


"It is recommended that software written to run on Pentium 4, Intel Xeon, and P6 family processors
assume the processor-ordering model or a weaker memory-ordering model. The Pentium 4,
Intel Xeon, and P6 family processors do not implement a strong memory-ordering model, except
when using the UC memory type. Despite the fact that Pentium 4, Intel Xeon, and P6 family
processors support processor ordering, Intel does not guarantee that future processors will
support this model. To make software portable to future processors, it is recommended that operating
systems provide critical region and resource control constructs and API’s (application
program interfaces) based on I/O, locking, and/or serializing instructions be used to synchronize
access to shared areas of memory in multiple-processor systems. Also, software should not
depend on processor ordering in situations where the system hardware does not support this
memory-ordering model."

-- 
Joe Seigh

When you get lemons, you make lemonade.
When you get hardware, you make software.

.