Subj : Re: an interesting threading-question
To   : comp.programming.threads
From : Chris Friesen
Date : Thu Sep 15 2005 05:44 pm

Oliver S. wrote:

> But you also didn't conceive what I described:
> I assume a "fictious" acrhitecture (maybe there's a real architecture
> which works like this) that has two kinds of read/write-barriers: one
> that makes the thread self-consistent, i.e. the following reads would
> see what previous instructions wrote to memory

Certainly you could create such a chip, but it would be horribly 
complicated to program as you would have to use the "self" barriers all 
over the place.

Current chips optimize as much as possible, but they preserve 
self-coherency so that the "self" barriers are not necessary.

Chrs

.