Subj : Re: Using hierarchical memory as an acquire memory barrier for dependent
To   : comp.programming.threads,comp.arch
From : Joe Seigh
Date : Mon Sep 12 2005 09:41 am

Joe Seigh wrote:

[...]
> 
> I seems to me you could use the memory hierarchy to accomplish the same
> effect.  I'm assuming that out of order dependent memory accesses won't 
> cross
> memory hierarchy boundaries.
> 
> There's two levels of the memory hierarchy we could exploit and possibly 
> without
> any special kernel support.   One is cache and the other is virtual memory.
> Basically, when memory is freed with proper release semantics, either 
> explicit
> or supplied by RCU, you use another form of RCU to determine when all
> processors have flushed or purged references to that memory from their
> cache or from their translation lookaside buffer.   The purge/flush 
> instructions
> are the quiescent states for the second form of RCU.  Once all processors
> has quiesced (dropped references) it is safe for writer threads to use that
> memory for updates using RCU.
> 
[...]

Some forms of speculative execution might break this though by fetching
unrelated data into cache.   The most likely would be array traversal
since it can generate addresses not actually valid for the program in
question.

-- 
Joe Seigh

When you get lemons, you make lemonade.
When you get hardware, you make software.

.