Subj : Re: Memory visibility and MS Interlocked instructions
To   : comp.programming.threads
From : Sean Kelly
Date : Sat Sep 03 2005 04:05 pm

Sean Kelly wrote:
> Sean Kelly wrote:
> >
> > Oops, you're right.  It allows for a load to occur while a store is
> > processing.  My mistake.
>
> And it imposes no global ordeing of stores.  Though I gather LOCK fills
> this role on the x86.

Upon reflection, it seems like there's no way to achieve GSO on x86, as
current LOCK implementations are specified as local to the processor
(and I personally don't believe the FENCE instructions achieve this).
I imagine algorithms could be designed to ensure data consistency, but
this seems like it could be fairly tricky.  Are there any alternatives
for lockless programmers on current x86 architecture?  Relying on
consistency with historic behavior doesn't seem sufficient since older
systems never exercised SC in this way (so far as I'm aware).


Sean

.