Subj : Re: Memory visibility and MS Interlocked instructions
To   : comp.programming.threads
From : Alexander Terekhov
Date : Thu Sep 01 2005 10:56 pm


Sean Kelly wrote:
> 
> Let's back up a minute.  And forgive me for being pedantic--it's easier
> for me to follow all this if I reiterate some of what's been said in
> other posts.  According to 7.1 of the IA-32 System Programming Guide:
> 
> > Certain basic memory transactions (such as reading or writing a byte in
> > system memory) are always guaranteed to be handled atomically. That is, once
> > started, the processor guarantees that the operation will be completed before
> > another processor or bus agent is allowed access to the memory location.  The
> > processor also supports bus locking for performing selected memory operations
> > (such as a read-modify-write operation in a shared area of memory) that
> > typically need to be handled atomically.
> 
> So it seems clear that 'atomic' in IA-32 speak implies that (compliant)
> stores are made immediately globally visible.  

Memory locations may be replicated (in caches) and the guide 
(mostly toilet paper) doesn't say that "the system guarantees 
atomic propagation of modifications" (or something like that).

regards,
alexander.

.