Subj : Re: Memory visibility and MS Interlocked instructions
To   : comp.programming.threads
From : Alexander Terekhov
Date : Thu Sep 01 2005 03:04 pm


Joe Seigh wrote:
[...]
> I'm finding it impossible to argue with a moving target.  If I subtract
> everything you say out, it pretty much sounds like ia32 loads are not
> always guaranteed to be "in-order".  

They are always "in-order" with respect to other loads and subsequent
stores. What you can't grok is that ia32 *stores* (being PC stores; 
i.e. RCpc release stores) are not constrained to ensure "remote write 
atomicity" (in IA64 formal memory model speak).

regards,
alexander.

.