Subj : Re: Memory visibility and MS Interlocked instructions
To   : comp.programming.threads
From : Joe Seigh
Date : Wed Aug 31 2005 04:56 pm

Alexander Terekhov wrote:
> David Hopwood wrote:
> [...]
> 
>>Yes, but PC alone does not imply load == load.acq.
>>(I think; I'm not 100% sure.)
> 
> 
> Heck,
> 
> PC:
> 
> (1) before a load access is allowed to perform with respect to any 
> other processor, all previous load accesses must be performed, and
> 
> (2) before a store access is allowed to perform with respect to any 
> other processor, all previous load and store accesses must be 
> performed.
> 

You're making this up I think.  It doesn't correspond to or is
derivable from any of the definitions for processor consistency
that I'm aware of.



-- 
Joe Seigh

When you get lemons, you make lemonade.
When you get hardware, you make software.

.