Subj : Re: Memory visibility and MS Interlocked instructions
To   : comp.programming.threads
From : Joe Seigh
Date : Tue Aug 30 2005 12:29 pm

Chris Thomasson wrote:
> "Alexander Terekhov" <terekhov@web.de> wrote in message 
> news:4310C372.2225A81@web.de...
> 
>>Joe Seigh wrote:
>>[...]
>>
>>>just trying to save Intel from themselves.  It's not a
>>>correctness of implementation issue, it's a performance
>>
>>Under x86 memory model, all loads (including dependent ones) behave
>>in-order with respect to preceding loads. Processor can perform out-
>>of-order speculative loads but they never yield incorrect results
>>(processor detects memory ordering violations and rolls back).
> 
> 
> http://groups.google.com/group/comp.programming.threads/msg/68ba70e66d6b6ee9?hl=en
> 
> any thoughts? 
> 
> 
http://blogs.msdn.com/cbrumme/archive/2003/05/17/51445.aspx


-- 
Joe Seigh

When you get lemons, you make lemonade.
When you get hardware, you make software.

.