Subj : Re: Memory visibility and MS Interlocked instructions
To   : comp.programming.threads
From : Joe Seigh
Date : Mon Aug 29 2005 05:35 pm

Alexander Terekhov wrote:
> Joe Seigh wrote:
> [...]
> 
>>You want sequential consistency, I think.
> 
> 
> You mean "Performing a load Globally" ("A load is globally 
> performed if it is performed and if the store that is the source 
> of the returned value has been performed") and 
> 
> ----
> Conditions for Sequential Consistency
> 
> (A) before a load is allowed to perform with respect
> to any other processor, all previous load accesses
> must be globally performed and all previous store
> accesses must be performed, and
> 
> (B) before a store is allowed to perform with respect
> to any other processor, all previous load accesses
> must be globally performed and all previous s tore
> accesses must be performed.
> ----
> 
> Not really. The definition of performing a load globally is used 
> neither for PC nor for RCpc.
> 
> PC is this:
> 
> ----
> Conditions for Processor Consistency
> 
> (A) before a load is allowed to perform with respect to 
> any other processor, all previous load accesses must be 
> performed, and
> 
> (B) before a store is allowed to perform with respect to 
> any other processor, all previous accesses (loads and
> stores) must be performed.
> ^^^^^^^^^^^^^^^^^^^^^^^^^


There is *no* mention that stores must be performed before they
are or can be observed by other processors.  It's talking about
a single memory location so that "The above modification to the system
abstraction enables us to accurately capture the optimization of allowing
a read to return the value of its own processor’s write before that write
is serialized with respect to other writes to the same location."


-- 
Joe Seigh

When you get lemons, you make lemonade.
When you get hardware, you make software.

.