Subj : Re: Memory visibility and MS Interlocked instructions
To   : comp.programming.threads
From : Alexander Terekhov
Date : Fri Aug 26 2005 01:24 pm


Alexander Terekhov wrote:
[...]
> > if( load(&v, ccacq_true) == 0 )
> > {
> >   // #1
> > }
> > else
> > {
> >   // #2
> > }
> >
> >  load r1, v
> >  cmp r1, 0
> >  bne @2
> >
> > @1:
> >  isync
> >  #1
> >  b @3
> >
> > @2:
> >  #2
> >
> > @3:
> 
> Yep. And compiler can hoist loads and stores on #2 and #3 pathes
> (move'em above if... suppose that control always rich #3).

With respect to stores on %2, I mean that implementation can 
speculative *commit* stores on %2 and simply undo'em in the case 
of misprediction. Plain ccacq would not allow that.

regards,
alexander.

.