Subj : Re: Memory visibility and MS Interlocked instructions
To   : comp.programming.threads
From : Alexander Terekhov
Date : Thu Aug 25 2005 11:23 pm


Peter Dimov wrote:
[...]
> Can you give approximate PPC translation for the expression
> 
> fValueHasBeenComputed.load(msync::cchlb_true)
> 
> assuming that the compiler is not smart/atomics-aware and can't just
> insert the isync after the 'if'? (IOW, it can't analyze and optimize
> the 'load' in context... a library implementation, for example.)

B.2.3 Safe Fetch (Book II):

---
In this example it is assumed that the address of the storage
operand to be loaded is in GPR 3, the contents of the storage
operand are returned in GPR 4, ...

  lwz r4,0(r3) #load shared data
  cmpw r4,r4 #set CR0 to "equal"
  bne- $-8 #branch never taken 
---

and just add isync after "branch never taken".

regards,
alexander.

.