Subj : Re: questions re: atomic<>
To   : comp.programming.threads
From : Chris Friesen
Date : Fri Jun 24 2005 03:53 pm

Sean Kelly wrote:

> So then LOCK exists as one of the few instructions that forces a bus
> lock, and this is actually to allow atomic CAS--the mfence aspect is
> just a side effect.  This all makes a lot more sense now.  Thanks!

Just a suggestion not totally related to this topic;

You might want to be careful you don't code yourself into a total 
dependency on specific behaviours of current x86 chips, unless that's 
part of your design from the beginning.

There are lots of other processors with different memory coherency rules.

Chris

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