Subj : Re: Challenge: Multithreading & Synchronization
To   : comp.programming.threads
From : David Schwartz
Date : Wed May 25 2005 03:42 pm


"Giancarlo Niccolai" <searchforme@ingoogle.com> wrote in message 
news:d72qan$qoj$1@newsread.albacom.net...

> They may not appear on another CPU, but I doubt any SMP architecture will
> (or even CAN) transfer an atomic (i.e. aligned) interger in two steps, so
> that A2 + B1 can seem A1 somewhere... I hope at least we have the 
> guarantee
> that if we write AAAAFFFF on a 32-bit interger (or any sensible value in
> the architecture domain, like I.E. a 64 bit pointer in a 64 bit machine),
> we hadn't any XXXXFFFF reading anywhere...

    You seriously think that this is a guarantee that it is reasonable to 
rely on at the application level in otherwise portable C or C++ code for the 
infinitely unforseeable future?

    I can't see this often enough -- you have the guarantees that you 
actually have from the relevent standard. Any other assumptions should be 
considered platform-specific optimizations. Use them when you are confined 
to platforms where you *know*for*sure* that they work. Code the generic 
versions first, and optimize only if the need is proven.

    This leads to reliable code, which is good. Google for "premature 
optimization". ;)

    DS

.