Subj : Re: Challenge: Multithreading & Synchronization To : comp.programming.threads From : Giancarlo Niccolai Date : Thu May 26 2005 12:22 am David Schwartz wrote: > > "Peter Dimov" wrote in message > news:d71qq6$gcf$1@domitilla.aioe.org... > >> David Schwartz wrote: > >>> "doug" wrote in message >>> news:ZyPje.1900$iq5.1180@fe1.news.blueyonder.co.uk... > >>>> I know where you're coming from - that's where I came from too. But >>>> some folk (Peter, Giancarlo) explained that *yes*, you might read >>>> the wrong value, but it doesn't matter. You're guaranteed to get >>>> the answer to the question "do I own this lock" correct. >>> >>> Guaranteed by what? >>> >>> Suppose you are thread "A1". The lock is held by "A2" and >>> transfers to "B1" while you are checking the owner field. What stops >>> you from seeing half of each and getting "A1", and thinking you own >>> the lock? > >> We've been assuming atomic reads and writes, just no msync. > > You're assuming more than just atomic reads and writes. Even if the > reads and writes are atomic with respect to the CPU instruction stream, > they could still span a cache line and not appear atomic on another CPU. > You are actually assuming quite a few platform-specific things. > > DS They may not appear on another CPU, but I doubt any SMP architecture will (or even CAN) transfer an atomic (i.e. aligned) interger in two steps, so that A2 + B1 can seem A1 somewhere... I hope at least we have the guarantee that if we write AAAAFFFF on a 32-bit interger (or any sensible value in the architecture domain, like I.E. a 64 bit pointer in a 64 bit machine), we hadn't any XXXXFFFF reading anywhere... However, that's not an issue to me. I never read any sheared thing if not locked, even an atomic integer ;-) Gian .