Subj : Re: Hazard Pointers w/o memory barrier.
To   : comp.programming.threads
From : Joe Seigh
Date : Mon May 02 2005 09:35 pm

Finally getting around to modifying my current RCU
implementation to see how fast this will run.  Just
taking the memory barriers out gave a 3x improvement
in read access throughput.  At that rate that can be
considered as effectively zero overhead.   About a 3x
slowdown in write access but that's because I don't
have the SMR logic in yet plus I have to stay with a
slightly crippled version of RCU to avoid imperial
entanglement.  Adding the SMR logic should give me a
dramatic improvement in write throughput.


-
Joe Seigh

When you get lemons, you make lemonade.
When you get hardware, you make software.

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