Subj : Re: lockless low-overhead 'pipes' (w/semaphores)
To   : comp.programming.threads
From : Chris Thomasson
Date : Fri Apr 22 2005 09:08 pm

> Chris Thomasson wrote:
>>
>> > Apart from the SSE string stuff, on IA32 (compiler reordering aside
>> > for a moment), loads have acquire semantics, stores have release
>> > semantics, and interlocked stuff is fully-fenced (compound acquire +
>> > release semantics).
>>
>> Right. The OP should also understand that critical sections can overlap:
>
> Not on IA32 (spinlocks with just release store in unlock aside for a
> moment).

Yes. I was attempting to address the "quick" release store trick. Its fully 
documented in one the Intel optimization guides...

;)


I believe an:

Unlock( &Lock1 ); // movl $0, (%Lock1)


could allow "parts" of the following:

Lock( &Lock2 );

operation to migrate above it?




> In general, it is somewhat hard for compilers (but not
> hardware) to "overlap" critical regions because lock() can block,
> but legitimate transformation shall not block preceding unlock.

How does the compiler know how to avoid deadlock in the first place? 
Especially when you skip the lock prefix in the unlock function; This 
"trick" can be dangerous...

.