Subj : Re: lockless low-overhead 'pipes' (w/semaphores)
To   : comp.programming.threads
From : lindahlb
Date : Wed Apr 20 2005 06:52 pm

> DS:
> They do? Is this supposed to be x86-specific code or not? You say
"xadd
> for intel", implying that this code is supposed to work on other
> architectures as well.

True, I want to eventually expand the code to other architectures by
wrapping the architecture-dependent code in an API that can express
generic atomic and ordering concepts - eventually tuning it to be the
express the best performant concepts, similiar to Alexander's msync::*
work and Chris' AppCore project (code reuse implications here). Anyhow,
in my most recent post, I've narrowed the scope to x86 code since I
really don't think I'd have a problem adapting it to other
architectures (even if it requires a change in API - and most
definately implementation of such API). I just want to refine my
algorithm (or at least have it be correct under the x86 model, for
now).

> DS:
> Again, what does what the lock prefix on x86 does have to do with
> anything? If this is x86-specific code, you need to say that, and you
need
> to specify whether it's intended to be guaranteed to work on all
future x86
> processors or just the ones that exist now.

My previous post now addresses this issue, except whether or not I
expect it to work on future x86 processors. For now, lets assume only
current x86 architectures - as I mentioned earlier, I expect to extend
the implementation to other architectures via changes in API
implementation and possibly a change in the API, if necessary
(maintenance is not an issue as its more of a research hobby project -
like many of you here).

.