Subj : Re: A question about atomic_ptr
To   : comp.programming.threads
From : Peter Dimov
Date : Mon Apr 18 2005 03:31 am

Alexander Terekhov wrote:
> Peter Dimov wrote:
>>
>> Peter Dimov wrote:
>>> shared_ptr<T> * ppt;
>>>
>>> shared_ptr<T> reader()
>>> {
>>>    return *atomic_load_ddacq( ppt );
>>
>> Except that I now need a hazard here...
>
> And ddacq + ccacq (dependencies "independent" plain acq aside for
> moment) on slfence'd validation load-and-check. First load can be
> naked.
>
>   p = shared.load(msync::naked_competing);
>   do {
>     hazard_register(0, p);
>     // implied msync::slfence with p passed by reference below
>   } while (!shared.validate(p, msync::ddacq + msync::ccacq));

Hm. How about the following DWCASless algorithm:

X * shared;
int gate = 0;

reader:

inc( gate );

X * tmp = load_ddacq( shared );
tmp->addref();

if( dec( gate ) == 0 && load( shared ) != tmp )
    tmp->release();

return tmp;

writer:

// ...

inc( gate );

exchange( shared, new_shared );

if( dec( gate ) == 0 ) new_shared->release();

with the appropriate barriers inserted, of course.

.