Subj : Re: std::msync
To   : comp.programming.threads
From : Alexander Terekhov
Date : Mon Apr 11 2005 02:07 pm

< Forward Inline >

-------- Original Message --------
Newsgroups: gmane.comp.lib.boost.devel
Subject: shared_ptr on ia64?
Message-ID: <4255091E.8EFFEE2A@web.de>
References: ... <011901c5394e$3ec2e700$6501a8c0@pdimov2>

Peter Dimov wrote:
[...]
> > P.S. When are you going to kick start an incarnation for Itanic
> > with value dependent cmpxchg.rel-vs-cmpxchg.acq? ;-)
> 
> IA64 assembly by hand? No thanks. I'll probably use _Interlocked* on Intel
> and __sync_* on g++. 

That would mean expensive "mf" everywhere.

http://gcc.gnu.org/ml/libstdc++/2005-04/msg00059.html
http://gcc.gnu.org/ml/libstdc++/2005-04/msg00060.html

Not good for Itanic which reportedly speculates and reorders like 
crazy.

  asm long atomic_decrement_weak( register long * pw ) {

    loop:

      <load-UNordered>
      <add -1>
      <branch if zero to acquire>
      <cmpxchg.rel>
      <branch if failed to loop else to done>
      
    acquire:

      <ld.acq>
      <add -1>
      <branch if !zero to acquire>

    done:

      <...>
  }

  asm long atomic_decrement_strong( register long * pw ) { 

    loop:

      <load-UNordered>
      <add -1>
      <branch if zero to acquire>
      <cmpxchg.rel>
      <branch if failed to loop else to done>
      
    acquire:

      <cmpxchg.acq>
      <branch if failed to loop else to done>

    done:

      <...>

  }

Oder?

regards,
alexander.

P.S. For naked stuff, it is probably better to use ".rel", not 
more-speculation-hindering ".acq". Too bad Itanic doesn't have 
naked "semaphores"...

.