Subj : Re: CMPXCHG timing
To   : comp.programming.threads
From : Michael Pryhodko
Date : Fri Apr 01 2005 04:10 pm

> > Now you should understand... Everything else is to fool OS, store
> > buffer and so on. Unfortunately cmpxchg has redundant store which
kills
> > this whole idea :((.
> > And I can not replace cmpxchg with
> > if (lock == 0)
> >   lock = Pi
> >
> > because OS could interrupt in between these lines and I did not
found a
> > solution how to:
> > - prevent it or
> > - design a lock which will be immune to that effect
>
>     How would this work even if cmpxchg didn't have the redundant
store?
> It's still not atomic with respect to other processors, never was,
never
> will be. It is, however, atomic with respect to interrupts.

Read pseudocode for x86 (my first post "I decided to show my child")
carefully, then run test app I posted afterwards. You will see that
this redundant store ruining this whole idea. Because after unlocking
lock, somebody else immediately writes it's previous value back -- thus
locking everybody since lock is not reenterable.
I know that cmpxchg without LOCK is not atomic, I do not rely on it.
Any single instruction is atomic with respoct to interrupts.

If you are really interested I will gladly answer your specific
questions. :)

Bye.
Sincerely yours, Michael.

.