Subj : Re: CMPXCHG timing
To   : comp.programming.threads
From : David Schwartz
Date : Fri Apr 01 2005 09:22 am


"Michael Pryhodko" <mpryhodko@westpac.com.au> wrote in message 
news:1112366998.320952.172010@l41g2000cwc.googlegroups.com...

> Now you should understand... Everything else is to fool OS, store
> buffer and so on. Unfortunately cmpxchg has redundant store which kills
> this whole idea :((.
> And I can not replace cmpxchg with
> if (lock == 0)
>   lock = Pi
>
> because OS could interrupt in between these lines and I did not found a
> solution how to:
> - prevent it or
> - design a lock which will be immune to that effect

    How would this work even if cmpxchg didn't have the redundant store? 
It's still not atomic with respect to other processors, never was, never 
will be. It is, however, atomic with respect to interrupts.

    DS

.