Subj : Re: [x86] simultaneous writes To : comp.programming.threads From : Joe Seigh Date : Thu Mar 31 2005 06:45 am On 30 Mar 2005 22:33:31 -0800, Michael Pryhodko wrote: > Suppose that two threads running on two processors write at the SAME > time different 32bit values to the same 4-bytes aligned address on x86 > platform (i.e. write is atomic). 'sfence' executed immediately after to > flush store buffers. (consider that before 'write' store buffers were > empty). > > What will happen? > > 1. is it possible that after this different processors will see > different values in their caches? As far as I understand cache > coherency mechanism will prevent it, right? Yes. Cache is tranparent in most cases, meaning that you cannot determine whether it exists with testcases such as this since the testcase will will behave the same with or without cache. > 2. how platform decides which value "win"? Hardware arbitration. Get a boot on theory and design of hardware. -- Joe Seigh .