Subj : Re: Performance impact of disaligned structures
To   : comp.programming
From : Peter Ammon
Date : Tue Oct 04 2005 09:43 pm

Gioele Barabucci wrote:
> How much "worse" is this structure
> 
> struct {
>   uint64 length;
>   uint32 id;
>   uint64 *next;     /* this is 32 bits aligned */
>   uint64 data[256]; /* this starts on the 32 bits boundary */
> }
> 
> compared to this other
> 
> struct {
>   uint64 length;
>   uint32 id;
>   uint32 padding;
>   uint64 *next;     /* now this is 64 bits aligned */
>   uint64 data[256]; /* and this starts on the 64 bits boundary */
> }
> 
> on 32 bits and 64 bits architectures?
> 
> The '*next' pointer is going to be used seldom; what worries me is the
> data field.
> The content of data[256] is going to be used as input for heavy CPU
> computations, it should be loaded as fast as possible into the
> MMX/Altivec registers.
> 
> How (and how much) will the different layout affect run time speed? My
> targets are x86 and ppc32 on the 32 bits side and x86_64 and POWER
> (ppc64) on the 64 bits side.
> 
> 

Altivec on the PowerPC needs a very large alignment, 16 BYTES to be precise.

And that's _needs_.  It won't automatically handle misaligned loads. 
This isn't a performance concern, this is correctness!

You _must_ make sure that your Altivec data fields are aligned to 16 
bytes.  The easiest way to do this is to declare them as the first field 
in the struct, and make sure the struct comes from malloc() or that you 
use your compiler's extensions to force instances of the struct to be 16 
byte aligned.

For more on Altivec alignment, see 
http://developer.apple.com/hardware/ve/alignment.html

-Peter

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