Subj : clocks vs. bus cycles
To   : Robin Sheppard
From : Jasen Betts
Date : Tue Oct 16 2001 11:31 pm

Hi Robin.

 RS> I've always been of the impression that MOVS (and many of the
 RS> string instructions, for that matter) was relatively useless; it's
 RS> listed in my TASM guide (which only covers up to i486
 RS> instructions) as being 7 clocks, yet it can be duplicated by 2
 RS> MOVs and 2 INCs or ADDs (depending on operand size), which are all
 RS> listed as one-clock instructions.  With the bus speed issue, this
 RS> would become 2+2+1+1=6 clocks, which makes the difference a lot
 RS> less.  Aside from taking up less code space and (for MOVS, INS,
 RS> and OUTS, anyways) not needing a dummy register to read from/write
 RS> to, is there any advantage to these instructions?

if you're doing them repeateldy with REP MOVS you don't need to fetch the
op-codes for each loop, but if you're using a JNZ to loop back you lose the
pre-fetch cache and ther CPU has to fetch the instructions again (from the
CPU cache, but it does cost)

 RS> I understand that SRAM would be faster than DRAM because you'd
 RS> never run into a case where the CPU had to wait on RAM refresh,
 RS> but what's the deal with "tagging for associative access"?  I
 RS> thought memory locations were simply "associated" with their
 RS> addresses.

it's just a way of caching the most popular parts or mrmory...

 -=> Bye <=-

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