(TXT) View Source
# UNIDENTIFIED
ET4000VL-BUS
Category Video
Video Types Supported XVGA
Video Processor Tseng Laboratories ET 4000
Highest Resolution Supported 1280 x 1024
Data Bus Type 32-bit VESA local bus
Memory Type DRAM
Maximum Onboard Memory 1MB
(IMG) IMG 1
+------------------------------------------------------------+
| CONNECTIONS |
|------------------------------------------------------------|
| Purpose | Location | Purpose | Location |
|------------------------+----------+-------------+----------|
| 15-pin analog video | CN1 | VGA feature | CN2 |
| port | | connector | |
+------------------------------------------------------------+
+------------------------------------------------------------+
| INTERRUPT SELECTION |
|------------------------------------------------------------|
| IRQ2 | JP8 |
|-------------------------------+----------------------------|
| Enabled | Close |
|-------------------------------+----------------------------|
| Disabled | Open |
+------------------------------------------------------------+
+------------------------------------------------------------+
| ISA VGA BIOS |
|------------------------------------------------------------|
| Setting | JP9 |
|-------------------------------+----------------------------|
| Enabled | Close |
|-------------------------------+----------------------------|
| Disabled | Open |
+------------------------------------------------------------+
+------------------------------------------------------------+
| LOCAL BUS VGA CONFIGURATION |
|------------------------------------------------------------|
| Setting | JP1 | JP4 |
|--------------------+-------------------+-------------------|
| Enabled | Closed | Closed |
|--------------------+-------------------+-------------------|
| Disabled | Open | Open |
+------------------------------------------------------------+
+------------------------------------------------------------+
| MIN/IO CYCLES |
|------------------------------------------------------------|
| MIN T2 MIO=1 | MIN T2 MIO=1 | JP2 | JP3 |
|---------------+---------------+--------------+-------------|
| 1 | 1 | 1 | 3 |
|---------------+---------------+--------------+-------------|
| 2 | 4 | 1 | 0 |
|---------------+---------------+--------------+-------------|
| 3 | 3 | 0 | 1 |
|---------------+---------------+--------------+-------------|
| 4 | 4 | 0 | 0 |
+------------------------------------------------------------+
+------------------------------------------------------------+
| FACTORY CONFIGURED SETTINGS - DO NOT ALTER |
|------------------------------------------------------------|
| Jumpers | Settings |
|----------------------------+-------------------------------|
| JP5 | Unidentified |
|----------------------------+-------------------------------|
| JP6 | Unidentified |
|----------------------------+-------------------------------|
| JP7 | Unidentified |
|------------------------------------------------------------|
| Note: JP5-7 control clock IC frequency |
+------------------------------------------------------------+
+------------------------------------------------------------+
| DRAM CONFIGURATION |
|------------------------------------------------------------|
| Size | Bank 0 | Bank 1 | Bank 2 |
|------------+---------------+---------------+---------------|
| 256KB | (2) 256 x 4 | None | None |
|------------+---------------+---------------+---------------|
| 512KB | (2) 256 x 4 | (2) 256 x 4 | None |
|------------+---------------+---------------+---------------|
| 1MB | (2) 256 x 4 | (2) 256 x 4 | (4) 256 x 4 |
+------------------------------------------------------------+