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# UNIDENTIFIED
ENDAT-386SB
Processor 80386SX (exact location unidentified)
Processor Speed 16MHz
Chip Set Unidentified
Max. Onboard DRAM 8MB
Cache None
BIOS Unidentified
Dimensions 330mm x 210mm
I/O Options None
NPU Options 80387SX (exact location unidentified)
(IMG) IMG 1
+------------------------------------------------------------+
| CONNECTIONS |
|------------------------------------------------------------|
| Purpose | Location | Purpose | Location |
|------------------+----------+-------------------+----------|
| External battery | J1 | Speaker | J19 |
|------------------+----------+-------------------+----------|
| Turbo LED | J17 | Power LED & | J20 |
| | | keylock | |
|------------------+----------+-------------------+----------|
| Turbo switch | J18 | Reset switch | JP1 |
+------------------------------------------------------------+
+------------------------------------------------------------+
| USER CONFIGURABLE SETTINGS |
|------------------------------------------------------------|
| Function | Jumper | Position |
|--------------------------------------+---------+-----------|
| | Turbo enabled (16MHz) | J18 | Closed |
|---+----------------------------------+---------+-----------|
| | Turbo disabled (8MHz) | J18 | Open |
|---+----------------------------------+---------+-----------|
| | Monitor type select monochrome | JP2 | Open |
|---+----------------------------------+---------+-----------|
| | Monitor type select color | JP2 | Closed |
+------------------------------------------------------------+
+------------------------------------------------------------+
| DRAM CONFIGURATION |
|------------------------------------------------------------|
| Size | Bank 0A | Bank 0 | Bank 1A |
|-------+-------------------+--------------+-----------------|
| 512KB | (4) 44256 & (2) | NONE | NONE |
| | 41256 | | |
|-------+-------------------+--------------+-----------------|
| 1MB | (4) 44256 & (2) | NONE | (4) 44256 & (2) |
| | 41256 | | 41256 |
|-------+-------------------+--------------+-----------------|
| 1.5MB | (4) 44256 & (2) | (2) 256K x 9 | (4) 44256 & (2) |
| | 41256 | | 41256 |
|-------+-------------------+--------------+-----------------|
| 2MB | (4) 44256 & (2) | (2) 256K x 9 | (4) 44256 & (2) |
| | 41256 | | 41256 |
|-------+-------------------+--------------+-----------------|
| 2MB | NONE | (2) 1M x 9 | NONE |
|-------+-------------------+--------------+-----------------|
| 4MB | NONE | (2) 1M x 9 | NONE |
|-------+-------------------+--------------+-----------------|
| 6MB | NONE | (2) 1M x 9 | NONE |
|-------+-------------------+--------------+-----------------|
| 8MB | NONE | (2) 1M x 9 | NONE |
|------------------------------------------------------------|
| Note: (2) 41256 are parity chips. |
+------------------------------------------------------------+
+------------------------------------------------------------+
| DRAM CONFIGURATION (CON’T) |
|------------------------------------------------------------|
| Size | Bank 1 | Bank 2 | Bank 3 |
|------------+---------------+---------------+---------------|
| 512KB | NONE | NONE | NONE |
|------------+---------------+---------------+---------------|
| 1MB | NONE | NONE | NONE |
|------------+---------------+---------------+---------------|
| 1.5MB | NONE | NONE | NONE |
|------------+---------------+---------------+---------------|
| 2MB | (2) 256K x 9 | NONE | NONE |
|------------+---------------+---------------+---------------|
| 2MB | NONE | NONE | NONE |
|------------+---------------+---------------+---------------|
| 4MB | (2) 1M x 9 | NONE | NONE |
|------------+---------------+---------------+---------------|
| 6MB | (2) 1M x 9 | (2) 1M x 9 | NONE |
|------------+---------------+---------------+---------------|
| 8MB | (2) 1M x 9 | (2) 1M x 9 | (2) 1M x 9 |
+------------------------------------------------------------+
+------------------------------------------------------------+
| WAIT STATE CONFIGURATION |
|------------------------------------------------------------|
| Page hit | Page miss | JP5 | JP6 | |
|----------+-----------+----------+----------+---------------|
| Bank hit | Bank miss | Bank hit | Bank | | |
| | | | miss | | |
|----------+-----------+----------+----------+-------+-------|
| 0 | 0 | 2 | 2 | 1 & 2 | 1 & 2 |
|----------+-----------+----------+----------+-------+-------|
| 0 | N/A | 2 | 1 | 1 & 2 | 2 & 3 |
|----------+-----------+----------+----------+-------+-------|
| 1 | 0 | 2 | 2 | 2 & 3 | 1 & 2 |
|----------+-----------+----------+----------+-------+-------|
| 2 | 0 | 3 | 3 | 2 & 3 | 2 & 3 |
+------------------------------------------------------------+
+------------------------------------------------------------+
| MISCELLANEOUS TECHNICAL NOTE |
|------------------------------------------------------------|
| Note: The location of pin 1 is unidentified. |
+------------------------------------------------------------+