VISIONETICS INTERNATIONAL
=========================

   VIGA VGA+

   Card Type                    Video card                        
   Video Chip Set               Tseng Labs                        
   Maximum Video Memory         1MB DRAM                          
   Video Types Supported        XVGA                              
   Highest Resolution Supported 1024 x 768                        
   Data Bus                     16-bit ISA                        
   Formats Supported            NTSC, PAL                         
                                                                  

<gopher://bitreich.org/I/th99/v/U-Z/53092-1.png>
   

   +------------------------------------------------------------+
   |                        CONNECTIONS                         |
   |------------------------------------------------------------|
   |    Function     | Label |         Function         | Label |
   |-----------------+-------+--------------------------+-------|
   | Composite video |  J1   | Composite video/RGB/sync |  P2   |
   | out             |       | out                      |       |
   |-----------------+-------+--------------------------+-------|
   | S-video out     |  J2   | 15-pin analog video port |  P3   |
   +------------------------------------------------------------+

   +------------------------------------------------------------+
   |                 USER CONFIGURABLE SETTINGS                 |
   |------------------------------------------------------------|
   |                Function                | Label | Position  |
   |----------------------------------------+-------+-----------|
   |>> | VGA enabled                        | S1/6  |    Off    |
   |---+------------------------------------+-------+-----------|
   |   | VGA disabled                       | S1/6  |    On     |
   |---+------------------------------------+-------+-----------|
   |>> | Factory configured - do not alter  | S1/7  |    Off    |
   |---+------------------------------------+-------+-----------|
   |>> | IRQ 9/2 enabled                    | S1/8  |    On     |
   |---+------------------------------------+-------+-----------|
   |   | IRQ 9/2 disabled                   | S1/8  |    Off    |
   +------------------------------------------------------------+

   +------------------------------------------------------------+
   |                     DRAM CONFIGURATION                     |
   |------------------------------------------------------------|
   |            Size            |            Bank 0             |
   |----------------------------+-------------------------------|
   |            1MB             |          (8) 256 x 4          |
   |------------------------------------------------------------|
   |      Note:Location of memory bank is unidentified.         |
   +------------------------------------------------------------+

   +------------------------------------------------------------+
   |                 BASE I/O ADDRESS SELECTION                 |
   |------------------------------------------------------------|
   |    Setting    |  S1/1  |  S1/2  |  S1/3  |  S1/4  |  S1/5  |
   |---------------+--------+--------+--------+--------+--------|
   |     |  200h   |   On   |   On   |   On   |   On   |   On   |
   |-----+---------+--------+--------+--------+--------+--------|
   |     |  210h   |   On   |   On   |   On   |   On   |  Off   |
   |-----+---------+--------+--------+--------+--------+--------|
   |     |  220h   |   On   |   On   |   On   |  Off   |   On   |
   |-----+---------+--------+--------+--------+--------+--------|
   |>>   |  230h   |   On   |   On   |   On   |  Off   |  Off   |
   |-----+---------+--------+--------+--------+--------+--------|
   |     |  240h   |   On   |   On   |  Off   |   On   |   On   |
   |-----+---------+--------+--------+--------+--------+--------|
   |     |  3B0h   |  Off   |  Off   |   On   |  Off   |  Off   |
   |-----+---------+--------+--------+--------+--------+--------|
   |     |  3C0h   |  Off   |  Off   |  Off   |   On   |   On   |
   |-----+---------+--------+--------+--------+--------+--------|
   |     |  3D0h   |  Off   |  Off   |  Off   |   On   |  Off   |
   |-----+---------+--------+--------+--------+--------+--------|
   |     |  3E0h   |  Off   |  Off   |  Off   |  Off   |   On   |
   |-----+---------+--------+--------+--------+--------+--------|
   |     |  3F0h   |  Off   |  Off   |  Off   |  Off   |  Off   |
   |------------------------------------------------------------|
   |                           Note:                            |
   |                                                            |
   | A total of 32 base address settings are available. The     |
   | switches are a binary representation of the decimal memory |
   | addresses. S1/1 is the Most Significant Bit and switch     |
   | S1/5 is the Least Significant Bit. The switches have the   |
   | following decimal values: S1/5=16, S1/4=32, S1/3=64,       |
   | S1/2=128, S1/1=256. Turn off the switches and add the      |
   | values of the switches + 512, to obtain the correct memory |
   | address. (Off=1, On=0)                                     |
   +------------------------------------------------------------+