FLYTECH TECHNOLOGY (U.S.A.), INC. ================================= CARRY I 5200 Processor 80286 Processor Speed 12MHz Chip Set Headland Max. onboard 4MB DRAM Cache None BIOS AMI Dimensions 240mm x 220mm I/O Options Floppy drive interface, IDE interface, parallel port, serial ports (2), VGA port NPU Options 80287 +------------------------------------------------------------+ | CONNECTIONS | |------------------------------------------------------------| | Purpose | Location | Purpose | Location | |----------------+----------+---------------------+----------| | VGA port | CN3 | Serial port (COM1) | CN6 | |----------------+----------+---------------------+----------| | Parallel port | CN4 | Floppy drive | CN7 | | | | interface | | |----------------+----------+---------------------+----------| | Serial port | CN5 | IDE interface LED | CN8 | | (COM2) | | | | +------------------------------------------------------------+ +------------------------------------------------------------+ | USER CONFIGURABLE SETTINGS | |------------------------------------------------------------| | Function | Jumper | Position | |--------------------------------------+--------+------------| |>> | NPU synchronous with CPU | JP1 | Open | |---+----------------------------------+--------+------------| | | Asynchronous NPU (clock must be | JP1 | Closed | | | 0.7 to 1.6x CPU clock) | | | |---+----------------------------------+--------+------------| |>> | Onboard VGA circuit enabled | JP2 | pins 1 & 2 | | | | | closed | |---+----------------------------------+--------+------------| | | Onboard VGA circuit disabled | JP2 | pins 2 & 3 | | | | | closed | |---+----------------------------------+--------+------------| |>> | 16-bit video ROM access | JP3 | Open | |---+----------------------------------+--------+------------| | | 8-bit video ROM access | JP3 | Closed | |---+----------------------------------+--------+------------| |>> | DMA bus master select for HT18C | JP4 | pins 1 & 2 | | | controller chip | | closed | |---+----------------------------------+--------+------------| | | DMA bus master select for HT18 | JP4 | Pins 2 & 3 | | | controller chip | | closed | +------------------------------------------------------------+ +------------------------------------------------------------+ | DRAM CONFIGURATION | |------------------------------------------------------------| | Size | Bank 0 | Bank 1 | |------------------+--------------------+--------------------| | 1MB | (4) 44256 | (4) 44256 | |------------------+--------------------+--------------------| | 2MB | (4) 441000 | None | |------------------+--------------------+--------------------| | 4MB | (4) 441000 | (4) 441000 | +------------------------------------------------------------+